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risc-v-tlm
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benchmark

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mariusmonton 2018-09-11 23:34:30 +02:00
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README.md
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@ -12,6 +12,8 @@ Brief description of the modules:
* RISC_V_execute: Executes every ISA instruction * RISC_V_execute: Executes every ISA instruction
* Instruction: Decodes instruction and acces to any instruction field * Instruction: Decodes instruction and acces to any instruction field
Current performance is about 166000 instructions / sec in a Core-i5@2.2Ghz
Helper classes: Helper classes:
* Performance: Performance indicators stores here (singleton class) * Performance: Performance indicators stores here (singleton class)
* Log: Log class to log them all (singleton class) * Log: Log class to log them all (singleton class)