From 9176dbb2ed211e92ab29c0c184648b9fc2d471e1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A0rius=20Mont=C3=B3n?= Date: Wed, 14 Sep 2022 20:04:17 +0200 Subject: [PATCH] stop simulation in case of transaction error --- src/MemoryInterface.cpp | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/MemoryInterface.cpp b/src/MemoryInterface.cpp index 46a6c29..0fdbf7f 100644 --- a/src/MemoryInterface.cpp +++ b/src/MemoryInterface.cpp @@ -7,6 +7,8 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include "MemoryInterface.h" +#include +#include namespace riscv_tlm { @@ -36,8 +38,11 @@ namespace riscv_tlm { data_bus->b_transport(trans, delay); if (trans.is_response_error()) { - SC_REPORT_ERROR("Memory", "Read memory"); + std::stringstream error_msg; + error_msg << "Read memory: 0x" << std::hex << addr; + SC_REPORT_ERROR("Memory", error_msg.str().c_str()); } + return data; } @@ -62,5 +67,11 @@ namespace riscv_tlm { trans.set_address(addr); data_bus->b_transport(trans, delay); + + if (trans.is_response_error()) { + std::stringstream error_msg; + error_msg << "Write memory: 0x" << std::hex << addr; + SC_REPORT_ERROR("Memory", error_msg.str().c_str()); + } } } \ No newline at end of file