colin
/
risc-v-tlm
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

better (?) Log output

This commit is contained in:
mariusmonton 2018-10-15 17:34:42 +02:00
parent a409f48d40
commit 97b15ca7a3
1 changed files with 4 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/CPU.cpp
View File

@ -289,8 +289,8 @@ void CPU::CPU_thread(void) {
if ( trans->is_response_error() ) { if ( trans->is_response_error() ) {
SC_REPORT_ERROR("CPU base", "Read memory"); SC_REPORT_ERROR("CPU base", "Read memory");
} else { } else {
log->SC_log(Log::INFO) << "PC: " << hex << register_bank->getPC() log->SC_log(Log::INFO) << "PC: 0x" << hex
<< dec << endl; << register_bank->getPC() << ". ";
Instruction inst(INSTR); Instruction inst(INSTR);
@ -308,17 +308,9 @@ void CPU::CPU_thread(void) {
std::cout << "Extension not implemented yet" << std::endl; std::cout << "Extension not implemented yet" << std::endl;
inst.dump(); inst.dump();
exec->NOP(inst); exec->NOP(inst);
} // switch (inst.check_extension())
} }
// default:
// cout << endl << "Instruction not implemented: ";
// inst.dump();
// exec->NOP(inst);
}
perf->instructionsInc(); perf->instructionsInc();
if (PC_not_affected == true) { if (PC_not_affected == true) {