diff --git a/README.md b/README.md
index 5d47207..d57bd36 100644
--- a/README.md
+++ b/README.md
@@ -19,9 +19,11 @@ Brief description of the modules:
 * Execute: Executes ISA instructions
   * Executes C instruction extensions
   * Executes M instruction extensions
+  * Executes A instruction extensions
 * Instruction: Decodes instruction and acces to any instruction field
   * C_Instruction: Decodes Compressed instructions (C extension)
   * M_Instruction: Decodes Multiplication and Division instructions (M extension)
+  * A_Instruction: Decodes Atomic instructions (A extension)
 * Simulator: Top-level entity that builds & starts the simulation
 * BusCtrl: Simple bus manager
 * Trace: Simple trace peripheral
diff --git a/inc/C_Instruction.h b/inc/C_Instruction.h
index 691a6c8..bf417f6 100644
--- a/inc/C_Instruction.h
+++ b/inc/C_Instruction.h
@@ -272,7 +272,7 @@ public:
     aux |= m_instr[2] << 5;
 
     if (m_instr[12] == 1) {
-        aux |= 0b1111 << 12;
+        aux |= 0b11111111111111111111 << 12;
     }
 
     return aux;
diff --git a/src/Execute.cpp b/src/Execute.cpp
index ed948d2..51f373e 100644
--- a/src/Execute.cpp
+++ b/src/Execute.cpp
@@ -1111,8 +1111,6 @@ bool Execute::C_JR(Instruction &inst) {
   rs1 = c_inst.get_rs1();
   mem_addr = 0;
 
-  std::cout << "rs1 :" << rs1 << std::endl;
-
   new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
   regs->setPC(new_pc);
 
@@ -1158,7 +1156,7 @@ bool Execute::C_ADD(Instruction &inst) {
   log->SC_log(Log::INFO) << "C.ADD: x"
           << dec << rs1 << " + x"
           << rs2 << " -> x"
-          << rd  << endl;
+          << rd  << "(0x" << hex << calc << ")" << endl;
 
   return true;
 }
@@ -1182,8 +1180,8 @@ bool Execute::C_LWSP(Instruction &inst) {
   regs->setValue(rd, data);
 
   log->SC_log(Log::INFO) << "C.LWSP: x" << dec
-          << rs1 << "(0x" << hex << regs->getValue(rs1) << ") + "
-          << dec << imm << " (@0x" << hex << mem_addr << dec << ") -> x"
+          << rs1 << " + " << imm
+          << " (@0x" << hex << mem_addr << dec << ") -> x"
           << rd << "(" << hex << data << ")"<< dec << endl;
 
   return true;
@@ -1408,7 +1406,7 @@ bool Execute::C_SLLI(Instruction &inst) {
   log->SC_log(Log::INFO) << "C.SLLI: x"
           << dec << rs1 << " << "
           << shift << " -> x"
-          << rd  << endl;
+          << rd  << "(0x" << calc << ")"<< endl;
 
   return true;
 }
@@ -2155,6 +2153,11 @@ void Execute::RaiseException(uint32_t cause, uint32_t inst) {
   regs->setPC( new_pc);
 
   log->SC_log(Log::INFO) << "Exception! new PC " << hex << new_pc << endl;
+
+  regs->dump();
+  cout << "Simulation time " << sc_time_stamp() << endl;
+  perf->dump();
+  SC_REPORT_ERROR("Exception" , "Exception");
 }
 
 
diff --git a/src/Registers.cpp b/src/Registers.cpp
index 112e497..1463b51 100644
--- a/src/Registers.cpp
+++ b/src/Registers.cpp
@@ -8,7 +8,12 @@ Registers::Registers() {
 
   initCSR();
   //register_bank[sp] = 1024-1;  // SP points to end of memory
-  register_bank[sp] = Memory::SIZE-4;
+  //register_bank[sp] = 0x70000000;
+  register_bank[sp] = (0x10000000 / 4) - 1;
+  //cout << "Memory size: 0x" << hex << Memory::SIZE << endl;
+  //cout << "SP address: 0x" << hex << (0x10000000 / 4) - 1 << endl;
+
+  //register_bank[sp] = Memory::SIZE-4;
   register_PC = 0x80000000;       // default _start address
 }