diff --git a/src/BASE_ISA.cpp b/src/BASE_ISA.cpp
index 196e90b..650b457 100644
--- a/src/BASE_ISA.cpp
+++ b/src/BASE_ISA.cpp
@@ -90,7 +90,7 @@ bool BASE_ISA::Exec_LUI() {
 	imm = get_imm_U() << 12;
 	regs->setValue(rd, imm);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LUI x" << std::dec << rd << " <- 0x" << std::hex
 			<< imm << std::endl;
 	}
@@ -109,7 +109,7 @@ bool BASE_ISA::Exec_AUIPC() {
 
 	regs->setValue(rd, new_pc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "AUIPC x" << std::dec << rd << " <- 0x"
 			<< std::hex << imm << " + PC (0x" << new_pc << ")" << std::endl;
 	}
@@ -132,7 +132,7 @@ bool BASE_ISA::Exec_JAL() {
 	old_pc = old_pc + 4;
 	regs->setValue(rd, old_pc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "JAL: x" << std::dec << rd << " <- 0x" << std::hex
 			<< old_pc << std::dec << ". PC + 0x" << std::hex << mem_addr
 			<< " -> PC (0x" << new_pc << ")" << std::endl;
@@ -156,7 +156,7 @@ bool BASE_ISA::Exec_JALR() {
 	new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
 	regs->setPC(new_pc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "JALR: x" << std::dec << rd << " <- 0x"
 			<< std::hex << old_pc + 4 << " PC <- 0x" << new_pc << std::endl;
 	}
@@ -178,7 +178,7 @@ bool BASE_ISA::Exec_BEQ() {
 		new_pc = regs->getPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BEQ x" << std::dec << rs1 << "(0x" << std::hex
 			<< regs->getValue(rs1) << ") == x" << std::dec << rs2 << "(0x"
 			<< std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex
@@ -207,7 +207,7 @@ bool BASE_ISA::Exec_BNE() {
 		new_pc = regs->getPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BNE: x" << std::dec << rs1 << "(0x" << std::hex
 			<< val1 << ") == x" << std::dec << rs2 << "(0x" << std::hex << val2
 			<< ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec
@@ -231,7 +231,7 @@ bool BASE_ISA::Exec_BLT() {
 		regs->incPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BLT x" << std::dec << rs1 << "(0x" << std::hex
 			<< (int32_t) regs->getValue(rs1) << ") < x" << std::dec << rs2
 			<< "(0x" << std::hex << (int32_t) regs->getValue(rs2)
@@ -256,7 +256,7 @@ bool BASE_ISA::Exec_BGE() {
 		regs->incPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BGE x" << std::dec << rs1 << "(0x" << std::hex
 			<< (int32_t) regs->getValue(rs1) << ") > x" << std::dec << rs2
 			<< "(0x" << std::hex << (int32_t) regs->getValue(rs2)
@@ -282,7 +282,7 @@ bool BASE_ISA::Exec_BLTU() {
 		new_pc = regs->getPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BLTU x" << std::dec << rs1 << "(0x" << std::hex
 			<< regs->getValue(rs1) << ") < x" << std::dec << rs2 << "(0x"
 			<< std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex
@@ -306,7 +306,7 @@ bool BASE_ISA::Exec_BGEU() {
 		regs->incPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BGEU x" << std::dec << rs1 << "(0x" << std::hex
 			<< regs->getValue(rs1) << ") > x" << std::dec << rs2 << "(0x"
 			<< std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex
@@ -330,7 +330,7 @@ bool BASE_ISA::Exec_LB() {
 	data = mem_intf->readDataMem(mem_addr, 1);
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LB: x" << rs1 << " + " << imm << " (@0x"
 			<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::endl;
 	}
@@ -352,7 +352,7 @@ bool BASE_ISA::Exec_LH() {
 	data = mem_intf->readDataMem(mem_addr, 2);
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LH: x" << rs1 << " + " << imm << " (@0x"
 			<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::endl;
 	}
@@ -374,7 +374,7 @@ bool BASE_ISA::Exec_LW() {
 	data = mem_intf->readDataMem(mem_addr, 4);
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "LW: x" << rs1 << "(0x" << std::hex
 			<< regs->getValue(rs1) << ") + " << std::dec << imm << " (@0x"
 			<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::hex
@@ -397,7 +397,7 @@ bool BASE_ISA::Exec_LBU() {
 	data = mem_intf->readDataMem(mem_addr, 1);
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LBU: x" << rs1 << " + " << imm << " (@0x"
 			<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::endl;
 	}
@@ -418,7 +418,7 @@ bool BASE_ISA::Exec_LHU() {
 	data = mem_intf->readDataMem(mem_addr, 2);
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LHU: x" << std::dec << rs1 << " + " << imm
 			<< " (@0x" << std::hex << mem_addr << std::dec << ") -> x" << rd
 			<< "(0x" << std::hex << data << ")" << std::endl;
@@ -442,7 +442,7 @@ bool BASE_ISA::Exec_SB() {
 
 	mem_intf->writeDataMem(mem_addr, data, 1);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SB: x" << std::dec << rs2 << " -> x" << rs1
 			<< " + 0x" << std::hex << imm << " (@0x" << std::hex << mem_addr
 			<< std::dec << ")" << std::endl;
@@ -466,7 +466,7 @@ bool BASE_ISA::Exec_SH() {
 
 	mem_intf->writeDataMem(mem_addr, data, 2);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SH: x" << std::dec << rs2 << " -> x" << rs1
 			<< " + 0x" << std::hex << imm << " (@0x" << std::hex << mem_addr
 			<< std::dec << ")" << std::endl;
@@ -490,7 +490,7 @@ bool BASE_ISA::Exec_SW() {
 
 	mem_intf->writeDataMem(mem_addr, data, 4);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SW: x" << std::dec << rs2 << "(0x" << std::hex
 			<< data << ") -> x" << std::dec << rs1 << " + 0x" << std::hex << imm
 			<< " (@0x" << std::hex << mem_addr << std::dec << ")" << std::endl;
@@ -510,7 +510,7 @@ bool BASE_ISA::Exec_ADDI() {
 	calc = regs->getValue(rs1) + imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ADDI: x" << std::dec << rs1 << " + " << imm
 			<< " -> x" << std::dec << rd << "(0x" << std::hex << calc << ")"
 			<< std::endl;
@@ -573,7 +573,7 @@ bool BASE_ISA::Exec_XORI() {
 	calc = regs->getValue(rs1) ^ imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "XORI: x" << rs1 << " XOR " << imm << "-> x" << rd
 			<< std::endl;
 	}
@@ -593,7 +593,7 @@ bool BASE_ISA::Exec_ORI() {
 	calc = regs->getValue(rs1) | imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ORI: x" << rs1 << " OR " << imm << "-> x" << rd
 			<< std::endl;
 	}
@@ -615,7 +615,7 @@ bool BASE_ISA::Exec_ANDI() {
 	calc = aux & imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ANDI: x" << rs1 << "(0x" << std::hex << aux
 			<< ") AND 0x" << imm << " -> x" << std::dec << rd << "(0x"
 			<< std::hex << calc << ")" << std::endl;
@@ -645,7 +645,7 @@ bool BASE_ISA::Exec_SLLI() {
 	calc = ((uint32_t) regs->getValue(rs1)) << shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SLLI: x" << std::dec << rs1 << " << " << shift
 			<< " -> x" << rd << "(0x" << std::hex << calc << ")" << std::endl;
 	}
@@ -667,7 +667,7 @@ bool BASE_ISA::Exec_SRLI() {
 	calc = ((uint32_t) regs->getValue(rs1)) >> shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SRLI: x" << std::dec << rs1 << " >> " << shift
 			<< " -> x" << rd << std::endl;
 	}
@@ -689,7 +689,7 @@ bool BASE_ISA::Exec_SRAI() {
 	calc = regs->getValue(rs1) >> shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SRAI: x" << std::dec << rs1 << " >> " << shift
 			<< " -> x" << rd << std::endl;
 	}
@@ -708,7 +708,7 @@ bool BASE_ISA::Exec_ADD() {
 
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ADD: x" << std::dec << rs1 << " + x" << rs2
 			<< " -> x" << rd << std::hex << "(0x" << calc << ")" << std::endl;
 	}
@@ -726,7 +726,7 @@ bool BASE_ISA::Exec_SUB() {
 	calc = regs->getValue(rs1) - regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SUB: x" << rs1 << " - x" << rs2 << " -> x" << rd
 			<< "(" << calc << ")" << std::endl;
 	}
@@ -748,7 +748,7 @@ bool BASE_ISA::Exec_SLL() {
 	calc = ((uint32_t) regs->getValue(rs1)) << shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SLL: x" << rs1 << " << " << shift << " -> x"
 			<< rd << std::endl;
 	}
@@ -807,7 +807,7 @@ bool BASE_ISA::Exec_XOR() {
 	calc = regs->getValue(rs1) ^ regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "XOR: x" << rs1 << " XOR x" << rs2 << "-> x" << rd
 			<< std::endl;
 	}
@@ -829,7 +829,7 @@ bool BASE_ISA::Exec_SRL() {
 	calc = ((uint32_t) regs->getValue(rs1)) >> shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SRL: x" << rs1 << " >> " << shift << " -> x"
 			<< rd << std::endl;
 	}
@@ -851,7 +851,7 @@ bool BASE_ISA::Exec_SRA() {
 	calc = regs->getValue(rs1) >> shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SRA: x" << rs1 << " >> " << shift << " -> x"
 			<< rd << std::endl;
 	}
@@ -870,7 +870,7 @@ bool BASE_ISA::Exec_OR() {
 	calc = regs->getValue(rs1) | regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "OR: x" << rs1 << " OR x" << rs2 << "-> x" << rd
 			<< std::endl;
 	}
@@ -889,7 +889,7 @@ bool BASE_ISA::Exec_AND() {
 	calc = regs->getValue(rs1) & regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "AND: x" << rs1 << " AND x" << rs2 << "-> x" << rd
 			<< std::endl;
 	}
diff --git a/src/C_extension.cpp b/src/C_extension.cpp
index c211610..e550177 100644
--- a/src/C_extension.cpp
+++ b/src/C_extension.cpp
@@ -157,7 +157,7 @@ bool C_extension::Exec_C_JR() {
 	new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
 	regs->setPC(new_pc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "JR: PC <- 0x" << std::hex << new_pc << std::endl;
 	}
 
@@ -175,7 +175,7 @@ bool C_extension::Exec_C_MV() {
 	calc = regs->getValue(rs1) + regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.MV: x" << std::dec << rs1 << "(0x" << std::hex
 			<< regs->getValue(rs1) << ") + x" << std::dec << rs2 << "(0x"
 			<< std::hex << regs->getValue(rs2) << ") -> x" << std::dec << rd
@@ -196,7 +196,7 @@ bool C_extension::Exec_C_ADD() {
 	calc = regs->getValue(rs1) + regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.ADD: x" << std::dec << rs1 << " + x" << rs2
 			<< " -> x" << rd << "(0x" << std::hex << calc << ")" << std::endl;
 	}
@@ -221,7 +221,7 @@ bool C_extension::Exec_C_LWSP() {
 
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.LWSP: x" << std::dec << rs1 << " + " << imm
 			<< " (@0x" << std::hex << mem_addr << std::dec << ") -> x" << rd
 			<< "(" << std::hex << data << ")" << std::dec << std::endl;
@@ -247,7 +247,7 @@ bool C_extension::Exec_C_ADDI4SPN() {
 	calc = regs->getValue(rs1) + imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "C.ADDI4SPN: x" << rs1 << "(0x"
 			<< std::hex << regs->getValue(rs1) << ") + " << std::dec << imm
 			<< " -> x" << rd << "(0x" << std::hex << calc << ")" << std::endl;
@@ -301,7 +301,7 @@ bool C_extension::Exec_C_SWSP() {
 
 	mem_intf->writeDataMem(mem_addr, data, 4);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "C.SWSP: x" << rs2 << "(0x"
 			<< std::hex << data << ") -> x" << std::dec << rs1 << " + " << imm
 			<< " (@0x" << std::hex << mem_addr << std::dec << ")" << std::endl;
@@ -326,7 +326,7 @@ bool C_extension::Exec_C_BEQZ() {
 		new_pc = regs->getPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.BEQZ: x" << std::dec << rs1 << "(" << val1
 			<< ") == 0? -> PC (0x" << std::hex << new_pc << ")" << std::dec
 			<< std::endl;
@@ -351,7 +351,7 @@ bool C_extension::Exec_C_BNEZ() {
 		new_pc = regs->getPC();
 	}
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.BNEZ: x" << std::dec << rs1 << "(0x"
 			<< std::hex << val1 << ") != 0? -> PC (0x" << std::hex << new_pc
 			<< ")" << std::dec << std::endl;
@@ -372,7 +372,7 @@ bool C_extension::Exec_C_LI() {
 	calc = regs->getValue(rs1) + imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "C.LI: x" << rs1 << "("
 			<< regs->getValue(rs1) << ") + " << imm << " -> x" << rd << "("
 			<< calc << ")" << std::endl;
@@ -395,7 +395,7 @@ bool C_extension::Exec_C_SRLI() {
 	calc = ((uint32_t) regs->getValue(rs1)) >> shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SRLI: x" << rs1 << " >> " << shift << " -> x"
 			<< rd << std::endl;
 	}
@@ -417,7 +417,7 @@ bool C_extension::Exec_C_SRAI() {
 	calc = (int32_t) regs->getValue(rs1) >> shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SRAI: x" << rs1 << " >> " << std::dec << shift
 			<< " -> x" << rd << "(" << calc << ")" << std::endl;
 	}
@@ -439,7 +439,7 @@ bool C_extension::Exec_C_SLLI() {
 	calc = ((uint32_t) regs->getValue(rs1)) << shift;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SLLI: x" << std::dec << rs1 << " << " << shift
 			<< " -> x" << rd << "(0x" << calc << ")" << std::endl;
 	}
@@ -461,7 +461,7 @@ bool C_extension::Exec_C_ANDI() {
 	calc = aux & imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.ANDI: x" << rs1 << "(" << aux << ") AND "
 			<< imm << " -> x" << rd << std::endl;
 	}
@@ -480,7 +480,7 @@ bool C_extension::Exec_C_SUB() {
 	calc = regs->getValue(rs1) - regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SUB: x" << std::dec << rs1 << " - x" << rs2
 			<< " -> x" << rd << std::endl;
 	}
@@ -499,7 +499,7 @@ bool C_extension::Exec_C_XOR() {
 	calc = regs->getValue(rs1) ^ regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.XOR: x" << std::dec << rs1 << " XOR x" << rs2
 			<< "-> x" << rd << std::endl;
 	}
@@ -518,7 +518,7 @@ bool C_extension::Exec_C_OR() {
 	calc = regs->getValue(rs1) | regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C_OR: x" << std::dec << rs1 << " OR x" << rs2
 			<< "-> x" << rd << std::endl;
 	}
@@ -537,7 +537,7 @@ bool C_extension::Exec_C_AND() {
 	calc = regs->getValue(rs1) & regs->getValue(rs2);
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.AND: x" << std::dec << rs1 << " AND x" << rs2
 			<< "-> x" << rd << std::endl;
 	}
@@ -557,7 +557,7 @@ bool C_extension::Exec_C_ADDI() {
 	calc = regs->getValue(rs1) + imm;
 	regs->setValue(rd, calc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.ADDI: x" << std::dec << rs1 << " + " << imm
 			<< " -> x" << std::dec << rd << "(0x" << std::hex << calc << ")"
 			<< std::endl;
@@ -580,7 +580,7 @@ bool C_extension::Exec_C_JALR() {
 	new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
 	regs->setPC(new_pc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.JALR: x" << std::dec << rd << " <- 0x"
 			<< std::hex << old_pc + 4 << " PC <- 0x" << std::hex << new_pc
 			<< std::endl;
@@ -603,7 +603,7 @@ bool C_extension::Exec_C_LW() {
 	data = mem_intf->readDataMem(mem_addr, 4);
 	regs->setValue(rd, data);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "C.LW: x" << rs1 << "(0x" << std::hex
 			<< regs->getValue(rs1) << ") + " << std::dec << imm << " (@0x"
 			<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::hex
@@ -628,7 +628,7 @@ bool C_extension::Exec_C_SW() {
 
 	mem_intf->writeDataMem(mem_addr, data, 4);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SW: x" << std::dec << rs2 << "(0x" << std::hex
 			<< data << ") -> x" << std::dec << rs1 << " + 0x" << std::hex << imm
 			<< " (@0x" << std::hex << mem_addr << std::dec << ")" << std::endl;
@@ -652,7 +652,7 @@ bool C_extension::Exec_C_JAL(int m_rd) {
 	old_pc = old_pc + 2;
 	regs->setValue(rd, old_pc);
 
-	if (log->getLogLevel() > Log::INFO) {
+	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.JAL: x" << std::dec << rd << " <- 0x"
 			<< std::hex << old_pc << std::dec << ". PC + 0x" << std::hex
 			<< mem_addr << " -> PC (0x" << new_pc << ")" << std::endl;
diff --git a/tests/CPP/cout/Makefile b/tests/CPP/cout/Makefile
new file mode 100644
index 0000000..3be72e4
--- /dev/null
+++ b/tests/CPP/cout/Makefile
@@ -0,0 +1,50 @@
+TARGET   = cout
+
+TARGET_ARCH = riscv32
+
+CC       = riscv32-unknown-elf-g++
+
+# compiling flags here
+CFLAGS = -Wall -I. -O0 -static -march=rv32imac -mabi=ilp32 --specs=nosys.specs
+
+LINKER   = riscv32-unknown-elf-g++
+# linking flags here
+LDFLAGS   = -I. -static 
+LIBS   = $(EXTRA_LIBS)
+
+
+# change these to proper directories where each file should be
+SRCDIR   = ./
+OBJDIR   = .
+BINDIR   = ./
+INCDIR = -I.
+LIBDIR = -L.
+
+
+SOURCES  := $(wildcard $(SRCDIR)/*.cpp)
+INCLUDES := $(wildcard $(INCDIR)/*.h)
+OBJECTS  := $(SOURCES:$(SRCDIR)/%.cpp=$(OBJDIR)/%.o)
+
+rm       = rm -f
+
+
+$(BINDIR)/$(TARGET): $(OBJECTS)
+	$(LINKER) $(CFLAGS) $(LDFLAGS) $(LIBS) $(LIBDIR) $(OBJECTS) -o $@
+	riscv32-unknown-elf-objdump -d $@ > dump
+	riscv32-unknown-elf-objcopy -Oihex $@ $(TARGET).hex
+	@echo "Linking complete!"
+
+$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cpp
+	@echo "Compiling "$<" ..."
+	$(CC) $(CFLAGS) $(INCDIR) -c $< -o $@
+	@echo "Done!"
+
+.PHONY: clean
+clean:
+	@$(rm) $(OBJECTS) *.hex dump
+	@echo "Cleanup complete!"
+
+.PHONY: remove
+remove: clean
+	@$(rm) $(BINDIR)/$(TARGET)
+	@echo "Executable removed!"
diff --git a/tests/CPP/cout/cout.cpp b/tests/CPP/cout/cout.cpp
new file mode 100644
index 0000000..1752b5f
--- /dev/null
+++ b/tests/CPP/cout/cout.cpp
@@ -0,0 +1,21 @@
+#include <iostream>
+using namespace std;
+
+
+int main(void) {
+
+  int aux[5] = {0, 1, 2, 3, 4};
+  int aux2[5];
+  int counter = 0;
+  
+  cout << "Test Start" << endl;
+   
+
+  for ( const auto &x : aux ) std::cout << x << ' ';
+    std::cout << std::endl;
+
+  cout << "Test End" << endl;
+  asm volatile ("ecall");
+
+  return 0;
+}
diff --git a/tests/CPP/cout/helper_functions.cpp b/tests/CPP/cout/helper_functions.cpp
new file mode 100644
index 0000000..a137bfc
--- /dev/null
+++ b/tests/CPP/cout/helper_functions.cpp
@@ -0,0 +1,51 @@
+#include <string.h>
+#include <stdio.h>
+
+
+#define TRACE (*(unsigned char *)0x40000000)
+extern "C" {
+    
+int _read(int file, char* ptr, int len) {
+    return 0;
+}
+
+int _open(int fd) {
+    return 0;
+}
+
+int _close(int fd){
+    return 0;
+}
+
+int _fstat_r(int fd) {
+    return 0;
+}
+
+int _lseek_r(struct _reent *ptr, FILE *fp, long offset, int whence){
+    return 0;
+}
+
+int _isatty_r(struct _reent *ptr, int fd) {
+    return 0;
+}
+
+
+int _write(int file, const char *ptr, int len) {
+  int x;
+
+  for (x = 0; x < len; x++) {
+    TRACE =  *ptr++;
+  }
+
+  return (len);
+}
+
+int _getpid(void) {
+  return 0;
+}
+
+void _kill(int pid) { 
+    return;
+}
+
+}
diff --git a/tests/CPP/rtti/Makefile b/tests/CPP/rtti/Makefile
new file mode 100644
index 0000000..4b0ce75
--- /dev/null
+++ b/tests/CPP/rtti/Makefile
@@ -0,0 +1,50 @@
+TARGET   = rtti
+
+TARGET_ARCH = riscv32
+
+CC       = riscv32-unknown-elf-g++
+
+# compiling flags here
+CFLAGS = -Wall -I. -O0 -static -march=rv32imac -mabi=ilp32 --specs=nosys.specs
+
+LINKER   = riscv32-unknown-elf-g++
+# linking flags here
+LDFLAGS   = -I. -static 
+LIBS   = $(EXTRA_LIBS)
+
+
+# change these to proper directories where each file should be
+SRCDIR   = ./
+OBJDIR   = .
+BINDIR   = ./
+INCDIR = -I.
+LIBDIR = -L.
+
+
+SOURCES  := $(wildcard $(SRCDIR)/*.cpp)
+INCLUDES := $(wildcard $(INCDIR)/*.h)
+OBJECTS  := $(SOURCES:$(SRCDIR)/%.cpp=$(OBJDIR)/%.o)
+
+rm       = rm -f
+
+
+$(BINDIR)/$(TARGET): $(OBJECTS)
+	$(LINKER) $(CFLAGS) $(LDFLAGS) $(LIBS) $(LIBDIR) $(OBJECTS) -o $@
+	riscv32-unknown-elf-objdump -d $@ > dump
+	riscv32-unknown-elf-objcopy -Oihex $@ $(TARGET).hex
+	@echo "Linking complete!"
+
+$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cpp
+	@echo "Compiling "$<" ..."
+	$(CC) $(CFLAGS) $(INCDIR) -c $< -o $@
+	@echo "Done!"
+
+.PHONY: clean
+clean:
+	@$(rm) $(OBJECTS) *.hex dump
+	@echo "Cleanup complete!"
+
+.PHONY: remove
+remove: clean
+	@$(rm) $(BINDIR)/$(TARGET)
+	@echo "Executable removed!"
diff --git a/tests/CPP/rtti/helper_functions.cpp b/tests/CPP/rtti/helper_functions.cpp
new file mode 100644
index 0000000..a137bfc
--- /dev/null
+++ b/tests/CPP/rtti/helper_functions.cpp
@@ -0,0 +1,51 @@
+#include <string.h>
+#include <stdio.h>
+
+
+#define TRACE (*(unsigned char *)0x40000000)
+extern "C" {
+    
+int _read(int file, char* ptr, int len) {
+    return 0;
+}
+
+int _open(int fd) {
+    return 0;
+}
+
+int _close(int fd){
+    return 0;
+}
+
+int _fstat_r(int fd) {
+    return 0;
+}
+
+int _lseek_r(struct _reent *ptr, FILE *fp, long offset, int whence){
+    return 0;
+}
+
+int _isatty_r(struct _reent *ptr, int fd) {
+    return 0;
+}
+
+
+int _write(int file, const char *ptr, int len) {
+  int x;
+
+  for (x = 0; x < len; x++) {
+    TRACE =  *ptr++;
+  }
+
+  return (len);
+}
+
+int _getpid(void) {
+  return 0;
+}
+
+void _kill(int pid) { 
+    return;
+}
+
+}
diff --git a/tests/CPP/rtti/rtti b/tests/CPP/rtti/rtti
new file mode 100755
index 0000000..d3f2e7d
Binary files /dev/null and b/tests/CPP/rtti/rtti differ
diff --git a/tests/CPP/rtti/rtti.cpp b/tests/CPP/rtti/rtti.cpp
new file mode 100644
index 0000000..8b92611
--- /dev/null
+++ b/tests/CPP/rtti/rtti.cpp
@@ -0,0 +1,25 @@
+/* 
+ * RTTI example from https://www.geeksforgeeks.org/g-fact-33/
+ */
+
+#include<iostream> 
+using namespace std; 
+class B { virtual void fun() {} }; 
+class D: public B { }; 
+  
+int main() 
+{ 
+    B *b = new D; 
+    D *d = dynamic_cast<D*>(b); 
+    if(d != NULL) 
+        cout << "works" << endl; 
+    else
+        cout << "cannot cast B* to D*" << endl; 
+
+    
+    asm volatile ("ecall");
+
+    return 0; 
+    
+    
+} 
diff --git a/tests/CPP/rtti2/Makefile b/tests/CPP/rtti2/Makefile
new file mode 100644
index 0000000..63e8b66
--- /dev/null
+++ b/tests/CPP/rtti2/Makefile
@@ -0,0 +1,50 @@
+TARGET   = rtti2
+
+TARGET_ARCH = riscv32
+
+CC       = riscv32-unknown-elf-g++
+
+# compiling flags here
+CFLAGS = -Wall -I. -O0 -static -march=rv32imac -mabi=ilp32 --specs=nosys.specs
+
+LINKER   = riscv32-unknown-elf-g++
+# linking flags here
+LDFLAGS   = -I. -static 
+LIBS   = $(EXTRA_LIBS)
+
+
+# change these to proper directories where each file should be
+SRCDIR   = ./
+OBJDIR   = .
+BINDIR   = ./
+INCDIR = -I.
+LIBDIR = -L.
+
+
+SOURCES  := $(wildcard $(SRCDIR)/*.cpp)
+INCLUDES := $(wildcard $(INCDIR)/*.h)
+OBJECTS  := $(SOURCES:$(SRCDIR)/%.cpp=$(OBJDIR)/%.o)
+
+rm       = rm -f
+
+
+$(BINDIR)/$(TARGET): $(OBJECTS)
+	$(LINKER) $(CFLAGS) $(LDFLAGS) $(LIBS) $(LIBDIR) $(OBJECTS) -o $@
+	riscv32-unknown-elf-objdump -d $@ > dump
+	riscv32-unknown-elf-objcopy -Oihex $@ $(TARGET).hex
+	@echo "Linking complete!"
+
+$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cpp
+	@echo "Compiling "$<" ..."
+	$(CC) $(CFLAGS) $(INCDIR) -c $< -o $@
+	@echo "Done!"
+
+.PHONY: clean
+clean:
+	@$(rm) $(OBJECTS) *.hex dump
+	@echo "Cleanup complete!"
+
+.PHONY: remove
+remove: clean
+	@$(rm) $(BINDIR)/$(TARGET)
+	@echo "Executable removed!"
diff --git a/tests/CPP/rtti2/helper_functions.cpp b/tests/CPP/rtti2/helper_functions.cpp
new file mode 100644
index 0000000..a137bfc
--- /dev/null
+++ b/tests/CPP/rtti2/helper_functions.cpp
@@ -0,0 +1,51 @@
+#include <string.h>
+#include <stdio.h>
+
+
+#define TRACE (*(unsigned char *)0x40000000)
+extern "C" {
+    
+int _read(int file, char* ptr, int len) {
+    return 0;
+}
+
+int _open(int fd) {
+    return 0;
+}
+
+int _close(int fd){
+    return 0;
+}
+
+int _fstat_r(int fd) {
+    return 0;
+}
+
+int _lseek_r(struct _reent *ptr, FILE *fp, long offset, int whence){
+    return 0;
+}
+
+int _isatty_r(struct _reent *ptr, int fd) {
+    return 0;
+}
+
+
+int _write(int file, const char *ptr, int len) {
+  int x;
+
+  for (x = 0; x < len; x++) {
+    TRACE =  *ptr++;
+  }
+
+  return (len);
+}
+
+int _getpid(void) {
+  return 0;
+}
+
+void _kill(int pid) { 
+    return;
+}
+
+}
diff --git a/tests/CPP/rtti2/rtti2 b/tests/CPP/rtti2/rtti2
new file mode 100755
index 0000000..dca794b
Binary files /dev/null and b/tests/CPP/rtti2/rtti2 differ
diff --git a/tests/CPP/rtti2/rtti2.cpp b/tests/CPP/rtti2/rtti2.cpp
new file mode 100644
index 0000000..c03b7fc
--- /dev/null
+++ b/tests/CPP/rtti2/rtti2.cpp
@@ -0,0 +1,42 @@
+/* 
+ * RTTI example from https://www.tenouk.com/cpluscodesnippet/moreonruntimetypeinfo.html
+ */
+
+// run time type information
+
+#include <iostream>
+#include <typeinfo>
+
+using namespace std;
+
+class Base
+{
+public:
+    virtual void funct(){}    
+};
+
+class Derived:public Base{};
+
+int main(void)
+{
+    Derived* Test1 = new Derived;
+    Base* Test2 = Test1;
+    
+    cout<<"The type name of Test1 is: ";
+    cout<<typeid(Test1).name()<<endl;
+    
+    cout<<"The type name of *Test1 is: ";
+    cout<<typeid(*Test1).name()<<endl;
+    
+    cout<<"The type name of Test2 is: ";
+    cout<<typeid(Test2).name()<<endl;
+    
+    cout<<"The type name of *Test2 is: ";
+    cout<<typeid(*Test2).name()<<endl;
+    
+    delete Test1;
+    
+    asm volatile ("ecall");
+    
+    return 0;    
+}
diff --git a/tests/CPP/rtti3/Makefile b/tests/CPP/rtti3/Makefile
new file mode 100644
index 0000000..38ea508
--- /dev/null
+++ b/tests/CPP/rtti3/Makefile
@@ -0,0 +1,50 @@
+TARGET   = rtti3
+
+TARGET_ARCH = riscv32
+
+CC       = riscv32-unknown-elf-g++
+
+# compiling flags here
+CFLAGS = -Wall -I. -O0 -static -march=rv32imac -mabi=ilp32 --specs=nosys.specs
+
+LINKER   = riscv32-unknown-elf-g++
+# linking flags here
+LDFLAGS   = -I. -static 
+LIBS   = $(EXTRA_LIBS)
+
+
+# change these to proper directories where each file should be
+SRCDIR   = ./
+OBJDIR   = .
+BINDIR   = ./
+INCDIR = -I.
+LIBDIR = -L.
+
+
+SOURCES  := $(wildcard $(SRCDIR)/*.cpp)
+INCLUDES := $(wildcard $(INCDIR)/*.h)
+OBJECTS  := $(SOURCES:$(SRCDIR)/%.cpp=$(OBJDIR)/%.o)
+
+rm       = rm -f
+
+
+$(BINDIR)/$(TARGET): $(OBJECTS)
+	$(LINKER) $(CFLAGS) $(LDFLAGS) $(LIBS) $(LIBDIR) $(OBJECTS) -o $@
+	riscv32-unknown-elf-objdump -d $@ > dump
+	riscv32-unknown-elf-objcopy -Oihex $@ $(TARGET).hex
+	@echo "Linking complete!"
+
+$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cpp
+	@echo "Compiling "$<" ..."
+	$(CC) $(CFLAGS) $(INCDIR) -c $< -o $@
+	@echo "Done!"
+
+.PHONY: clean
+clean:
+	@$(rm) $(OBJECTS) *.hex dump
+	@echo "Cleanup complete!"
+
+.PHONY: remove
+remove: clean
+	@$(rm) $(BINDIR)/$(TARGET)
+	@echo "Executable removed!"
diff --git a/tests/CPP/rtti3/helper_functions.cpp b/tests/CPP/rtti3/helper_functions.cpp
new file mode 100644
index 0000000..a137bfc
--- /dev/null
+++ b/tests/CPP/rtti3/helper_functions.cpp
@@ -0,0 +1,51 @@
+#include <string.h>
+#include <stdio.h>
+
+
+#define TRACE (*(unsigned char *)0x40000000)
+extern "C" {
+    
+int _read(int file, char* ptr, int len) {
+    return 0;
+}
+
+int _open(int fd) {
+    return 0;
+}
+
+int _close(int fd){
+    return 0;
+}
+
+int _fstat_r(int fd) {
+    return 0;
+}
+
+int _lseek_r(struct _reent *ptr, FILE *fp, long offset, int whence){
+    return 0;
+}
+
+int _isatty_r(struct _reent *ptr, int fd) {
+    return 0;
+}
+
+
+int _write(int file, const char *ptr, int len) {
+  int x;
+
+  for (x = 0; x < len; x++) {
+    TRACE =  *ptr++;
+  }
+
+  return (len);
+}
+
+int _getpid(void) {
+  return 0;
+}
+
+void _kill(int pid) { 
+    return;
+}
+
+}
diff --git a/tests/CPP/rtti3/rtti3 b/tests/CPP/rtti3/rtti3
new file mode 100755
index 0000000..9874b24
Binary files /dev/null and b/tests/CPP/rtti3/rtti3 differ
diff --git a/tests/CPP/rtti3/rtti3.cpp b/tests/CPP/rtti3/rtti3.cpp
new file mode 100644
index 0000000..64bd370
--- /dev/null
+++ b/tests/CPP/rtti3/rtti3.cpp
@@ -0,0 +1,26 @@
+    
+// dynamic_cast
+#include <iostream>
+#include <exception>
+using namespace std;
+
+class Base_Class { virtual void dummy() {} };
+class Derived_Class: public Base_Class { int a; };
+
+int main () {
+  try {
+ 	Base_Class * ptr_a = new Derived_Class;
+ 	Base_Class * ptr_b = new Base_Class;
+ 	Derived_Class * ptr_c;
+
+    	ptr_c = dynamic_cast< Derived_Class *>(ptr_a);
+    	if (ptr_c ==0) cout << "Null pointer on first type-cast" << endl;
+
+    	ptr_c = dynamic_cast< Derived_Class *>(ptr_b);
+    	if (ptr_c ==0) cout << "Null pointer on second type-cast" << endl;
+
+  	} catch (exception& my_ex) {cout << "Exception: " << my_ex.what();}
+
+  asm volatile ("ecall");
+  return 0;
+}