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risc-v-tlm
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reduce variable scope

This commit is contained in:
Màrius Montón 2021-01-15 15:51:03 +01:00
parent 2ca86d4688
commit a019de5eb3
8 changed files with 33 additions and 16 deletions
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2
inc/Memory.h
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@ -36,7 +36,7 @@ public:
const sc_core::sc_time LATENCY;
Memory(sc_core::sc_module_name name, std::string filename);
Memory(sc_core::sc_module_name name, bool use_file);
Memory(sc_core::sc_module_name name);
~Memory(void);

7
src/CPU.cpp
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@ -62,7 +62,7 @@ CPU::~CPU() {
bool CPU::cpu_process_IRQ() {
uint32_t csr_temp;
uint32_t new_pc, old_pc;
uint32_t new_pc;
bool ret_value = false;
if (interrupt == true) {
@ -80,7 +80,7 @@ bool CPU::cpu_process_IRQ() {
log->SC_log(Log::DEBUG) << "Interrupt!" << std::endl;
/* updated MEPC register */
old_pc = register_bank->getPC();
uint32_t old_pc = register_bank->getPC();
register_bank->setCSR(CSR_MEPC, old_pc);
log->SC_log(Log::INFO) << "Old PC Value 0x" << std::hex << old_pc
<< std::endl;
@ -212,8 +212,11 @@ void CPU::call_interrupt(tlm::tlm_generic_payload &trans,
interrupt = true;
/* Socket caller send a cause (its id) */
memcpy(&int_cause, trans.get_data_ptr(), sizeof(uint32_t));
delay = sc_core::SC_ZERO_TIME;
}
void CPU::invalidate_direct_mem_ptr(sc_dt::uint64 start, sc_dt::uint64 end) {
(void) start;
(void) end;
dmi_ptr_valid = false;
}

7
src/CPU64.cpp
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@ -62,7 +62,7 @@ CPU64::~CPU64() {
bool CPU64::cpu_process_IRQ() {
uint32_t csr_temp;
uint32_t new_pc, old_pc;
uint32_t new_pc;
bool ret_value = false;
if (interrupt == true) {
@ -80,7 +80,7 @@ bool CPU64::cpu_process_IRQ() {
log->SC_log(Log::DEBUG) << "Interrupt!" << std::endl;
/* updated MEPC register */
old_pc = register_bank->getPC();
uint32_t old_pc = register_bank->getPC();
register_bank->setCSR(CSR_MEPC, old_pc);
log->SC_log(Log::INFO) << "Old PC Value 0x" << std::hex << old_pc
<< std::endl;
@ -214,8 +214,11 @@ void CPU64::call_interrupt(tlm::tlm_generic_payload &trans,
interrupt = true;
/* Socket caller send a cause (its id) */
memcpy(&int_cause, trans.get_data_ptr(), sizeof(uint32_t));
delay = sc_core::SC_ZERO_TIME;
}
void CPU64::invalidate_direct_mem_ptr(sc_dt::uint64 start, sc_dt::uint64 end) {
(void) start;
(void) end;
dmi_ptr_valid = false;
}

6
src/C_extension.cpp
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@ -258,11 +258,13 @@ bool C_extension::Exec_C_ADDI4SPN() {
bool C_extension::Exec_C_ADDI16SP() {
// addi x2, x2, nzimm[9:4]
int rd, rs1;
int rd;
int32_t imm = 0;
int32_t calc;
if (get_rd() == 2) {
int rs1;
int32_t calc;
rd = 2;
rs1 = 2;
imm = get_imm_ADDI16SP();

14
src/Memory.cpp
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@ -26,7 +26,7 @@ Memory::Memory(sc_core::sc_module_name name, std::string filename) :
log->SC_log(Log::INFO) << "Using file: " << filename << std::endl;
}
Memory::Memory(sc_core::sc_module_name name, bool use_file) :
Memory::Memory(sc_core::sc_module_name name) :
sc_module(name), socket("socket"), LATENCY(sc_core::SC_ZERO_TIME) {
socket.register_b_transport(this, &Memory::b_transport);
socket.register_get_direct_mem_ptr(this, &Memory::get_direct_mem_ptr);
@ -37,7 +37,7 @@ Memory::Memory(sc_core::sc_module_name name, bool use_file) :
mem = new uint8_t[SIZE];
log = Log::getInstance();
log->SC_log(Log::INFO) << "Memory instantiated wihtout file" << std::endl;
log->SC_log(Log::INFO) << "Memory instantiated without file" << std::endl;
}
Memory::~Memory() {
@ -108,6 +108,8 @@ void Memory::b_transport(tlm::tlm_generic_payload &trans,
bool Memory::get_direct_mem_ptr(tlm::tlm_generic_payload &trans,
tlm::tlm_dmi &dmi_data) {
(void) trans;
if (memory_offset != 0) {
return false;
}
@ -145,9 +147,7 @@ unsigned int Memory::transport_dbg(tlm::tlm_generic_payload &trans) {
void Memory::readHexFile(std::string filename) {
std::ifstream hexfile;
std::string line;
int byte_count;
uint32_t address;
int i = 0;
uint32_t extended_address = 0;
hexfile.open(filename);
@ -157,11 +157,13 @@ void Memory::readHexFile(std::string filename) {
if (line[0] == ':') {
if (line.substr(7, 2) == "00") {
/* Data */
int byte_count;
uint32_t address;
byte_count = stol(line.substr(1, 2), nullptr, 16);
address = stol(line.substr(3, 4), nullptr, 16);
address = address + extended_address;
//cout << "00 address 0x" << hex << address << endl;
for (i = 0; i < byte_count; i++) {
for (int i = 0; i < byte_count; i++) {
mem[address + i] = stol(line.substr(9 + (i * 2), 2),
nullptr, 16);
}

5
src/Simulator.cpp
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@ -37,9 +37,11 @@ SC_MODULE(Simulator) {
Trace *trace;
Timer *timer;
uint32_t start_PC;
SC_CTOR(Simulator) {
uint32_t start_PC;
MainMemory = new Memory("Main_Memory", filename);
start_PC = MainMemory->getPCfromHEX();
@ -74,6 +76,7 @@ Simulator *top;
void intHandler(int dummy) {
delete top;
(void) dummy;
//sc_stop();
exit(-1);
}

5
src/Timer.cpp
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@ -39,15 +39,17 @@ void Timer::run() {
void Timer::b_transport(tlm::tlm_generic_payload &trans,
sc_core::sc_time &delay) {
tlm::tlm_command cmd = trans.get_command();
sc_dt::uint64 addr = trans.get_address();
unsigned char *ptr = trans.get_data_ptr();
unsigned int len = trans.get_data_length();
//unsigned char* byt = trans.get_byte_enable_ptr();
//unsigned int wid = trans.get_streaming_width();
delay = sc_core::SC_ZERO_TIME;
uint32_t aux_value = 0;
uint64_t notify_time = 0;
if (cmd == tlm::TLM_WRITE_COMMAND) {
memcpy(&aux_value, ptr, len);
@ -64,6 +66,7 @@ void Timer::b_transport(tlm::tlm_generic_payload &trans,
case TIMERCMP_MEMORY_ADDRESS_HI:
m_mtimecmp.range(63, 32) = aux_value;
uint64_t notify_time;
// notify needs relative time, mtimecmp works in absolute time
notify_time = m_mtimecmp - m_mtime;

3
src/Trace.cpp
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@ -110,8 +110,9 @@ void Trace::b_transport(tlm::tlm_generic_payload &trans,
sc_core::sc_time &delay) {
unsigned char *ptr = trans.get_data_ptr();
delay = sc_core::SC_ZERO_TIME;
write(ptSlave, ptr, 1);
(void) write(ptSlave, ptr, 1);
trans.set_response_status(tlm::TLM_OK_RESPONSE);
}