diff --git a/inc/A_extension.h b/inc/A_extension.h
index 9105f84..59267de 100644
--- a/inc/A_extension.h
+++ b/inc/A_extension.h
@@ -91,11 +91,11 @@ public:
 
 	bool process_instruction(Instruction *inst);
 
-	void TLB_reserve(uint32_t address);
-	bool TLB_reserved(uint32_t address);
+	void TLB_reserve(std::uint32_t address);
+	bool TLB_reserved(std::uint32_t address);
 
 private:
-	std::unordered_set<uint32_t> TLB_A_Entries;
+	std::unordered_set<std::uint32_t> TLB_A_Entries;
 };
 
 #endif
diff --git a/inc/BASE_ISA.h b/inc/BASE_ISA.h
index cbb0847..cb2a63d 100644
--- a/inc/BASE_ISA.h
+++ b/inc/BASE_ISA.h
@@ -104,7 +104,7 @@ public:
 	 * @brief Access to funct7 field
 	 * @return funct7 field
 	 */
-	inline int32_t get_funct7() const {
+	inline std::int32_t get_funct7() const {
 		return m_instr.range(31, 25);
 	}
 
@@ -112,7 +112,7 @@ public:
 	 * @brief Sets func7 field
 	 * @param value desired func7 value
 	 */
-	inline void set_func7(int32_t value) {
+	inline void set_func7(std::int32_t value) {
 		m_instr.range(31, 25) = value;
 	}
 
@@ -120,8 +120,8 @@ public:
 	 * @brief Gets immediate field value for I-type
 	 * @return immediate_I field
 	 */
-	inline int32_t get_imm_I() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_I() const {
+		std::int32_t aux = 0;
 
 		aux = m_instr.range(31, 20);
 
@@ -137,7 +137,7 @@ public:
 	 * @brief Sets immediate field for I-type
 	 * @param value desired I value
 	 */
-	inline void set_imm_I(int32_t value) {
+	inline void set_imm_I(std::int32_t value) {
 		m_instr.range(31, 20) = value;
 	}
 
@@ -145,8 +145,8 @@ public:
 	 * @brief Gets immediate field value for S-type
 	 * @return immediate_S field
 	 */
-	inline int32_t get_imm_S() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_S() const {
+		std::int32_t aux = 0;
 
 		aux = m_instr.range(31, 25) << 5;
 		aux |= m_instr.range(11, 7);
@@ -162,7 +162,7 @@ public:
 	 * @brief Gets immediate field value for U-type
 	 * @return immediate_U field
 	 */
-	inline int32_t get_imm_U() const {
+	inline std::int32_t get_imm_U() const {
 		return m_instr.range(31, 12);
 	}
 
@@ -170,7 +170,7 @@ public:
 	 * @brief Sets immediate field for U-type
 	 * @param value desired U value
 	 */
-	inline void set_imm_U(int32_t value) {
+	inline void set_imm_U(std::int32_t value) {
 		m_instr.range(31, 12) = (value << 12);
 	}
 
@@ -178,8 +178,8 @@ public:
 	 * @brief Gets immediate field value for B-type
 	 * @return immediate_B field
 	 */
-	inline int32_t get_imm_B() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_B() const {
+		std::int32_t aux = 0;
 
 		aux |= m_instr[7] << 11;
 		aux |= m_instr.range(30, 25) << 5;
@@ -197,7 +197,7 @@ public:
 	 * @brief Sets immediate field for B-type
 	 * @param value desired B value
 	 */
-	inline void set_imm_B(int32_t value) {
+	inline void set_imm_B(std::int32_t value) {
 		sc_dt::sc_uint<32> aux = value;
 
 		m_instr[31] = aux[12];
@@ -210,8 +210,8 @@ public:
 	 * @brief Gets immediate field value for J-type
 	 * @return immediate_J field
 	 */
-	inline int32_t get_imm_J() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_J() const {
+		std::int32_t aux = 0;
 
 		aux = m_instr[31] << 20;
 		aux |= m_instr.range(19, 12) << 12;
@@ -230,7 +230,7 @@ public:
 	 * @brief Sets immediate field for J-type
 	 * @param value desired J value
 	 */
-	inline void set_imm_J(int32_t value) {
+	inline void set_imm_J(std::int32_t value) {
 		sc_dt::sc_uint<32> aux = (value << 20);
 
 		m_instr[31] = aux[20];
@@ -243,18 +243,18 @@ public:
 	 * @brief Returns shamt field for Shifts instructions
 	 * @return value corresponding to inst(25:20)
 	 */
-	inline int32_t get_shamt() const {
-		return static_cast<int32_t>(m_instr.range(25, 20));
+	inline std::int32_t get_shamt() const {
+		return static_cast<std::int32_t>(m_instr.range(25, 20));
 	}
 
 	/**
 	 * @brief Returns CSR field for CSR instructions
 	 * @return value corresponding to instr(31:20)
 	 */
-	inline int32_t get_csr() const {
-		int32_t aux = 0;
+	inline std::int32_t get_csr() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr.range(31, 20));
+		aux = static_cast<std::int32_t>(m_instr.range(31, 20));
 
 		return aux;
 	}
@@ -263,8 +263,8 @@ public:
 	 * @brief Access to opcode field
 	 * @return return opcode field
 	 */
-	inline int32_t opcode() const override {
-		return static_cast<int32_t>(m_instr.range(6, 0));
+	inline std::int32_t opcode() const override {
+		return static_cast<std::int32_t>(m_instr.range(6, 0));
 	}
 
 	bool Exec_LUI() const;
diff --git a/inc/CPU.h b/inc/CPU.h
index 48a0c60..9144585 100644
--- a/inc/CPU.h
+++ b/inc/CPU.h
@@ -54,7 +54,7 @@ public:
 	 * @param PC   Program Counter initialize value
 	 * @param debug To start debugging
 	 */
-	CPU(sc_core::sc_module_name const &name, uint32_t PC, bool debug);
+	CPU(sc_core::sc_module_name const &name, std::uint32_t PC, bool debug);
 
 	/**
 	 * @brief Destructor
@@ -81,13 +81,13 @@ private:
 	tlm_utils::tlm_quantumkeeper *m_qk;
 
 	bool interrupt;
-	uint32_t int_cause;
+	std::uint32_t int_cause;
 	bool irq_already_down;
 	sc_core::sc_time default_time;
 	bool dmi_ptr_valid;
 
 	tlm::tlm_generic_payload trans;
-	uint32_t INSTR;
+	std::uint32_t INSTR;
 	unsigned char *dmi_ptr = nullptr;
 
 
diff --git a/inc/C_extension.h b/inc/C_extension.h
index 3d46508..a16be81 100644
--- a/inc/C_extension.h
+++ b/inc/C_extension.h
@@ -105,51 +105,51 @@ public:
 	 * @brief Access to opcode field
 	 * @return return opcode field
 	 */
-	inline int32_t opcode() const override {
-		return static_cast<int32_t>(m_instr.range(1, 0));
+	inline std::int32_t opcode() const override {
+		return static_cast<std::int32_t>(m_instr.range(1, 0));
 	}
 
-	inline int32_t get_rdp() const {
-		return static_cast<int32_t>(m_instr.range(4, 2) + 8);
+	inline std::int32_t get_rdp() const {
+		return static_cast<std::int32_t>(m_instr.range(4, 2) + 8);
 	}
 
 	/**
 	 * @brief Access to rs1 field
 	 * @return rs1 field
 	 */
-	inline int32_t get_rs1() const override {
-		return static_cast<int32_t>(m_instr.range(11, 7));
+	inline std::int32_t get_rs1() const override {
+		return static_cast<std::int32_t>(m_instr.range(11, 7));
 	}
 
-	inline void set_rs1(int32_t value) override {
+	inline void set_rs1(std::int32_t value) override {
 		m_instr.range(11, 7) = value;
 	}
 
-	inline int32_t get_rs1p() const {
-		return static_cast<int32_t>(m_instr.range(9, 7) + 8);
+	inline std::int32_t get_rs1p() const {
+		return static_cast<std::int32_t>(m_instr.range(9, 7) + 8);
 	}
 
 	/**
 	 * @brief Access to rs2 field
 	 * @return rs2 field
 	 */
-	inline int32_t get_rs2() const override {
-		return static_cast<int32_t>(m_instr.range(6, 2));
+	inline std::int32_t get_rs2() const override {
+		return static_cast<std::int32_t>(m_instr.range(6, 2));
 	}
 
-	inline void set_rs2(int32_t value) override {
+	inline void set_rs2(std::int32_t value) override {
 		m_instr.range(6, 2) = value;
 	}
 
-	inline int32_t get_rs2p() const {
-		return static_cast<int32_t>(m_instr.range(4, 2) + 8);
+	inline std::int32_t get_rs2p() const {
+		return static_cast<std::int32_t>(m_instr.range(4, 2) + 8);
 	}
 
-	inline int32_t get_funct3() const override {
-		return static_cast<int32_t>(m_instr.range(15, 13));
+	inline std::int32_t get_funct3() const override {
+		return static_cast<std::int32_t>(m_instr.range(15, 13));
 	}
 
-	inline void set_funct3(int32_t value) override {
+	inline void set_funct3(std::int32_t value) override {
 		m_instr.range(15, 13) = value;
 	}
 
@@ -157,10 +157,10 @@ public:
 	 * @brief Access to immediate field for I-type
 	 * @return immediate_I field
 	 */
-	inline int32_t get_imm_I() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_I() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr.range(31, 20));
+		aux = static_cast<std::int32_t>(m_instr.range(31, 20));
 
 		/* sign extension (optimize) */
 		if (m_instr[31] == 1) {
@@ -170,7 +170,7 @@ public:
 		return aux;
 	}
 
-	inline void set_imm_I(int32_t value) {
+	inline void set_imm_I(std::int32_t value) {
 		m_instr.range(31, 20) = value;
 	}
 
@@ -178,11 +178,11 @@ public:
 	 * @brief Access to immediate field for S-type
 	 * @return immediate_S field
 	 */
-	inline int32_t get_imm_S() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_S() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr.range(31, 25) << 5);
-		aux |= static_cast<int32_t>(m_instr.range(11, 7));
+		aux = static_cast<std::int32_t>(m_instr.range(31, 25) << 5);
+		aux |= static_cast<std::int32_t>(m_instr.range(11, 7));
 
 		if (m_instr[31] == 1) {
 			aux |= (0b11111111111111111111) << 12;
@@ -191,7 +191,7 @@ public:
 		return aux;
 	}
 
-	inline void set_imm_S(int32_t value) {
+	inline void set_imm_S(std::int32_t value) {
 		sc_dt::sc_uint<32> aux = value;
 
 		m_instr.range(31, 25) = aux.range(11, 5);
@@ -202,11 +202,11 @@ public:
 	 * @brief Access to immediate field for U-type
 	 * @return immediate_U field
 	 */
-	inline int32_t get_imm_U() const {
-		return static_cast<int32_t>(m_instr.range(31, 12));
+	inline std::int32_t get_imm_U() const {
+		return static_cast<std::int32_t>(m_instr.range(31, 12));
 	}
 
-	inline void set_imm_U(int32_t value) {
+	inline void set_imm_U(std::int32_t value) {
 		m_instr.range(31, 12) = (value << 12);
 	}
 
@@ -214,13 +214,13 @@ public:
 	 * @brief Access to immediate field for B-type
 	 * @return immediate_B field
 	 */
-	inline int32_t get_imm_B() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_B() const {
+		std::int32_t aux = 0;
 
-		aux |= static_cast<int32_t>(m_instr[7] << 11);
-		aux |= static_cast<int32_t>(m_instr.range(30, 25) << 5);
-		aux |= static_cast<int32_t>(m_instr[31] << 12);
-		aux |= static_cast<int32_t>(m_instr.range(11, 8) << 1);
+		aux |= static_cast<std::int32_t>(m_instr[7] << 11);
+		aux |= static_cast<std::int32_t>(m_instr.range(30, 25) << 5);
+		aux |= static_cast<std::int32_t>(m_instr[31] << 12);
+		aux |= static_cast<std::int32_t>(m_instr.range(11, 8) << 1);
 
 		if (m_instr[31] == 1) {
 			aux |= (0b11111111111111111111) << 12;
@@ -229,7 +229,7 @@ public:
 		return aux;
 	}
 
-	inline void set_imm_B(int32_t value) {
+	inline void set_imm_B(std::int32_t value) {
 		sc_dt::sc_uint<32> aux = value;
 
 		m_instr[31] = aux[12];
@@ -241,18 +241,18 @@ public:
 	 * @brief Access to immediate field for J-type
 	 * @return immediate_J field
 	 */
-	inline int32_t get_imm_J() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_J() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr[12] << 11);
-		aux |= static_cast<int32_t>(m_instr[11] << 4);
-		aux |= static_cast<int32_t>(m_instr[10] << 9);
-		aux |= static_cast<int32_t>(m_instr[9] << 8);
-		aux |= static_cast<int32_t>(m_instr[8] << 10);
-		aux |= static_cast<int32_t>(m_instr[7] << 6);
-		aux |= static_cast<int32_t>(m_instr[6] << 7);
-		aux |= static_cast<int32_t>(m_instr.range(5, 3) << 1);
-		aux |= static_cast<int32_t>(m_instr[2] << 5);
+		aux = static_cast<std::int32_t>(m_instr[12] << 11);
+		aux |= static_cast<std::int32_t>(m_instr[11] << 4);
+		aux |= static_cast<std::int32_t>(m_instr[10] << 9);
+		aux |= static_cast<std::int32_t>(m_instr[9] << 8);
+		aux |= static_cast<std::int32_t>(m_instr[8] << 10);
+		aux |= static_cast<std::int32_t>(m_instr[7] << 6);
+		aux |= static_cast<std::int32_t>(m_instr[6] << 7);
+		aux |= static_cast<std::int32_t>(m_instr.range(5, 3) << 1);
+		aux |= static_cast<std::int32_t>(m_instr[2] << 5);
 
 		if (m_instr[12] == 1) {
 			aux |= 0b11111111111111111111 << 12;
@@ -261,7 +261,7 @@ public:
 		return aux;
 	}
 
-	inline void set_imm_J(int32_t value) {
+	inline void set_imm_J(std::int32_t value) {
 		sc_dt::sc_uint<32> aux = (value << 20);
 
 		m_instr[31] = aux[20];
@@ -270,31 +270,31 @@ public:
 		m_instr.range(19, 12) = aux.range(19, 12);
 	}
 
-	inline int32_t get_imm_L() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_L() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr.range(12, 10) << 3);
-		aux |= static_cast<int32_t>(m_instr[6] << 2);
-		aux |= static_cast<int32_t>(m_instr[5] << 6);
+		aux = static_cast<std::int32_t>(m_instr.range(12, 10) << 3);
+		aux |= static_cast<std::int32_t>(m_instr[6] << 2);
+		aux |= static_cast<std::int32_t>(m_instr[5] << 6);
 
 		return aux;
 	}
 
-	inline int32_t get_imm_LWSP() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_LWSP() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr[12] << 5);
-		aux |= static_cast<int32_t>(m_instr.range(6, 4) << 2);
-		aux |= static_cast<int32_t>(m_instr.range(3, 2) << 6);
+		aux = static_cast<std::int32_t>(m_instr[12] << 5);
+		aux |= static_cast<std::int32_t>(m_instr.range(6, 4) << 2);
+		aux |= static_cast<std::int32_t>(m_instr.range(3, 2) << 6);
 
 		return aux;
 	}
 
-	inline int32_t get_imm_ADDI () const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_ADDI () const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr[12] << 5);
-		aux |= static_cast<int32_t>(m_instr.range(6, 2));
+		aux = static_cast<std::int32_t>(m_instr[12] << 5);
+		aux |= static_cast<std::int32_t>(m_instr.range(6, 2));
 
 		if (m_instr[12] == 1) {
 			aux |= 0b11111111111111111111111111 << 6;
@@ -302,26 +302,26 @@ public:
 		return aux;
 	}
 
-	inline int32_t get_imm_ADDI4SPN() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_ADDI4SPN() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr.range(12, 11) << 4);
-		aux |= static_cast<int32_t>(m_instr.range(10, 7) << 6);
-		aux |= static_cast<int32_t>(m_instr[6] << 2);
-		aux |= static_cast<int32_t>(m_instr[5] << 3);
+		aux = static_cast<std::int32_t>(m_instr.range(12, 11) << 4);
+		aux |= static_cast<std::int32_t>(m_instr.range(10, 7) << 6);
+		aux |= static_cast<std::int32_t>(m_instr[6] << 2);
+		aux |= static_cast<std::int32_t>(m_instr[5] << 3);
 
 		return aux;
 	}
 
-	inline int32_t get_imm_ADDI16SP() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_ADDI16SP() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr[12] << 9);
-		aux |= static_cast<int32_t>(m_instr[6] << 4);
-		aux |= static_cast<int32_t>(m_instr[5] << 6);
-		aux |= static_cast<int32_t>(m_instr[4] << 8);
-		aux |= static_cast<int32_t>(m_instr[3] << 7);
-		aux |= static_cast<int32_t>(m_instr[2] << 5);
+		aux = static_cast<std::int32_t>(m_instr[12] << 9);
+		aux |= static_cast<std::int32_t>(m_instr[6] << 4);
+		aux |= static_cast<std::int32_t>(m_instr[5] << 6);
+		aux |= static_cast<std::int32_t>(m_instr[4] << 8);
+		aux |= static_cast<std::int32_t>(m_instr[3] << 7);
+		aux |= static_cast<std::int32_t>(m_instr[2] << 5);
 
 		if (m_instr[12] == 1) {
 			aux |= 0b1111111111111111111111 << 10;
@@ -329,25 +329,25 @@ public:
 		return aux;
 	}
 
-	inline int32_t get_imm_CSS() const {
-		int32_t aux = 0;
-		aux = static_cast<int32_t>(m_instr.range(12, 9) << 2);
-		aux |= static_cast<int32_t>(m_instr.range(8, 7) << 6);
+	inline std::int32_t get_imm_CSS() const {
+		std::int32_t aux = 0;
+		aux = static_cast<std::int32_t>(m_instr.range(12, 9) << 2);
+		aux |= static_cast<std::int32_t>(m_instr.range(8, 7) << 6);
 
 		return aux;
 	}
 
-	inline int32_t get_imm_CB() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_CB() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr[12] << 8);
-		aux |= static_cast<int32_t>(m_instr[11] << 4);
-		aux |= static_cast<int32_t>(m_instr[10] << 3);
-		aux |= static_cast<int32_t>(m_instr[6] << 7);
-		aux |= static_cast<int32_t>(m_instr[5] << 6);
-		aux |= static_cast<int32_t>(m_instr[4] << 2);
-		aux |= static_cast<int32_t>(m_instr[3] << 1);
-		aux |= static_cast<int32_t>(m_instr[2] << 5);
+		aux = static_cast<std::int32_t>(m_instr[12] << 8);
+		aux |= static_cast<std::int32_t>(m_instr[11] << 4);
+		aux |= static_cast<std::int32_t>(m_instr[10] << 3);
+		aux |= static_cast<std::int32_t>(m_instr[6] << 7);
+		aux |= static_cast<std::int32_t>(m_instr[5] << 6);
+		aux |= static_cast<std::int32_t>(m_instr[4] << 2);
+		aux |= static_cast<std::int32_t>(m_instr[3] << 1);
+		aux |= static_cast<std::int32_t>(m_instr[2] << 5);
 
 		if (m_instr[12] == 1) {
 			aux |= 0b11111111111111111111111 << 9;
@@ -356,11 +356,11 @@ public:
 		return aux;
 	}
 
-	inline int32_t get_imm_LUI() const {
-		int32_t aux = 0;
+	inline std::int32_t get_imm_LUI() const {
+		std::int32_t aux = 0;
 
-		aux = static_cast<int32_t>(m_instr[12] << 17);
-		aux |= static_cast<int32_t>(m_instr.range(6, 2) << 12);
+		aux = static_cast<std::int32_t>(m_instr[12] << 17);
+		aux |= static_cast<std::int32_t>(m_instr.range(6, 2) << 12);
 
 		if (m_instr[12] == 1) {
 			aux |= 0b111111111111111 << 17;
@@ -369,7 +369,7 @@ public:
 		return aux;
 	}
 
-	inline int32_t get_csr() const {
+	inline std::int32_t get_csr() const {
 		return get_imm_I();
 	}
 
diff --git a/inc/Instruction.h b/inc/Instruction.h
index 648a202..da29a19 100644
--- a/inc/Instruction.h
+++ b/inc/Instruction.h
@@ -35,7 +35,7 @@ typedef enum {
 class Instruction {
 public:
 
-	Instruction(uint32_t instr);
+	Instruction(std::uint32_t instr);
 
 	/**
 	 * @brief returns what instruction extension
@@ -43,14 +43,14 @@ public:
 	 */
 	extension_t check_extension() const;
 
-	void setInstr(uint32_t p_instr) {
+	void setInstr(std::uint32_t p_instr) {
 		m_instr = p_instr;
 	}
 	/**
 	 * @brief return instruction
 	 * @return all instruction bits (31:0)
 	 */
-	uint32_t getInstr() {
+	std::uint32_t getInstr() {
 		return m_instr;
 	}
 
@@ -59,7 +59,7 @@ public:
 	}
 
 private:
-	uint32_t m_instr;
+	std::uint32_t m_instr;
 };
 
 #endif
diff --git a/inc/M_extension.h b/inc/M_extension.h
index cddfdb5..2f24e67 100644
--- a/inc/M_extension.h
+++ b/inc/M_extension.h
@@ -77,8 +77,8 @@ private:
 	 * @brief Access to opcode field
 	 * @return return opcode field
 	 */
-	inline int32_t opcode() const override {
-		return static_cast<int32_t>(m_instr.range(14, 12));
+	inline std::int32_t opcode() const override {
+		return static_cast<std::int32_t>(m_instr.range(14, 12));
 	}
 
 };
diff --git a/inc/Memory.h b/inc/Memory.h
index 66d4f48..5777b6d 100644
--- a/inc/Memory.h
+++ b/inc/Memory.h
@@ -43,7 +43,7 @@ public:
 	 * @brief Returns Program Counter read from hexfile
 	 * @return Initial PC
 	 */
-	virtual uint32_t getPCfromHEX();
+	virtual std::uint32_t getPCfromHEX();
 
 	// TLM-2 blocking transport method
 	virtual void b_transport(tlm::tlm_generic_payload &trans,
@@ -75,9 +75,9 @@ private:
 	/**
 	 * @brief Program counter (PC) read from hex file
 	 */
-	uint32_t program_counter;
+	std::uint32_t program_counter;
 
-	uint32_t memory_offset;
+	std::uint32_t memory_offset;
 	/**
 	 * @brief Read Intel hex file
 	 * @param filename file name to read
diff --git a/inc/MemoryInterface.h b/inc/MemoryInterface.h
index d0753f5..f34aaa4 100644
--- a/inc/MemoryInterface.h
+++ b/inc/MemoryInterface.h
@@ -27,8 +27,8 @@ public:
 	tlm_utils::simple_initiator_socket<MemoryInterface> data_bus;
 
 	MemoryInterface();
-	uint32_t readDataMem(uint32_t addr, int size);
-	void writeDataMem(uint32_t addr, uint32_t data, int size);
+	std::uint32_t readDataMem(std::uint32_t addr, int size);
+	void writeDataMem(std::uint32_t addr, std::uint32_t data, int size);
 };
 
 #endif /* INC_MEMORYINTERFACE_H_ */
diff --git a/inc/Registers.h b/inc/Registers.h
index dcb6a06..d0ee542 100644
--- a/inc/Registers.h
+++ b/inc/Registers.h
@@ -190,36 +190,32 @@ public:
 	 * @param reg_num register number
 	 * @param value   register value
 	 */
-	void setValue(int reg_num, int32_t value);
+	void setValue(int reg_num, std::int32_t value);
 
 	/**
 	 * Returns register value
 	 * @param  reg_num register number
 	 * @return         register value
 	 */
-	uint32_t getValue(int reg_num) const;
+    std::uint32_t getValue(int reg_num) const;
 
 	/**
 	 * Returns PC value
 	 * @return PC value
 	 */
-	uint32_t getPC() const;
+    std::uint32_t getPC() const;
 
 	/**
 	 * Sets arbitraty value to PC
 	 * @param new_pc new address to PC
 	 */
-	void setPC(uint32_t new_pc);
+	void setPC(std::uint32_t new_pc);
 
 	/**
 	 * Increments PC couunter to next address
 	 */
-	inline void incPC(bool C_ext = false) {
-		if (C_ext) {
-			register_PC += 2;
-		} else {
-			register_PC += 4;
-		}
+	inline void incPC() {
+		register_PC += 4;
 	}
 
     inline void incPCby2() {
@@ -231,14 +227,14 @@ public:
 	 * @param csr CSR number to access
 	 * @return CSR value
 	 */
-	uint32_t getCSR(int csr);
+    std::uint32_t getCSR(int csr);
 
 	/**
 	 * @brief Set CSR value
 	 * @param csr   CSR number to access
 	 * @param value new value to register
 	 */
-	void setCSR(int csr, uint32_t value);
+	void setCSR(int csr, std::uint32_t value);
 
 	/**
 	 * Dump register data to console
@@ -248,17 +244,17 @@ private:
 	/**
 	 * bank of registers (32 regs of 32bits each)
 	 */
-	std::array<uint32_t, 32> register_bank = { {0} };
+	std::array<std::uint32_t, 32> register_bank = { {0} };
 
 	/**
 	 * Program counter (32 bits width)
 	 */
-	uint32_t register_PC;
+    std::uint32_t register_PC;
 
 	/**
 	 * CSR registers (4096 maximum)
 	 */
-	std::unordered_map<unsigned int, uint32_t> CSR{0};
+	std::unordered_map<unsigned int, std::uint32_t> CSR{0};
 
 	Performance *perf;
 
diff --git a/inc/extension_base.h b/inc/extension_base.h
index d16f2e0..d271aee 100644
--- a/inc/extension_base.h
+++ b/inc/extension_base.h
@@ -31,42 +31,42 @@ public:
 			MemoryInterface *mem_interface);
 	virtual ~extension_base() = 0;
 
-	void setInstr(uint32_t p_instr);
-	void RaiseException(uint32_t cause, uint32_t inst);
+	void setInstr(std::uint32_t p_instr);
+	void RaiseException(std::uint32_t cause, std::uint32_t inst);
 	bool NOP();
 
 	/* pure virtual functions */
-	virtual int32_t opcode() const = 0;
+	virtual std::int32_t opcode() const = 0;
 
-	virtual int32_t get_rd() const {
+	virtual std::int32_t get_rd() const {
 	    return m_instr.range(11, 7);
 	}
 
-	virtual void set_rd(int32_t value) {
+	virtual void set_rd(std::int32_t value) {
     m_instr.range(11, 7) = value;
 	}
 
-	virtual int32_t get_rs1() const {
+	virtual std::int32_t get_rs1() const {
     return m_instr.range(19, 15);
 	}
 
-	virtual void set_rs1(int32_t value) {
+	virtual void set_rs1(std::int32_t value) {
 	  m_instr.range(19, 15) = value;
 	}
 
-	virtual int32_t get_rs2() const {
+	virtual std::int32_t get_rs2() const {
 	  return m_instr.range(24, 20);
 	}
 
-	virtual void set_rs2(int32_t value) {
+	virtual void set_rs2(std::int32_t value) {
     m_instr.range(24, 20) = value;
 	}
 
-	virtual int32_t get_funct3() const {
+	virtual std::int32_t get_funct3() const {
     return m_instr.range(14, 12);
 	}
 
-	virtual void set_funct3(int32_t value) {
+	virtual void set_funct3(std::int32_t value) {
 	  m_instr.range(14, 12) = value;
 	}
 
diff --git a/src/A_extension.cpp b/src/A_extension.cpp
index c6faa3d..37ff3b4 100644
--- a/src/A_extension.cpp
+++ b/src/A_extension.cpp
@@ -54,9 +54,9 @@ op_A_Codes A_extension::decode() const {
 }
 
 bool A_extension::Exec_A_LR() {
-	uint32_t mem_addr = 0;
+	std::uint32_t mem_addr = 0;
 	int rd, rs1, rs2;
-	uint32_t data;
+	std::uint32_t data;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -83,9 +83,9 @@ bool A_extension::Exec_A_LR() {
 }
 
 bool A_extension::Exec_A_SC() {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
+	std::uint32_t data;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -110,10 +110,10 @@ bool A_extension::Exec_A_SC() {
 }
 
 bool A_extension::Exec_A_AMOSWAP() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
-	uint32_t aux;
+	std::uint32_t data;
+	std::uint32_t aux;
 
 	/* These instructions must be atomic */
 
@@ -138,9 +138,9 @@ bool A_extension::Exec_A_AMOSWAP() const {
 }
 
 bool A_extension::Exec_A_AMOADD() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
+	std::uint32_t data;
 
 	/* These instructions must be atomic */
 
@@ -166,9 +166,9 @@ bool A_extension::Exec_A_AMOADD() const {
 }
 
 bool A_extension::Exec_A_AMOXOR() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
+	std::uint32_t data;
 
 	/* These instructions must be atomic */
 
@@ -193,9 +193,9 @@ bool A_extension::Exec_A_AMOXOR() const {
 	return true;
 }
 bool A_extension::Exec_A_AMOAND() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
+	std::uint32_t data;
 
 	/* These instructions must be atomic */
 
@@ -221,9 +221,9 @@ bool A_extension::Exec_A_AMOAND() const {
 }
 
 bool A_extension::Exec_A_AMOOR() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
+	std::uint32_t data;
 
 	/* These instructions must be atomic */
 
@@ -248,10 +248,10 @@ bool A_extension::Exec_A_AMOOR() const {
 }
 
 bool A_extension::Exec_A_AMOMIN() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
-	uint32_t aux;
+	std::uint32_t data;
+	std::uint32_t aux;
 
 	/* These instructions must be atomic */
 
@@ -279,10 +279,10 @@ bool A_extension::Exec_A_AMOMIN() const {
 	return true;
 }
 bool A_extension::Exec_A_AMOMAX() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
-	uint32_t aux;
+	std::uint32_t data;
+	std::uint32_t aux;
 
 	/* These instructions must be atomic */
 
@@ -310,10 +310,10 @@ bool A_extension::Exec_A_AMOMAX() const {
 	return true;
 }
 bool A_extension::Exec_A_AMOMINU() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
-	uint32_t aux;
+	std::uint32_t data;
+	std::uint32_t aux;
 
 	/* These instructions must be atomic */
 
@@ -341,10 +341,10 @@ bool A_extension::Exec_A_AMOMINU() const {
 	return true;
 }
 bool A_extension::Exec_A_AMOMAXU() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1, rs2;
-	uint32_t data;
-	uint32_t aux;
+	std::uint32_t data;
+	std::uint32_t aux;
 
 	/* These instructions must be atomic */
 
@@ -372,11 +372,11 @@ bool A_extension::Exec_A_AMOMAXU() const {
 	return true;
 }
 
-void A_extension::TLB_reserve(uint32_t address) {
+void A_extension::TLB_reserve(std::uint32_t address) {
 	TLB_A_Entries.insert(address);
 }
 
-bool A_extension::TLB_reserved(uint32_t address) {
+bool A_extension::TLB_reserved(std::uint32_t address) {
 	if (TLB_A_Entries.count(address) == 1) {
 		TLB_A_Entries.erase(address);
 		return true;
diff --git a/src/BASE_ISA.cpp b/src/BASE_ISA.cpp
index 85c645f..c8ebdaa 100644
--- a/src/BASE_ISA.cpp
+++ b/src/BASE_ISA.cpp
@@ -84,11 +84,11 @@ enum Codes {
 
 bool BASE_ISA::Exec_LUI() const {
 	int rd;
-	uint32_t imm;
+	std::uint32_t imm;
 
 	rd = get_rd();
 	imm = get_imm_U() << 12;
-	regs->setValue(rd, static_cast<int32_t>(imm));
+	regs->setValue(rd, static_cast<std::int32_t>(imm));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LUI: x" << std::dec << rd << " <- 0x" << std::hex
@@ -100,12 +100,12 @@ bool BASE_ISA::Exec_LUI() const {
 
 bool BASE_ISA::Exec_AUIPC() const {
 	int rd;
-	uint32_t imm;
+	std::uint32_t imm;
 	int new_pc;
 
 	rd = get_rd();
 	imm = get_imm_U() << 12;
-	new_pc = static_cast<int32_t>(regs->getPC() + imm);
+	new_pc = static_cast<std::int32_t>(regs->getPC() + imm);
 
 	regs->setValue(rd, new_pc);
 
@@ -124,7 +124,7 @@ bool BASE_ISA::Exec_JAL() const {
 
 	rd = get_rd();
 	mem_addr = get_imm_J();
-	old_pc = static_cast<int32_t>(regs->getPC());
+	old_pc = static_cast<std::int32_t>(regs->getPC());
 	new_pc = old_pc + mem_addr;
 
 	regs->setPC(new_pc);
@@ -142,7 +142,7 @@ bool BASE_ISA::Exec_JAL() const {
 }
 
 bool BASE_ISA::Exec_JALR() {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1;
 	int new_pc, old_pc;
 
@@ -150,10 +150,10 @@ bool BASE_ISA::Exec_JALR() {
 	rs1 = get_rs1();
 	mem_addr = get_imm_I();
 
-	old_pc = static_cast<int32_t>(regs->getPC());
+	old_pc = static_cast<std::int32_t>(regs->getPC());
 	regs->setValue(rd, old_pc + 4);
 
-	new_pc = static_cast<int32_t>((regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE);
+	new_pc = static_cast<std::int32_t>((regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE);
 
 	if( (new_pc & 0x00000003) != 0) {
 	    // not aligned
@@ -180,11 +180,11 @@ bool BASE_ISA::Exec_BEQ() const {
 	rs2 = get_rs2();
 
 	if (regs->getValue(rs1) == regs->getValue(rs2)) {
-		new_pc = static_cast<int32_t>(regs->getPC() + get_imm_B());
+		new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
 		regs->setPC(new_pc);
 	} else {
 		regs->incPC();
-		new_pc = static_cast<int32_t>(regs->getPC());
+		new_pc = static_cast<std::int32_t>(regs->getPC());
 	}
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -200,7 +200,7 @@ bool BASE_ISA::Exec_BEQ() const {
 bool BASE_ISA::Exec_BNE() const {
 	int rs1, rs2;
 	int new_pc;
-	uint32_t val1, val2;
+	std::uint32_t val1, val2;
 
 	rs1 = get_rs1();
 	rs2 = get_rs2();
@@ -209,11 +209,11 @@ bool BASE_ISA::Exec_BNE() const {
 	val2 = regs->getValue(rs2);
 
 	if (val1 != val2) {
-		new_pc = static_cast<int32_t>(regs->getPC() + get_imm_B());
+		new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
 		regs->setPC(new_pc);
 	} else {
 		regs->incPC();
-		new_pc = static_cast<int32_t>(regs->getPC());
+		new_pc = static_cast<std::int32_t>(regs->getPC());
 	}
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -233,8 +233,8 @@ bool BASE_ISA::Exec_BLT() const {
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	if ((int32_t) regs->getValue(rs1) < (int32_t) regs->getValue(rs2)) {
-		new_pc = static_cast<int32_t>(regs->getPC() + get_imm_B());
+	if ( static_cast<std::int32_t>(regs->getValue(rs1)) < static_cast<std::int32_t>(regs->getValue(rs2)) ) {
+		new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
 		regs->setPC(new_pc);
 	} else {
 		regs->incPC();
@@ -242,8 +242,8 @@ bool BASE_ISA::Exec_BLT() const {
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BLT: x" << std::dec << rs1 << "(0x" << std::hex
-			<< (int32_t) regs->getValue(rs1) << ") < x" << std::dec << rs2
-			<< "(0x" << std::hex << (int32_t) regs->getValue(rs2)
+			<< static_cast<std::int32_t>(regs->getValue(rs1)) << ") < x" << std::dec << rs2
+			<< "(0x" << std::hex << static_cast<std::int32_t>(regs->getValue(rs2))
 			<< ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec
 			<< "\n";
 	}
@@ -258,8 +258,8 @@ bool BASE_ISA::Exec_BGE() const {
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	if ((int32_t) regs->getValue(rs1) >= (int32_t) regs->getValue(rs2)) {
-		new_pc = static_cast<int32_t>(regs->getPC() + get_imm_B());
+	if ( static_cast<std::int32_t>(regs->getValue(rs1)) >= static_cast<std::int32_t>( regs->getValue(rs2)) ) {
+		new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
 		regs->setPC(new_pc);
 	} else {
 		regs->incPC();
@@ -267,8 +267,8 @@ bool BASE_ISA::Exec_BGE() const {
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "BGE: x" << std::dec << rs1 << "(0x" << std::hex
-			<< (int32_t) regs->getValue(rs1) << ") > x" << std::dec << rs2
-			<< "(0x" << std::hex << (int32_t) regs->getValue(rs2)
+			<< static_cast<std::int32_t>(regs->getValue(rs1)) << ") > x" << std::dec << rs2
+			<< "(0x" << std::hex << static_cast<std::int32_t>(regs->getValue(rs2))
 			<< ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec
 			<< "\n";
 	}
@@ -283,12 +283,12 @@ bool BASE_ISA::Exec_BLTU() const {
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	if ((uint32_t) regs->getValue(rs1) < (uint32_t) regs->getValue(rs2)) {
-		new_pc = static_cast<int32_t>(regs->getPC() + get_imm_B());
+	if ( static_cast<std::uint32_t>(regs->getValue(rs1)) < static_cast<std::uint32_t>(regs->getValue(rs2)) ) {
+		new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
 		regs->setPC(new_pc);
 	} else {
 		regs->incPC();
-		new_pc = static_cast<int32_t>(regs->getPC());
+		new_pc = static_cast<std::int32_t>(regs->getPC());
 	}
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -308,8 +308,8 @@ bool BASE_ISA::Exec_BGEU() const {
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	if ((uint32_t) regs->getValue(rs1) >= (uint32_t) regs->getValue(rs2)) {
-		new_pc = static_cast<int32_t>(regs->getPC() + get_imm_B());
+	if ( static_cast<std::uint32_t>(regs->getValue(rs1)) >= static_cast<std::uint32_t>(regs->getValue(rs2)) ) {
+		new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
 		regs->setPC(new_pc);
 	} else {
 		regs->incPC();
@@ -326,17 +326,17 @@ bool BASE_ISA::Exec_BGEU() const {
 }
 
 bool BASE_ISA::Exec_LB() const {
-	uint32_t mem_addr ;
+	std::uint32_t mem_addr ;
 	int rd, rs1;
-	int32_t imm;
-	int8_t data;
+	std::int32_t imm;
+	std::int8_t data;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	imm = get_imm_I();
 
 	mem_addr = imm + regs->getValue(rs1);
-	data = static_cast<int8_t>(mem_intf->readDataMem(mem_addr, 1));
+	data = static_cast<std::int8_t>(mem_intf->readDataMem(mem_addr, 1));
 	perf->dataMemoryRead();
 	regs->setValue(rd, data);
 
@@ -349,9 +349,9 @@ bool BASE_ISA::Exec_LB() const {
 }
 
 bool BASE_ISA::Exec_LH() const {
-	uint32_t mem_addr ;
+	std::uint32_t mem_addr ;
 	int rd, rs1;
-	int32_t imm;
+	std::int32_t imm;
 	int16_t data;
 
 	rd = get_rd();
@@ -372,10 +372,10 @@ bool BASE_ISA::Exec_LH() const {
 }
 
 bool BASE_ISA::Exec_LW() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -384,7 +384,7 @@ bool BASE_ISA::Exec_LW() const {
 	mem_addr = imm + regs->getValue(rs1);
 	data = mem_intf->readDataMem(mem_addr, 4);
 	perf->dataMemoryRead();
-	regs->setValue(rd, static_cast<int32_t>(data));
+	regs->setValue(rd, static_cast<std::int32_t>(data));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "LW: x" << rs1 << "(0x" << std::hex
@@ -396,10 +396,10 @@ bool BASE_ISA::Exec_LW() const {
 }
 
 bool BASE_ISA::Exec_LBU() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1;
-	int32_t imm;
-	uint8_t data;
+	std::int32_t imm;
+	std::uint8_t data;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -408,7 +408,7 @@ bool BASE_ISA::Exec_LBU() const {
 	mem_addr = imm + regs->getValue(rs1);
 	data = mem_intf->readDataMem(mem_addr, 1);
 	perf->dataMemoryRead();
-	regs->setValue(rd, static_cast<int32_t>(data));
+	regs->setValue(rd, static_cast<std::int32_t>(data));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "LBU: x" << rs1 << " + " << imm << " (@0x"
@@ -418,9 +418,9 @@ bool BASE_ISA::Exec_LBU() const {
 }
 
 bool BASE_ISA::Exec_LHU() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1;
-	int32_t imm;
+	std::int32_t imm;
 	uint16_t data;
 
 	rd = get_rd();
@@ -443,10 +443,10 @@ bool BASE_ISA::Exec_LHU() const {
 }
 
 bool BASE_ISA::Exec_SB() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rs1, rs2;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rs1 = get_rs1();
 	rs2 = get_rs2();
@@ -468,10 +468,10 @@ bool BASE_ISA::Exec_SB() const {
 }
 
 bool BASE_ISA::Exec_SH() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rs1, rs2;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rs1 = get_rs1();
 	rs2 = get_rs2();
@@ -493,10 +493,10 @@ bool BASE_ISA::Exec_SH() const {
 }
 
 bool BASE_ISA::Exec_SW() const {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rs1, rs2;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rs1 = get_rs1();
 	rs2 = get_rs2();
@@ -518,14 +518,14 @@ bool BASE_ISA::Exec_SW() const {
 
 bool BASE_ISA::Exec_ADDI() const {
 	int rd, rs1;
-	int32_t imm;
-	int32_t calc;
+	std::int32_t imm;
+	std::int32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	imm = get_imm_I();
 
-	calc = static_cast<int32_t>(regs->getValue(rs1)) + imm;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) + imm;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -539,13 +539,13 @@ bool BASE_ISA::Exec_ADDI() const {
 
 bool BASE_ISA::Exec_SLTI() const {
 	int rd, rs1;
-	int32_t imm;
+	std::int32_t imm;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	imm = get_imm_I();
 
-	if (static_cast<int32_t>(regs->getValue(rs1)) < imm) {
+	if (static_cast<std::int32_t>(regs->getValue(rs1)) < imm) {
 		regs->setValue(rd, 1);
 		log->SC_log(Log::INFO) << "SLTI: x" << rs1 << " < " << imm << " => "
 				<< "1 -> x" << rd << "\n";
@@ -560,13 +560,13 @@ bool BASE_ISA::Exec_SLTI() const {
 
 bool BASE_ISA::Exec_SLTIU() const {
 	int rd, rs1;
-	int32_t imm;
+	std::int32_t imm;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	imm = get_imm_I();
 
-	if ((uint32_t) regs->getValue(rs1) < (uint32_t) imm) {
+	if (static_cast<std::uint32_t>(regs->getValue(rs1)) < static_cast<std::uint32_t>(imm)) {
 		regs->setValue(rd, 1);
 		log->SC_log(Log::INFO) << "SLTIU: x" << rs1 << " < " << imm << " => "
 				<< "1 -> x" << rd << "\n";
@@ -581,15 +581,15 @@ bool BASE_ISA::Exec_SLTIU() const {
 
 bool BASE_ISA::Exec_XORI() const {
 	int rd, rs1;
-	int32_t imm;
-	uint32_t calc;
+	std::int32_t imm;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	imm = get_imm_I();
 
 	calc = regs->getValue(rs1) ^ imm;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "XORI: x" << rs1 << " XOR " << imm << "-> x" << rd
@@ -601,15 +601,15 @@ bool BASE_ISA::Exec_XORI() const {
 
 bool BASE_ISA::Exec_ORI() const {
 	int rd, rs1;
-	int32_t imm;
-	uint32_t calc;
+	std::int32_t imm;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	imm = get_imm_I();
 
 	calc = regs->getValue(rs1) | imm;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ORI: x" << rs1 << " OR " << imm << "-> x" << rd
@@ -621,9 +621,9 @@ bool BASE_ISA::Exec_ORI() const {
 
 bool BASE_ISA::Exec_ANDI() const {
 	int rd, rs1;
-	uint32_t imm;
-	uint32_t calc;
-	uint32_t aux;
+	std::uint32_t imm;
+	std::uint32_t calc;
+	std::uint32_t aux;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -631,7 +631,7 @@ bool BASE_ISA::Exec_ANDI() const {
 
 	aux = regs->getValue(rs1);
 	calc = aux & imm;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ANDI: x" << rs1 << "(0x" << std::hex << aux
@@ -644,8 +644,8 @@ bool BASE_ISA::Exec_ANDI() const {
 
 bool BASE_ISA::Exec_SLLI() {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	uint32_t calc;
+	std::uint32_t shift;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -660,8 +660,8 @@ bool BASE_ISA::Exec_SLLI() {
 
 	shift = rs2 & 0x1F;
 
-	calc = ((uint32_t) regs->getValue(rs1)) << shift;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	calc = static_cast<std::uint32_t>(regs->getValue(rs1)) << shift;
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SLLI: x" << std::dec << rs1 << " << " << shift
@@ -673,8 +673,8 @@ bool BASE_ISA::Exec_SLLI() {
 
 bool BASE_ISA::Exec_SRLI() const {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	uint32_t calc;
+	std::uint32_t shift;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -682,8 +682,8 @@ bool BASE_ISA::Exec_SRLI() const {
 
 	shift = rs2 & 0x1F;
 
-	calc = ((uint32_t) regs->getValue(rs1)) >> shift;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	calc = static_cast<std::uint32_t>(regs->getValue(rs1)) >> shift;
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SRLI: x" << std::dec << rs1 << " >> " << shift
@@ -695,8 +695,8 @@ bool BASE_ISA::Exec_SRLI() const {
 
 bool BASE_ISA::Exec_SRAI() const {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	int32_t calc;
+	std::uint32_t shift;
+	std::int32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -704,7 +704,7 @@ bool BASE_ISA::Exec_SRAI() const {
 
 	shift = rs2 & 0x1F;
 
-	calc = static_cast<int32_t>(regs->getValue(rs1)) >> shift;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) >> shift;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -717,14 +717,14 @@ bool BASE_ISA::Exec_SRAI() const {
 
 bool BASE_ISA::Exec_ADD() const {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) + regs->getValue(rs2);
 
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "ADD: x" << std::dec << rs1 << " + x" << rs2
@@ -736,13 +736,13 @@ bool BASE_ISA::Exec_ADD() const {
 
 bool BASE_ISA::Exec_SUB() const {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) - regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SUB: x" << rs1 << " - x" << rs2 << " -> x" << rd
@@ -754,8 +754,8 @@ bool BASE_ISA::Exec_SUB() const {
 
 bool BASE_ISA::Exec_SLL() const {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	uint32_t calc;
+	std::uint32_t shift;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -763,8 +763,8 @@ bool BASE_ISA::Exec_SLL() const {
 
 	shift = regs->getValue(rs2) & 0x1F;
 
-	calc = ((uint32_t) regs->getValue(rs1)) << shift;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	calc = static_cast<std::uint32_t>(regs->getValue(rs1)) << shift;
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SLL: x" << rs1 << " << " << shift << " -> x"
@@ -801,7 +801,7 @@ bool BASE_ISA::Exec_SLTU() const {
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	if ((uint32_t) regs->getValue(rs1) < (uint32_t) regs->getValue(rs2)) {
+	if ( static_cast<std::uint32_t>(regs->getValue(rs1)) < static_cast<std::uint32_t>(regs->getValue(rs2)) ) {
 		regs->setValue(rd, 1);
 		log->SC_log(Log::INFO) << "SLTU: x" << rs1 << " < x" << rs2 << " => "
 				<< "1 -> x" << rd << "\n";
@@ -816,14 +816,14 @@ bool BASE_ISA::Exec_SLTU() const {
 
 bool BASE_ISA::Exec_XOR() const {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) ^ regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "XOR: x" << rs1 << " XOR x" << rs2 << "-> x" << rd
@@ -835,8 +835,8 @@ bool BASE_ISA::Exec_XOR() const {
 
 bool BASE_ISA::Exec_SRL() const {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	uint32_t calc;
+	std::uint32_t shift;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -844,8 +844,8 @@ bool BASE_ISA::Exec_SRL() const {
 
 	shift = regs->getValue(rs2) & 0x1F;
 
-	calc = ((uint32_t) regs->getValue(rs1)) >> shift;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	calc = static_cast<std::uint32_t>(regs->getValue(rs1)) >> shift;
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "SRL: x" << rs1 << " >> " << shift << " -> x"
@@ -857,8 +857,8 @@ bool BASE_ISA::Exec_SRL() const {
 
 bool BASE_ISA::Exec_SRA() const {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	int32_t calc;
+	std::uint32_t shift;
+	std::int32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -866,7 +866,7 @@ bool BASE_ISA::Exec_SRA() const {
 
 	shift = regs->getValue(rs2) & 0x1F;
 
-	calc = static_cast<int32_t>(regs->getValue(rs1)) >> shift;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) >> shift;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -879,14 +879,14 @@ bool BASE_ISA::Exec_SRA() const {
 
 bool BASE_ISA::Exec_OR() const {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) | regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "OR: x" << rs1 << " OR x" << rs2 << "-> x" << rd
@@ -898,14 +898,14 @@ bool BASE_ISA::Exec_OR() const {
 
 bool BASE_ISA::Exec_AND() const {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) & regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "AND: x" << rs1 << " AND x" << rs2 << "-> x" << rd
@@ -931,7 +931,7 @@ bool BASE_ISA::Exec_ECALL()  {
 	perf->dump();
 
 #if 0
-	uint32_t gp_value = regs->getValue(Registers::gp);
+	std::uint32_t gp_value = regs->getValue(Registers::gp);
 	if (gp_value == 1) {
 		std::cout << "GP value is 1, test result is OK" << "\n";
 	} else {
@@ -962,7 +962,7 @@ bool BASE_ISA::Exec_EBREAK() {
 bool BASE_ISA::Exec_CSRRW() const {
 	int rd, rs1;
 	int csr;
-	uint32_t aux;
+	std::uint32_t aux;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -971,7 +971,7 @@ bool BASE_ISA::Exec_CSRRW() const {
 	/* These operations must be atomical */
 	if (rd != 0) {
 		aux = regs->getCSR(csr);
-		regs->setValue(rd, static_cast<int32_t>(aux));
+		regs->setValue(rd, static_cast<std::int32_t>(aux));
 	}
 
 	aux = regs->getValue(rs1);
@@ -987,7 +987,7 @@ bool BASE_ISA::Exec_CSRRW() const {
 bool BASE_ISA::Exec_CSRRS() const {
 	int rd, rs1;
 	int csr;
-	uint32_t bitmask, aux, aux2;
+	std::uint32_t bitmask, aux, aux2;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -1003,7 +1003,7 @@ bool BASE_ISA::Exec_CSRRS() const {
 	aux = regs->getCSR(csr);
 	bitmask = regs->getValue(rs1);
 
-	regs->setValue(rd, static_cast<int32_t>(aux));
+	regs->setValue(rd, static_cast<std::int32_t>(aux));
 
 	aux2 = aux | bitmask;
 	regs->setCSR(csr, aux2);
@@ -1018,7 +1018,7 @@ bool BASE_ISA::Exec_CSRRS() const {
 bool BASE_ISA::Exec_CSRRC() const {
 	int rd, rs1;
 	int csr;
-	uint32_t bitmask, aux, aux2;
+	std::uint32_t bitmask, aux, aux2;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -1034,7 +1034,7 @@ bool BASE_ISA::Exec_CSRRC() const {
 	aux = regs->getCSR(csr);
 	bitmask = regs->getValue(rs1);
 
-	regs->setValue(rd, static_cast<int32_t>(aux));
+	regs->setValue(rd, static_cast<std::int32_t>(aux));
 
 	aux2 = aux & ~bitmask;
 	regs->setCSR(csr, aux2);
@@ -1049,7 +1049,7 @@ bool BASE_ISA::Exec_CSRRC() const {
 bool BASE_ISA::Exec_CSRRWI() const {
 	int rd, rs1;
 	int csr;
-	uint32_t aux;
+	std::uint32_t aux;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -1058,7 +1058,7 @@ bool BASE_ISA::Exec_CSRRWI() const {
 	/* These operations must be atomical */
 	if (rd != 0) {
 		aux = regs->getCSR(csr);
-		regs->setValue(rd, static_cast<int32_t>(aux));
+		regs->setValue(rd, static_cast<std::int32_t>(aux));
 	}
 	aux = rs1;
 	regs->setCSR(csr, aux);
@@ -1072,7 +1072,7 @@ bool BASE_ISA::Exec_CSRRWI() const {
 bool BASE_ISA::Exec_CSRRSI() const {
 	int rd, rs1;
 	int csr;
-	uint32_t bitmask, aux;
+	std::uint32_t bitmask, aux;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -1084,7 +1084,7 @@ bool BASE_ISA::Exec_CSRRSI() const {
 
 	/* These operations must be atomical */
 	aux = regs->getCSR(csr);
-	regs->setValue(rd, static_cast<int32_t>(aux));
+	regs->setValue(rd, static_cast<std::int32_t>(aux));
 
 	bitmask = rs1;
 	aux = aux | bitmask;
@@ -1100,7 +1100,7 @@ bool BASE_ISA::Exec_CSRRSI() const {
 bool BASE_ISA::Exec_CSRRCI() const {
 	int rd, rs1;
 	int csr;
-	uint32_t bitmask, aux;
+	std::uint32_t bitmask, aux;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -1112,7 +1112,7 @@ bool BASE_ISA::Exec_CSRRCI() const {
 
 	/* These operations must be atomical */
 	aux = regs->getCSR(csr);
-	regs->setValue(rd, static_cast<int32_t>(aux));
+	regs->setValue(rd, static_cast<std::int32_t>(aux));
 
 	bitmask = rs1;
 	aux = aux & ~bitmask;
@@ -1128,7 +1128,7 @@ bool BASE_ISA::Exec_CSRRCI() const {
 /*********************** Privileged Instructions ******************************/
 
 bool BASE_ISA::Exec_MRET() const {
-	uint32_t new_pc = 0;
+	std::uint32_t new_pc = 0;
 
 	new_pc = regs->getCSR(CSR_MEPC);
 	regs->setPC(new_pc);
@@ -1137,7 +1137,7 @@ bool BASE_ISA::Exec_MRET() const {
 			<< "\n";
 
 	// update mstatus
-	uint32_t csr_temp;
+	std::uint32_t csr_temp;
 	csr_temp = regs->getCSR(CSR_MSTATUS);
 	if (csr_temp & MSTATUS_MPIE) {
 		csr_temp |= MSTATUS_MIE;
@@ -1149,7 +1149,7 @@ bool BASE_ISA::Exec_MRET() const {
 }
 
 bool BASE_ISA::Exec_SRET() const {
-	uint32_t new_pc = 0;
+	std::uint32_t new_pc = 0;
 
 	new_pc = regs->getCSR(CSR_SEPC);
 	regs->setPC(new_pc);
diff --git a/src/CPU.cpp b/src/CPU.cpp
index 0925299..3fae725 100644
--- a/src/CPU.cpp
+++ b/src/CPU.cpp
@@ -8,7 +8,7 @@
 #include "CPU.h"
 
 SC_HAS_PROCESS(CPU);
-CPU::CPU(sc_core::sc_module_name const &name, uint32_t PC, bool debug) :
+CPU::CPU(sc_core::sc_module_name const &name, std::uint32_t PC, bool debug) :
 		sc_module(name), instr_bus("instr_bus"), default_time(10,
 				sc_core::SC_NS), INSTR(0) {
 	register_bank = new Registers();
@@ -64,7 +64,7 @@ CPU::~CPU() {
 }
 
 bool CPU::cpu_process_IRQ() {
-	uint32_t csr_temp;
+	std::uint32_t csr_temp;
 	bool ret_value = false;
 
 	if (interrupt) {
@@ -82,7 +82,7 @@ bool CPU::cpu_process_IRQ() {
 			log->SC_log(Log::DEBUG) << "Interrupt!" << std::endl;
 
 			/* updated MEPC register */
-			uint32_t old_pc = register_bank->getPC();
+			std::uint32_t old_pc = register_bank->getPC();
 			register_bank->setCSR(CSR_MEPC, old_pc);
 			log->SC_log(Log::INFO) << "Old PC Value 0x" << std::hex << old_pc
 					<< std::endl;
@@ -91,7 +91,7 @@ bool CPU::cpu_process_IRQ() {
 			register_bank->setCSR(CSR_MCAUSE, 0x80000000);
 
 			/* set new PC address */
-			uint32_t new_pc = register_bank->getCSR(CSR_MTVEC);
+			std::uint32_t new_pc = register_bank->getCSR(CSR_MTVEC);
 			//new_pc = new_pc & 0xFFFFFFFC; // last two bits always to 0
 			log->SC_log(Log::DEBUG) << "NEW PC Value 0x" << std::hex << new_pc
 					<< std::endl;
@@ -217,7 +217,7 @@ void CPU::call_interrupt(tlm::tlm_generic_payload &m_trans,
 		sc_core::sc_time &delay) {
 	interrupt = true;
 	/* Socket caller send a cause (its id) */
-	memcpy(&int_cause, m_trans.get_data_ptr(), sizeof(uint32_t));
+	memcpy(&int_cause, m_trans.get_data_ptr(), sizeof(std::uint32_t));
 	delay = sc_core::SC_ZERO_TIME;
 }
 
diff --git a/src/C_extension.cpp b/src/C_extension.cpp
index 5b5d681..d9a2e1f 100644
--- a/src/C_extension.cpp
+++ b/src/C_extension.cpp
@@ -147,14 +147,14 @@ op_C_Codes C_extension::decode() const {
 }
 
 bool C_extension::Exec_C_JR() {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rs1;
 	int new_pc;
 
 	rs1 = get_rs1();
 	mem_addr = 0;
 
-	new_pc = static_cast<int32_t>(static_cast<int32_t>((regs->getValue(rs1)) + static_cast<int32_t>(mem_addr)) & 0xFFFFFFFE);
+	new_pc = static_cast<std::int32_t>(static_cast<std::int32_t>((regs->getValue(rs1)) + static_cast<std::int32_t>(mem_addr)) & 0xFFFFFFFE);
 	regs->setPC(new_pc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -166,14 +166,14 @@ bool C_extension::Exec_C_JR() {
 
 bool C_extension::Exec_C_MV() {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rd();
 	rs1 = 0;
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) + regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.MV: x" << std::dec << rs1 << "(0x" << std::hex
@@ -187,14 +187,14 @@ bool C_extension::Exec_C_MV() {
 
 bool C_extension::Exec_C_ADD() {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rs1();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
 	calc = regs->getValue(rs1) + regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.ADD: x" << std::dec << rs1 << " + x" << rs2
@@ -205,10 +205,10 @@ bool C_extension::Exec_C_ADD() {
 }
 
 bool C_extension::Exec_C_LWSP() {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	// lw rd, offset[7:2](x2)
 
@@ -219,7 +219,7 @@ bool C_extension::Exec_C_LWSP() {
 	mem_addr = imm + regs->getValue(rs1);
 	data = mem_intf->readDataMem(mem_addr, 4);
 	perf->dataMemoryRead();
-	regs->setValue(rd, static_cast<int32_t>(data));
+	regs->setValue(rd, static_cast<std::int32_t>(data));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.LWSP: x" << std::dec << rs1 << " + " << imm
@@ -232,8 +232,8 @@ bool C_extension::Exec_C_LWSP() {
 
 bool C_extension::Exec_C_ADDI4SPN() {
 	int rd, rs1;
-	int32_t imm;
-	int32_t calc;
+	std::int32_t imm;
+	std::int32_t calc;
 
 	rd = get_rdp();
 	rs1 = 2;
@@ -244,7 +244,7 @@ bool C_extension::Exec_C_ADDI4SPN() {
 		return false;
 	}
 
-	calc = static_cast<int32_t>(regs->getValue(rs1)) + imm;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) + imm;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -259,17 +259,17 @@ bool C_extension::Exec_C_ADDI4SPN() {
 bool C_extension::Exec_C_ADDI16SP() {
 	// addi x2, x2, nzimm[9:4]
 	int rd;
-	int32_t imm;
+	std::int32_t imm;
 
 	if (get_rd() == 2) {
 	  int rs1;
-	  int32_t calc;
+	  std::int32_t calc;
 
 		rd = 2;
 		rs1 = 2;
 		imm = get_imm_ADDI16SP();
 
-		calc = static_cast<int32_t>(regs->getValue(rs1)) + imm;
+		calc = static_cast<std::int32_t>(regs->getValue(rs1)) + imm;
 		regs->setValue(rd, calc);
 
 		log->SC_log(Log::INFO) << std::dec << "C.ADDI16SP: x" << rs1 << " + "
@@ -289,10 +289,10 @@ bool C_extension::Exec_C_ADDI16SP() {
 
 bool C_extension::Exec_C_SWSP() {
 	// sw rs2, offset(x2)
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rs1, rs2;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rs1 = 2;
 	rs2 = get_rs2();
@@ -316,17 +316,17 @@ bool C_extension::Exec_C_SWSP() {
 bool C_extension::Exec_C_BEQZ() {
 	int rs1;
 	int new_pc;
-	uint32_t val1;
+	std::uint32_t val1;
 
 	rs1 = get_rs1p();
 	val1 = regs->getValue(rs1);
 
 	if (val1 == 0) {
-		new_pc = static_cast<int32_t>(regs->getPC()) + get_imm_CB();
+		new_pc = static_cast<std::int32_t>(regs->getPC()) + get_imm_CB();
 		regs->setPC(new_pc);
 	} else {
 		regs->incPCby2();
-		new_pc = static_cast<int32_t>(regs->getPC());
+		new_pc = static_cast<std::int32_t>(regs->getPC());
 	}
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -341,17 +341,17 @@ bool C_extension::Exec_C_BEQZ() {
 bool C_extension::Exec_C_BNEZ() {
 	int rs1;
 	int new_pc;
-	uint32_t val1;
+	std::uint32_t val1;
 
 	rs1 = get_rs1p();
 	val1 = regs->getValue(rs1);
 
 	if (val1 != 0) {
-		new_pc = static_cast<int32_t>(regs->getPC()) + get_imm_CB();
+		new_pc = static_cast<std::int32_t>(regs->getPC()) + get_imm_CB();
 		regs->setPC(new_pc);
 	} else {
 		regs->incPCby2(); //PC <- PC +2
-		new_pc = static_cast<int32_t>(regs->getPC());
+		new_pc = static_cast<std::int32_t>(regs->getPC());
 	}
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -365,14 +365,14 @@ bool C_extension::Exec_C_BNEZ() {
 
 bool C_extension::Exec_C_LI() {
 	int rd, rs1;
-	int32_t imm;
-	int32_t calc;
+	std::int32_t imm;
+	std::int32_t calc;
 
 	rd = get_rd();
 	rs1 = 0;
 	imm = get_imm_ADDI();
 
-	calc = static_cast<int32_t>(regs->getValue(rs1)) + imm;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) + imm;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -386,8 +386,8 @@ bool C_extension::Exec_C_LI() {
 
 bool C_extension::Exec_C_SRLI() {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	uint32_t calc;
+	std::uint32_t shift;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
@@ -395,8 +395,8 @@ bool C_extension::Exec_C_SRLI() {
 
 	shift = rs2 & 0x1F;
 
-	calc = ((uint32_t) regs->getValue(rs1)) >> shift;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	calc = static_cast<std::uint32_t>(regs->getValue(rs1)) >> shift;
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SRLI: x" << rs1 << " >> " << shift << " -> x"
@@ -408,8 +408,8 @@ bool C_extension::Exec_C_SRLI() {
 
 bool C_extension::Exec_C_SRAI() {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	int32_t calc;
+	std::uint32_t shift;
+	std::int32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
@@ -417,7 +417,7 @@ bool C_extension::Exec_C_SRAI() {
 
 	shift = rs2 & 0x1F;
 
-	calc = (int32_t) regs->getValue(rs1) >> shift;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) >> shift;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -430,8 +430,8 @@ bool C_extension::Exec_C_SRAI() {
 
 bool C_extension::Exec_C_SLLI() {
 	int rd, rs1, rs2;
-	uint32_t shift;
-	uint32_t calc;
+	std::uint32_t shift;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
@@ -439,8 +439,8 @@ bool C_extension::Exec_C_SLLI() {
 
 	shift = rs2 & 0x1F;
 
-	calc = ((uint32_t) regs->getValue(rs1)) << shift;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	calc = static_cast<std::uint32_t>(regs->getValue(rs1)) << shift;
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SLLI: x" << std::dec << rs1 << " << " << shift
@@ -452,9 +452,9 @@ bool C_extension::Exec_C_SLLI() {
 
 bool C_extension::Exec_C_ANDI() {
 	int rd, rs1;
-	uint32_t imm;
-	uint32_t aux;
-	uint32_t calc;
+	std::uint32_t imm;
+	std::uint32_t aux;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
@@ -462,7 +462,7 @@ bool C_extension::Exec_C_ANDI() {
 
 	aux = regs->getValue(rs1);
 	calc = aux & imm;
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.ANDI: x" << rs1 << "(" << aux << ") AND "
@@ -474,14 +474,14 @@ bool C_extension::Exec_C_ANDI() {
 
 bool C_extension::Exec_C_SUB() {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
 	rs2 = get_rs2p();
 
 	calc = regs->getValue(rs1) - regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.SUB: x" << std::dec << rs1 << " - x" << rs2
@@ -493,14 +493,14 @@ bool C_extension::Exec_C_SUB() {
 
 bool C_extension::Exec_C_XOR() {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
 	rs2 = get_rs2p();
 
 	calc = regs->getValue(rs1) ^ regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.XOR: x" << std::dec << rs1 << " XOR x" << rs2
@@ -512,14 +512,14 @@ bool C_extension::Exec_C_XOR() {
 
 bool C_extension::Exec_C_OR() {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
 	rs2 = get_rs2p();
 
 	calc = regs->getValue(rs1) | regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C_OR: x" << std::dec << rs1 << " OR x" << rs2
@@ -531,14 +531,14 @@ bool C_extension::Exec_C_OR() {
 
 bool C_extension::Exec_C_AND() {
 	int rd, rs1, rs2;
-	uint32_t calc;
+	std::uint32_t calc;
 
 	rd = get_rs1p();
 	rs1 = get_rs1p();
 	rs2 = get_rs2p();
 
 	calc = regs->getValue(rs1) & regs->getValue(rs2);
-	regs->setValue(rd, static_cast<int32_t>(calc));
+	regs->setValue(rd, static_cast<std::int32_t>(calc));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << "C.AND: x" << std::dec << rs1 << " AND x" << rs2
@@ -550,14 +550,14 @@ bool C_extension::Exec_C_AND() {
 
 bool C_extension::Exec_C_ADDI() const {
 	int rd, rs1;
-	int32_t imm;
-	int32_t calc;
+	std::int32_t imm;
+	std::int32_t calc;
 
 	rd = get_rd();
 	rs1 = rd;
 	imm = get_imm_ADDI();
 
-	calc = static_cast<int32_t>(regs->getValue(rs1)) + imm;
+	calc = static_cast<std::int32_t>(regs->getValue(rs1)) + imm;
 	regs->setValue(rd, calc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -570,17 +570,17 @@ bool C_extension::Exec_C_ADDI() const {
 }
 
 bool C_extension::Exec_C_JALR() {
-	uint32_t mem_addr = 0;
+	std::uint32_t mem_addr = 0;
 	int rd, rs1;
 	int new_pc, old_pc;
 
 	rd = 1;
 	rs1 = get_rs1();
 
-	old_pc = static_cast<int32_t>(regs->getPC());
+	old_pc = static_cast<std::int32_t>(regs->getPC());
 	regs->setValue(rd, old_pc + 2);
 
-	new_pc = static_cast<int32_t>((regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE);
+	new_pc = static_cast<std::int32_t>((regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE);
 	regs->setPC(new_pc);
 
 	if (log->getLogLevel() >= Log::INFO) {
@@ -593,10 +593,10 @@ bool C_extension::Exec_C_JALR() {
 }
 
 bool C_extension::Exec_C_LW() {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rd, rs1;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rd = get_rdp();
 	rs1 = get_rs1p();
@@ -605,7 +605,7 @@ bool C_extension::Exec_C_LW() {
 	mem_addr = imm + regs->getValue(rs1);
 	data = mem_intf->readDataMem(mem_addr, 4);
 	perf->dataMemoryRead();
-	regs->setValue(rd, static_cast<int32_t>(data));
+	regs->setValue(rd, static_cast<std::int32_t>(data));
 
 	if (log->getLogLevel() >= Log::INFO) {
 		log->SC_log(Log::INFO) << std::dec << "C.LW: x" << rs1 << "(0x" << std::hex
@@ -618,10 +618,10 @@ bool C_extension::Exec_C_LW() {
 }
 
 bool C_extension::Exec_C_SW() {
-	uint32_t mem_addr;
+	std::uint32_t mem_addr;
 	int rs1, rs2;
-	int32_t imm;
-	uint32_t data;
+	std::int32_t imm;
+	std::uint32_t data;
 
 	rs1 = get_rs1p();
 	rs2 = get_rs2p();
@@ -643,13 +643,13 @@ bool C_extension::Exec_C_SW() {
 }
 
 bool C_extension::Exec_C_JAL(int m_rd) {
-	int32_t mem_addr;
+	std::int32_t mem_addr;
 	int rd;
 	int new_pc, old_pc;
 
 	rd = m_rd;
 	mem_addr = get_imm_J();
-	old_pc = static_cast<int32_t>(regs->getPC());
+	old_pc = static_cast<std::int32_t>(regs->getPC());
 
 	new_pc = old_pc + mem_addr;
 	regs->setPC(new_pc);
diff --git a/src/Instruction.cpp b/src/Instruction.cpp
index dbe019e..b442137 100644
--- a/src/Instruction.cpp
+++ b/src/Instruction.cpp
@@ -8,7 +8,7 @@
 
 #include "Instruction.h"
 
-Instruction::Instruction(uint32_t instr) {
+Instruction::Instruction(std::uint32_t instr) {
 	m_instr = instr;
 }
 
diff --git a/src/M_extension.cpp b/src/M_extension.cpp
index b8cd7ba..0c9251e 100644
--- a/src/M_extension.cpp
+++ b/src/M_extension.cpp
@@ -45,19 +45,19 @@ op_M_Codes M_extension::decode() const {
 
 bool M_extension::Exec_M_MUL() const {
 	int rd, rs1, rs2;
-	int32_t multiplier, multiplicand;
-	int64_t result;
+	std::int32_t multiplier, multiplicand;
+	std::int64_t result;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	multiplier = static_cast<int32_t>(regs->getValue(rs1));
-	multiplicand = static_cast<int32_t>(regs->getValue(rs2));
+	multiplier = static_cast<std::int32_t>(regs->getValue(rs1));
+	multiplicand = static_cast<std::int32_t>(regs->getValue(rs2));
 
-	result = (int64_t) multiplier * multiplicand;
+	result = static_cast<std::int64_t>(multiplier * multiplicand);
 	result = result & 0x00000000FFFFFFFF;
-	regs->setValue(rd, static_cast<int32_t>(result));
+	regs->setValue(rd, static_cast<std::int32_t>(result));
 
 	log->SC_log(Log::INFO) << std::dec << "MUL: x" << rs1 << " * x" << rs2
 			<< " -> x" << rd << "(" << result << ")" << "\n";
@@ -67,20 +67,20 @@ bool M_extension::Exec_M_MUL() const {
 
 bool M_extension::Exec_M_MULH() const {
 	int rd, rs1, rs2;
-	int32_t multiplier, multiplicand;
-	int64_t result;
-	int32_t ret_value;
+	std::int32_t multiplier, multiplicand;
+	std::int64_t result;
+	std::int32_t ret_value;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	multiplier = static_cast<int32_t>(regs->getValue(rs1));
-	multiplicand = static_cast<int32_t>(regs->getValue(rs2));
+	multiplier = static_cast<std::int32_t>(regs->getValue(rs1));
+	multiplicand = static_cast<std::int32_t>(regs->getValue(rs2));
 
-	result = (int64_t) multiplier * (int64_t) multiplicand;
+	result = static_cast<std::int64_t>(multiplier) * static_cast<std::int64_t>(multiplicand);
 
-	ret_value = (int32_t) ((result >> 32) & 0x00000000FFFFFFFF);
+	ret_value = static_cast<std::int32_t>((result >> 32) & 0x00000000FFFFFFFF);
 	regs->setValue(rd, ret_value);
 
 	log->SC_log(Log::INFO) << std::dec << "MULH: x" << rs1 << " * x" << rs2
@@ -91,20 +91,20 @@ bool M_extension::Exec_M_MULH() const {
 
 bool M_extension::Exec_M_MULHSU() const {
 	int rd, rs1, rs2;
-	int32_t multiplier;
-	uint32_t multiplicand;
-	int64_t result;
+	std::int32_t multiplier;
+	std::uint32_t multiplicand;
+	std::int64_t result;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	multiplier = static_cast<int32_t>(regs->getValue(rs1));
+	multiplier = static_cast<std::int32_t>(regs->getValue(rs1));
 	multiplicand = regs->getValue(rs2);
 
-	result = static_cast<int64_t>(multiplier * (uint64_t) multiplicand);
+	result = static_cast<std::int64_t>(multiplier * static_cast<std::uint64_t>(multiplicand));
 	result = (result >> 32) & 0x00000000FFFFFFFF;
-	regs->setValue(rd, static_cast<int32_t>(result));
+	regs->setValue(rd, static_cast<std::int32_t>(result));
 
 	log->SC_log(Log::INFO) << std::dec << "MULHSU: x" << rs1 << " * x" << rs2
 			<< " -> x" << rd << "(" << result << ")" << "\n";
@@ -114,19 +114,19 @@ bool M_extension::Exec_M_MULHSU() const {
 
 bool M_extension::Exec_M_MULHU() const {
 	int rd, rs1, rs2;
-	uint32_t multiplier, multiplicand;
-	uint64_t result;
-	int32_t ret_value;
+	std::uint32_t multiplier, multiplicand;
+	std::uint64_t result;
+	std::int32_t ret_value;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	multiplier =  static_cast<int32_t>(regs->getValue(rs1));
-	multiplicand = static_cast<int32_t>(regs->getValue(rs2));
+	multiplier =  static_cast<std::int32_t>(regs->getValue(rs1));
+	multiplicand = static_cast<std::int32_t>(regs->getValue(rs2));
 
-	result = (uint64_t) multiplier * (uint64_t) multiplicand;
-	ret_value = static_cast<int32_t>((result >> 32) & 0x00000000FFFFFFFF);
+	result = static_cast<std::uint64_t>(multiplier) * static_cast<std::uint64_t>(multiplicand);
+	ret_value = static_cast<std::int32_t>((result >> 32) & 0x00000000FFFFFFFF);
 	regs->setValue(rd, ret_value);
 
 	log->SC_log(Log::INFO) << std::dec << "MULHU: x" << rs1 << " * x" << rs2
@@ -137,26 +137,26 @@ bool M_extension::Exec_M_MULHU() const {
 
 bool M_extension::Exec_M_DIV() const {
 	int rd, rs1, rs2;
-	int32_t divisor, dividend;
-	int64_t result;
+	std::int32_t divisor, dividend;
+	std::int64_t result;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	dividend = static_cast<int32_t>(regs->getValue(rs1));
-	divisor = static_cast<int32_t>(regs->getValue(rs2));
+	dividend = static_cast<std::int32_t>(regs->getValue(rs1));
+	divisor = static_cast<std::int32_t>(regs->getValue(rs2));
 
 	if (divisor == 0) {
 		result = -1;
-	} else if ((divisor == -1) && (dividend == (int32_t) 0x80000000)) {
+	} else if ((divisor == -1) && (dividend == static_cast<std::int32_t>(0x80000000)) ) {
 		result = 0x0000000080000000;
 	} else {
 		result = dividend / divisor;
 		result = result & 0x00000000FFFFFFFF;
 	}
 
-	regs->setValue(rd, static_cast<int32_t>(result));
+	regs->setValue(rd, static_cast<std::int32_t>(result));
 
 	log->SC_log(Log::INFO) << std::dec << "DIV: x" << rs1 << " / x" << rs2
 			<< " -> x" << rd << "(" << result << ")" << "\n";
@@ -166,8 +166,8 @@ bool M_extension::Exec_M_DIV() const {
 
 bool M_extension::Exec_M_DIVU() const {
 	int rd, rs1, rs2;
-	uint32_t divisor, dividend;
-	uint64_t result;
+	std::uint32_t divisor, dividend;
+	std::uint64_t result;
 
 	rd = get_rd();
 	rs1 = get_rs1();
@@ -183,7 +183,7 @@ bool M_extension::Exec_M_DIVU() const {
 		result = result & 0x00000000FFFFFFFF;
 	}
 
-	regs->setValue(rd, static_cast<int32_t>(result));
+	regs->setValue(rd, static_cast<std::int32_t>(result));
 
 	log->SC_log(Log::INFO) << std::dec << "DIVU: x" << rs1 << " / x" << rs2
 			<< " -> x" << rd << "(" << result << ")" << "\n";
@@ -193,19 +193,19 @@ bool M_extension::Exec_M_DIVU() const {
 
 bool M_extension::Exec_M_REM() const {
 	int rd, rs1, rs2;
-	int32_t divisor, dividend;
-	int32_t result;
+	std::int32_t divisor, dividend;
+	std::int32_t result;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	dividend = static_cast<int32_t>(regs->getValue(rs1));
-	divisor = static_cast<int32_t>(regs->getValue(rs2));
+	dividend = static_cast<std::int32_t>(regs->getValue(rs1));
+	divisor = static_cast<std::int32_t>(regs->getValue(rs2));
 
 	if (divisor == 0) {
 		result = dividend;
-	} else if ((divisor == -1) && (dividend == (int32_t) 0x80000000)) {
+	} else if ((divisor == -1) && (dividend == static_cast<std::int32_t>(0x80000000)) ) {
 		result = 0;
 	} else {
 		result = dividend % divisor;
@@ -221,15 +221,15 @@ bool M_extension::Exec_M_REM() const {
 
 bool M_extension::Exec_M_REMU() const {
 	int rd, rs1, rs2;
-	uint32_t divisor, dividend;
-	uint32_t result;
+	std::uint32_t divisor, dividend;
+	std::uint32_t result;
 
 	rd = get_rd();
 	rs1 = get_rs1();
 	rs2 = get_rs2();
 
-	dividend = static_cast<int32_t>(regs->getValue(rs1));
-	divisor = static_cast<int32_t>(regs->getValue(rs2));
+	dividend = static_cast<std::int32_t>(regs->getValue(rs1));
+	divisor = static_cast<std::int32_t>(regs->getValue(rs2));
 
 	if (divisor == 0) {
 		result = dividend;
@@ -237,7 +237,7 @@ bool M_extension::Exec_M_REMU() const {
 		result = dividend % divisor;
 	}
 
-	regs->setValue(rd, static_cast<int32_t>(result));
+	regs->setValue(rd, static_cast<std::int32_t>(result));
 
 	log->SC_log(Log::INFO) << std::dec << "REMU: x" << rs1 << " / x" << rs2
 			<< " -> x" << rd << "(" << result << ")" << "\n";
diff --git a/src/MemoryInterface.cpp b/src/MemoryInterface.cpp
index efaa77b..2dd3e2c 100644
--- a/src/MemoryInterface.cpp
+++ b/src/MemoryInterface.cpp
@@ -18,8 +18,8 @@ MemoryInterface::MemoryInterface() :
  * @param size size of the data to read in bytes
  * @return data value read
  */
-uint32_t MemoryInterface::readDataMem(uint32_t addr, int size) {
-	uint32_t data;
+std::uint32_t MemoryInterface::readDataMem(std::uint32_t addr, int size) {
+	std::uint32_t data;
 	tlm::tlm_generic_payload trans;
 	sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
 
@@ -47,7 +47,7 @@ uint32_t MemoryInterface::readDataMem(uint32_t addr, int size) {
  * @param data data to write
  * @param size size of the data to write in bytes
  */
-void MemoryInterface::writeDataMem(uint32_t addr, uint32_t data, int size) {
+void MemoryInterface::writeDataMem(std::uint32_t addr, std::uint32_t data, int size) {
 	tlm::tlm_generic_payload trans;
 	sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
 
diff --git a/src/Registers.cpp b/src/Registers.cpp
index ce46e5e..7589f4e 100644
--- a/src/Registers.cpp
+++ b/src/Registers.cpp
@@ -96,56 +96,56 @@ void Registers::dump() {
 	std::cout << "************************************" << std::endl;
 }
 
-void Registers::setValue(int reg_num, int32_t value) {
+void Registers::setValue(int reg_num, std::int32_t value) {
 	if ((reg_num != 0) && (reg_num < 32)) {
 		register_bank[reg_num] = value;
 		perf->registerWrite();
 	}
 }
 
-uint32_t Registers::getValue(int reg_num) const {
+std::uint32_t Registers::getValue(int reg_num) const {
 	if ((reg_num >= 0) && (reg_num < 32)) {
 		perf->registerRead();
 		return register_bank[reg_num];
 	} else {
-		return static_cast<int32_t>(0xFFFFFFFF);
+		return static_cast<std::int32_t>(0xFFFFFFFF);
 	}
 }
 
-uint32_t Registers::getPC() const {
+std::uint32_t Registers::getPC() const {
 	return register_PC;
 }
 
-void Registers::setPC(uint32_t new_pc) {
+void Registers::setPC(std::uint32_t new_pc) {
 	register_PC = new_pc;
 }
 
-uint32_t Registers::getCSR(const int csr)  {
-	uint32_t ret_value;
+std::uint32_t Registers::getCSR(const int csr)  {
+    std::uint32_t ret_value;
 
 	switch (csr) {
 	case CSR_CYCLE:
 	case CSR_MCYCLE:
-		ret_value = (uint64_t) (sc_core::sc_time(
+		ret_value = static_cast<std::uint64_t>(sc_core::sc_time(
 				sc_core::sc_time_stamp()
 						- sc_core::sc_time(sc_core::SC_ZERO_TIME)).to_double())
 				& 0x00000000FFFFFFFF;
 		break;
 	case CSR_CYCLEH:
 	case CSR_MCYCLEH:
-		ret_value = (uint32_t) ((uint64_t) (sc_core::sc_time(
+		ret_value = static_cast<std::uint32_t>((std::uint64_t) (sc_core::sc_time(
 				sc_core::sc_time_stamp()
 						- sc_core::sc_time(sc_core::SC_ZERO_TIME)).to_double())
 				>> 32 & 0x00000000FFFFFFFF);
 		break;
 	case CSR_TIME:
-		ret_value = (uint64_t) (sc_core::sc_time(
+		ret_value = static_cast<std::uint64_t>(sc_core::sc_time(
 				sc_core::sc_time_stamp()
 						- sc_core::sc_time(sc_core::SC_ZERO_TIME)).to_double())
 				& 0x00000000FFFFFFFF;
 		break;
 	case CSR_TIMEH:
-		ret_value = (uint32_t) ((uint64_t) (sc_core::sc_time(
+		ret_value = static_cast<std::uint32_t>((std::uint64_t) (sc_core::sc_time(
 				sc_core::sc_time_stamp()
 						- sc_core::sc_time(sc_core::SC_ZERO_TIME)).to_double())
 				>> 32 & 0x00000000FFFFFFFF);
@@ -157,7 +157,7 @@ uint32_t Registers::getCSR(const int csr)  {
 	return ret_value;
 }
 
-void Registers::setCSR(int csr, uint32_t value) {
+void Registers::setCSR(int csr, std::uint32_t value) {
 	/* @FIXME: rv32mi-p-ma_fetch tests doesn't allow MISA to be writable,
 	 * but Volume II: Privileged Architecture v1.10 says MISA is writable (?)
 	 */
diff --git a/src/Simulator.cpp b/src/Simulator.cpp
index 62aa1bf..b5fe749 100644
--- a/src/Simulator.cpp
+++ b/src/Simulator.cpp
@@ -12,6 +12,7 @@
 #include <csignal>
 #include <unistd.h>
 #include <chrono>
+#include <cstdint>
 
 #include "CPU.h"
 #include "Memory.h"
@@ -42,7 +43,7 @@ public:
 	Timer *timer;
 
 	explicit Simulator(sc_core::sc_module_name const &name): sc_module(name) {
-		uint32_t start_PC;
+		std::uint32_t start_PC;
 
 		MainMemory = new Memory("Main_Memory", filename);
 		start_PC = MainMemory->getPCfromHEX();
@@ -84,7 +85,7 @@ private:
         tlm::tlm_generic_payload trans;
         tlm::tlm_dmi dmi_data;
         sc_core::sc_time delay;
-        uint32_t data[4];
+        std::uint32_t data[4];
 
         trans.set_command(tlm::TLM_READ_COMMAND);
         trans.set_data_ptr(reinterpret_cast<unsigned char*>(data));
diff --git a/src/Timer.cpp b/src/Timer.cpp
index a76711b..b0c93b1 100644
--- a/src/Timer.cpp
+++ b/src/Timer.cpp
@@ -6,6 +6,7 @@
  */
 // SPDX-License-Identifier: GPL-3.0-or-later
 
+#include <cstdint>
 #include "Timer.h"
 
 SC_HAS_PROCESS(Timer);
@@ -21,7 +22,7 @@ Timer::Timer(sc_core::sc_module_name const &name) :
 
 	auto *irq_trans = new tlm::tlm_generic_payload;
 	sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
-	uint32_t cause = 1 << 31 | 0x07;	 // Machine timer interrupt
+    std::uint32_t cause = 1 << 31 | 0x07;	 // Machine timer interrupt
 	irq_trans->set_command(tlm::TLM_WRITE_COMMAND);
 	irq_trans->set_data_ptr(reinterpret_cast<unsigned char*>(&cause));
 	irq_trans->set_data_length(4);
@@ -46,7 +47,7 @@ void Timer::b_transport(tlm::tlm_generic_payload &trans,
 	unsigned int len = trans.get_data_length();
 	delay = sc_core::SC_ZERO_TIME;
 
-	uint32_t aux_value = 0;
+    std::uint32_t aux_value = 0;
 
 
 	if (cmd == tlm::TLM_WRITE_COMMAND) {
@@ -64,7 +65,7 @@ void Timer::b_transport(tlm::tlm_generic_payload &trans,
 		case TIMERCMP_MEMORY_ADDRESS_HI:
 			m_mtimecmp.range(63, 32) = aux_value;
 
-			uint64_t notify_time;
+            std::uint64_t notify_time;
 			// notify needs relative time, mtimecmp works in absolute time
 			notify_time = m_mtimecmp - m_mtime;
 
diff --git a/src/extension_base.cpp b/src/extension_base.cpp
index 2c8abb6..8788d39 100644
--- a/src/extension_base.cpp
+++ b/src/extension_base.cpp
@@ -18,7 +18,7 @@ extension_base::extension_base(const sc_dt::sc_uint<32>  & instr,
 
 extension_base::~extension_base() =default;
 
-void extension_base::setInstr(uint32_t p_instr) {
+void extension_base::setInstr(std::uint32_t p_instr) {
 	m_instr = sc_dt::sc_uint<32>(p_instr);
 }
 
@@ -26,8 +26,8 @@ void extension_base::dump() const {
 	std::cout << std::hex << "0x" << m_instr << std::dec << std::endl;
 }
 
-void extension_base::RaiseException(uint32_t cause, uint32_t inst) {
-	uint32_t new_pc, current_pc, m_cause;
+void extension_base::RaiseException(std::uint32_t cause, std::uint32_t inst) {
+	std::uint32_t new_pc, current_pc, m_cause;
 
 	current_pc = regs->getPC();
 	m_cause = regs->getCSR(CSR_MSTATUS);