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risc-v-tlm
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some methods now are const, reference class parameters, other minor changes

This commit is contained in:
mariusmonton 2021-01-23 11:44:10 +01:00
parent cb63c65d7f
commit a48e552926
20 changed files with 45 additions and 50 deletions
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2
inc/Instruction.h
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@ -41,7 +41,7 @@ public:
* @brief returns what instruction extension
* @return extension
*/
extension_t check_extension();
extension_t check_extension() const;
void setInstr(uint32_t p_instr) {
m_instr = p_instr;

4
inc/Log.h
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@ -40,7 +40,7 @@ public:
* @param msg mesasge string
* @param level level of the log (LogLevel)
*/
void SC_log(std::string msg, enum LogLevel level);
void SC_log(const std::string& msg, enum LogLevel level);
/**
* @brief method to log some string
@ -64,7 +64,7 @@ public:
* @brief Returns log level
* @return Current log level
*/
enum LogLevel getLogLevel();
enum LogLevel getLogLevel() const;
private:
static Log *instance;

6
inc/Memory.h
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@ -35,8 +35,8 @@ public:
};
const sc_core::sc_time LATENCY;
Memory(sc_core::sc_module_name name, std::string filename);
Memory(sc_core::sc_module_name name);
Memory(sc_core::sc_module_name const &name, std::string const &filename);
Memory(const sc_core::sc_module_name& name);
~Memory(void);
@ -83,6 +83,6 @@ private:
* @brief Read Intel hex file
* @param filename file name to read
*/
void readHexFile(std::string filename);
void readHexFile(const std::string& filename);
};
#endif /* __MEMORY_H__ */

2
inc/Performance.h
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@ -81,7 +81,7 @@ public:
/**
* @brief Dump counters to cout
*/
void dump();
void dump() const;
private:
static Performance *instance;

2
inc/Registers.h
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@ -203,7 +203,7 @@ public:
* Returns PC value
* @return PC value
*/
uint32_t getPC();
uint32_t getPC() const;
/**
* Sets arbitraty value to PC

2
inc/Timer.h
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@ -39,7 +39,7 @@ public:
* @brief Constructor
* @param name module name
*/
Timer(sc_core::sc_module_name name);
Timer(sc_core::sc_module_name const &name);
/**
* @brief Waits for event timer_event and triggers an IRQ

4
inc/Trace.h
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@ -36,7 +36,7 @@ public:
* @brief Constructor
* @param name Module name
*/
Trace(sc_core::sc_module_name name);
Trace(sc_core::sc_module_name const &name);
/**
* @brief Destructor
@ -49,7 +49,7 @@ private:
virtual void b_transport(tlm::tlm_generic_payload &trans,
sc_core::sc_time &delay);
void xtermLaunch(char *slaveName);
void xtermLaunch(char *slaveName) const;
void xtermKill(const char *mess);
void xtermSetup(void);

1
src/A_extension.cpp
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@ -355,7 +355,6 @@ bool A_extension::Exec_A_AMOMAXU() const {
void A_extension::TLB_reserve(uint32_t address) {
TLB_A_Entries.insert(address);
return;
}
bool A_extension::TLB_reserved(uint32_t address) {

2
src/BusCtrl.cpp
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@ -9,7 +9,7 @@
#include "BusCtrl.h"
SC_HAS_PROCESS(BusCtrl);
BusCtrl::BusCtrl(sc_core::sc_module_name name) :
BusCtrl::BusCtrl(sc_core::sc_module_name const name) :
sc_module(name), cpu_instr_socket("cpu_instr_socket"), cpu_data_socket(
"cpu_data_socket"), memory_socket("memory_socket"), trace_socket(
"trace_socket") {

4
src/CPU.cpp
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@ -9,7 +9,7 @@
#include "CPU.h"
SC_HAS_PROCESS(CPU);
CPU::CPU(sc_core::sc_module_name name, uint32_t PC) :
CPU::CPU(sc_core::sc_module_name const name, uint32_t PC) :
sc_module(name), instr_bus("instr_bus"), default_time(10,
sc_core::SC_NS) {
register_bank = new Registers();
@ -119,7 +119,7 @@ void CPU::CPU_thread(void) {
bool PC_not_affected = false;
bool incPCby2 = false;
tlm::tlm_dmi dmi_data;
unsigned char *dmi_ptr = NULL;
unsigned char *dmi_ptr = nullptr;
trans->set_command(tlm::TLM_READ_COMMAND);
trans->set_data_ptr(reinterpret_cast<unsigned char*>(&INSTR));

2
src/Instruction.cpp
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@ -12,7 +12,7 @@ Instruction::Instruction(uint32_t instr) {
m_instr = instr;
}
extension_t Instruction::check_extension() {
extension_t Instruction::check_extension() const {
if (((m_instr & 0x0000007F) == 0b0110011)
&& ( ((m_instr & 0x7F000000) >> 25) == 0b0000001)) {
return M_EXTENSION;

8
src/Log.cpp
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@ -9,7 +9,7 @@
#include "Log.h"
Log* Log::getInstance() {
if (instance == 0) {
if (instance == nullptr) {
instance = new Log("Log.txt");
}
@ -21,7 +21,7 @@ Log::Log(const char *filename) {
currentLogLevel = Log::INFO;
}
void Log::SC_log(std::string msg, enum LogLevel level) {
void Log::SC_log(std::string const& msg, enum LogLevel level) {
if (level <= currentLogLevel) {
m_stream << "time " << sc_core::sc_time_stamp() << ": " << msg
@ -45,8 +45,8 @@ void Log::setLogLevel(enum LogLevel newLevel) {
currentLogLevel = newLevel;
}
enum Log::LogLevel Log::getLogLevel() {
enum Log::LogLevel Log::getLogLevel() const {
return currentLogLevel;
}
Log *Log::instance = 0;
Log *Log::instance = nullptr;

12
src/Memory.cpp
View File

@ -9,7 +9,7 @@
#include "Memory.h"
SC_HAS_PROCESS(Memory);
Memory::Memory(sc_core::sc_module_name name, std::string filename) :
Memory::Memory(sc_core::sc_module_name const &name, std::string const &filename) :
sc_module(name), socket("socket"), LATENCY(sc_core::SC_ZERO_TIME) {
// Register callbacks for incoming interface method calls
socket.register_b_transport(this, &Memory::b_transport);
@ -26,7 +26,7 @@ Memory::Memory(sc_core::sc_module_name name, std::string filename) :
log->SC_log(Log::INFO) << "Using file: " << filename << std::endl;
}
Memory::Memory(sc_core::sc_module_name name) :
Memory::Memory(sc_core::sc_module_name const& name) :
sc_module(name), socket("socket"), LATENCY(sc_core::SC_ZERO_TIME) {
socket.register_b_transport(this, &Memory::b_transport);
socket.register_get_direct_mem_ptr(this, &Memory::get_direct_mem_ptr);
@ -70,7 +70,7 @@ void Memory::b_transport(tlm::tlm_generic_payload &trans,
trans.set_response_status(tlm::TLM_ADDRESS_ERROR_RESPONSE);
return;
}
if (byt != 0) {
if (byt != nullptr) {
trans.set_response_status(tlm::TLM_BYTE_ENABLE_ERROR_RESPONSE);
return;
}
@ -144,7 +144,7 @@ unsigned int Memory::transport_dbg(tlm::tlm_generic_payload &trans) {
return num_bytes;
}
void Memory::readHexFile(std::string filename) {
void Memory::readHexFile(std::string const& filename) {
std::ifstream hexfile;
std::string line;
@ -159,8 +159,8 @@ void Memory::readHexFile(std::string filename) {
/* Data */
int byte_count;
uint32_t address;
byte_count = stol(line.substr(1, 2), nullptr, 16);
address = stol(line.substr(3, 4), nullptr, 16);
byte_count = std::stoi(line.substr(1, 2), nullptr, 16);
address = std::stoi(line.substr(3, 4), nullptr, 16);
address = address + extended_address;
//cout << "00 address 0x" << hex << address << endl;
for (int i = 0; i < byte_count; i++) {

2
src/MemoryInterface.cpp
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@ -29,7 +29,7 @@ uint32_t MemoryInterface::readDataMem(uint32_t addr, int size) {
trans.set_data_ptr(reinterpret_cast<unsigned char*>(&data));
trans.set_data_length(size);
trans.set_streaming_width(4); // = data_length to indicate no streaming
trans.set_byte_enable_ptr(0); // 0 indicates unused
trans.set_byte_enable_ptr(nullptr); // 0 indicates unused
trans.set_dmi_allowed(false); // Mandatory initial value
trans.set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
trans.set_address(addr);

6
src/Performance.cpp
View File

@ -9,7 +9,7 @@
#include "Performance.h"
Performance* Performance::getInstance() {
if (instance == 0) {
if (instance == nullptr) {
instance = new Performance();
}
@ -26,7 +26,7 @@ Performance::Performance() {
instructions_executed = 0;
}
void Performance::dump() {
void Performance::dump() const {
std::cout << std::dec << "# data memory reads: " << data_memory_read
<< std::endl;
std::cout << "# data memory writes: " << data_memory_write << std::endl;
@ -38,4 +38,4 @@ void Performance::dump() {
<< std::endl;
}
Performance *Performance::instance = 0;
Performance *Performance::instance = nullptr;

2
src/Registers.cpp
View File

@ -116,7 +116,7 @@ int32_t Registers::getValue(int reg_num) {
}
}
uint32_t Registers::getPC() {
uint32_t Registers::getPC() const {
return register_PC;
}

2
src/Simulator.cpp
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@ -92,7 +92,7 @@ void process_arguments(int argc, char *argv[]) {
while ((c = getopt(argc, argv, "D:f:?")) != -1) {
switch (c) {
case 'D':
debug_level = atoi(optarg);
debug_level = std::atoi(optarg);
switch (debug_level) {
case 3:

2
src/Timer.cpp
View File

@ -9,7 +9,7 @@
#include "Timer.h"
SC_HAS_PROCESS(Timer);
Timer::Timer(sc_core::sc_module_name name) :
Timer::Timer(sc_core::sc_module_name const &name) :
sc_module(name), socket("timer_socket"), m_mtime(0), m_mtimecmp(0) {
socket.register_b_transport(this, &Timer::b_transport);

25
src/Trace.cpp
View File

@ -6,16 +6,13 @@
*/
// SPDX-License-Identifier: GPL-3.0-or-later
#include <stdio.h>
#include <fstream>
#include <cstdio>
#include <iostream>
#include <termios.h>
#include <stdlib.h>
#include <cstdlib>
#include <unistd.h>
#include <fcntl.h>
#include <string.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <cstring>
#include <sys/wait.h>
// Code partially taken from
@ -23,11 +20,11 @@
#include "Trace.h"
void Trace::xtermLaunch(char *slaveName) {
void Trace::xtermLaunch(char *slaveName) const {
char *arg;
char *fin = &(slaveName[strlen(slaveName) - 2]);
if ( NULL == strchr(fin, '/')) {
if ( nullptr == strchr(fin, '/')) {
arg = new char[2 + 1 + 1 + 20 + 1];
sprintf(arg, "-S%c%c%d", fin[0], fin[1], ptMaster);
} else {
@ -39,7 +36,7 @@ void Trace::xtermLaunch(char *slaveName) {
char *argv[3];
argv[0] = (char*) ("xterm");
argv[1] = arg;
argv[2] = NULL;
argv[2] = nullptr;
execvp("xterm", argv);
}
@ -58,10 +55,10 @@ void Trace::xtermKill(const char *mess) {
if (xtermPid > 0) { // Kill the terminal
kill(xtermPid, SIGKILL);
waitpid(xtermPid, NULL, 0);
waitpid(xtermPid, nullptr, 0);
}
if ( NULL != mess) { // If we really want a message
if ( nullptr != mess) { // If we really want a message
perror(mess);
}
@ -78,7 +75,7 @@ void Trace::xtermSetup(void) {
char *ptSlaveName = ptsname(ptMaster);
ptSlave = open(ptSlaveName, O_RDWR); // In and out are the same
struct termios termInfo;
struct termios termInfo{};
tcgetattr(ptSlave, &termInfo);
termInfo.c_lflag &= ~ECHO;
@ -94,7 +91,7 @@ void Trace::xtermSetup(void) {
}
SC_HAS_PROCESS(Trace);
Trace::Trace(sc_core::sc_module_name name) :
Trace::Trace(sc_core::sc_module_name const &name) :
sc_module(name), socket("socket") {
socket.register_b_transport(this, &Trace::b_transport);
@ -103,7 +100,7 @@ Trace::Trace(sc_core::sc_module_name name) :
}
Trace::~Trace() {
xtermKill( NULL);
xtermKill( nullptr);
}
void Trace::b_transport(tlm::tlm_generic_payload &trans,

5
src/extension_base.cpp
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@ -8,7 +8,7 @@
#include "extension_base.h"
extension_base::extension_base(sc_dt::sc_uint<32> instr,
extension_base::extension_base(sc_dt::sc_uint<32> const instr,
Registers *register_bank, MemoryInterface *mem_interface) :
m_instr(instr), regs(register_bank), mem_intf(mem_interface) {
@ -16,9 +16,8 @@ extension_base::extension_base(sc_dt::sc_uint<32> instr,
log = Log::getInstance();
}
extension_base::~extension_base() {
extension_base::~extension_base() =default;
}
void extension_base::setInstr(uint32_t p_instr) {
m_instr = sc_dt::sc_uint<32>(p_instr);
}