From b4461cab61660fb781e6b0fae7f6065cf5ceeafe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A0rius=20Mont=C3=B3n?= Date: Fri, 9 Jul 2021 14:42:08 +0200 Subject: [PATCH 1/3] Create codeql-analysis.yml --- .github/workflows/codeql-analysis.yml | 71 +++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 .github/workflows/codeql-analysis.yml diff --git a/.github/workflows/codeql-analysis.yml b/.github/workflows/codeql-analysis.yml new file mode 100644 index 0000000..e2abfa4 --- /dev/null +++ b/.github/workflows/codeql-analysis.yml @@ -0,0 +1,71 @@ +# For most projects, this workflow file will not need changing; you simply need +# to commit it to your repository. +# +# You may wish to alter this file to override the set of languages analyzed, +# or to provide custom queries or build logic. +# +# ******** NOTE ******** +# We have attempted to detect the languages in your repository. Please check +# the `language` matrix defined below to confirm you have the correct set of +# supported CodeQL languages. +# +name: "CodeQL" + +on: + push: + branches: [ master ] + pull_request: + # The branches below must be a subset of the branches above + branches: [ master ] + schedule: + - cron: '33 8 * * 5' + +jobs: + analyze: + name: Analyze + runs-on: ubuntu-latest + permissions: + actions: read + contents: read + security-events: write + + strategy: + fail-fast: false + matrix: + language: [ 'cpp' ] + # CodeQL supports [ 'cpp', 'csharp', 'go', 'java', 'javascript', 'python' ] + # Learn more: + # https://docs.github.com/en/free-pro-team@latest/github/finding-security-vulnerabilities-and-errors-in-your-code/configuring-code-scanning#changing-the-languages-that-are-analyzed + + steps: + - name: Checkout repository + uses: actions/checkout@v2 + + # Initializes the CodeQL tools for scanning. + - name: Initialize CodeQL + uses: github/codeql-action/init@v1 + with: + languages: ${{ matrix.language }} + # If you wish to specify custom queries, you can do so here or in a config file. + # By default, queries listed here will override any specified in a config file. + # Prefix the list here with "+" to use these queries and those in the config file. + # queries: ./path/to/local/query, your-org/your-repo/queries@main + + # Autobuild attempts to build any compiled languages (C/C++, C#, or Java). + # If this step fails, then you should remove it and run the build manually (see below) + - name: Autobuild + uses: github/codeql-action/autobuild@v1 + + # ℹī¸ Command-line programs to run using the OS shell. + # 📚 https://git.io/JvXDl + + # ✏ī¸ If the Autobuild fails above, remove it and uncomment the following three lines + # and modify them (or add more) to build your code if your project + # uses a compiled language + + #- run: | + # make bootstrap + # make release + + - name: Perform CodeQL Analysis + uses: github/codeql-action/analyze@v1 From cc5a14e1cd6bd2ac9ef7e5569342838f3be4c201 Mon Sep 17 00:00:00 2001 From: hsufit Date: Fri, 20 Aug 2021 16:19:26 +0800 Subject: [PATCH 2/3] Add missing colon for BASIC instruction log Better for analysis the RISC-V code stream --- src/BASE_ISA.cpp | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/BASE_ISA.cpp b/src/BASE_ISA.cpp index 527157a..d429c2f 100644 --- a/src/BASE_ISA.cpp +++ b/src/BASE_ISA.cpp @@ -91,7 +91,7 @@ bool BASE_ISA::Exec_LUI() const { regs->setValue(rd, static_cast(imm)); if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "LUI x" << std::dec << rd << " <- 0x" << std::hex + log->SC_log(Log::INFO) << "LUI: x" << std::dec << rd << " <- 0x" << std::hex << imm << "\n"; } @@ -110,7 +110,7 @@ bool BASE_ISA::Exec_AUIPC() const { regs->setValue(rd, new_pc); if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "AUIPC x" << std::dec << rd << " <- 0x" + log->SC_log(Log::INFO) << "AUIPC: x" << std::dec << rd << " <- 0x" << std::hex << imm << " + PC (0x" << new_pc << ")" << "\n"; } @@ -179,7 +179,7 @@ bool BASE_ISA::Exec_BEQ() const { } if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "BEQ x" << std::dec << rs1 << "(0x" << std::hex + log->SC_log(Log::INFO) << "BEQ: x" << std::dec << rs1 << "(0x" << std::hex << regs->getValue(rs1) << ") == x" << std::dec << rs2 << "(0x" << std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec << "\n"; @@ -232,7 +232,7 @@ bool BASE_ISA::Exec_BLT() const { } if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "BLT x" << std::dec << rs1 << "(0x" << std::hex + log->SC_log(Log::INFO) << "BLT: x" << std::dec << rs1 << "(0x" << std::hex << (int32_t) regs->getValue(rs1) << ") < x" << std::dec << rs2 << "(0x" << std::hex << (int32_t) regs->getValue(rs2) << ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec @@ -257,7 +257,7 @@ bool BASE_ISA::Exec_BGE() const { } if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "BGE x" << std::dec << rs1 << "(0x" << std::hex + log->SC_log(Log::INFO) << "BGE: x" << std::dec << rs1 << "(0x" << std::hex << (int32_t) regs->getValue(rs1) << ") > x" << std::dec << rs2 << "(0x" << std::hex << (int32_t) regs->getValue(rs2) << ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec @@ -283,7 +283,7 @@ bool BASE_ISA::Exec_BLTU() const { } if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "BLTU x" << std::dec << rs1 << "(0x" << std::hex + log->SC_log(Log::INFO) << "BLTU: x" << std::dec << rs1 << "(0x" << std::hex << regs->getValue(rs1) << ") < x" << std::dec << rs2 << "(0x" << std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec << "\n"; @@ -307,7 +307,7 @@ bool BASE_ISA::Exec_BGEU() const { } if (log->getLogLevel() >= Log::INFO) { - log->SC_log(Log::INFO) << "BGEU x" << std::dec << rs1 << "(0x" << std::hex + log->SC_log(Log::INFO) << "BGEU: x" << std::dec << rs1 << "(0x" << std::hex << regs->getValue(rs1) << ") > x" << std::dec << rs2 << "(0x" << std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec << "\n"; From 293b7926f6af83b73ba745b3f226c06257810d7c Mon Sep 17 00:00:00 2001 From: hsufit Date: Fri, 20 Aug 2021 16:23:19 +0800 Subject: [PATCH 3/3] Add missing colon for C_extension instruction log Better for analysis the RISC-V code stream --- src/C_extension.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/C_extension.cpp b/src/C_extension.cpp index abc3664..a363a96 100644 --- a/src/C_extension.cpp +++ b/src/C_extension.cpp @@ -280,7 +280,7 @@ bool C_extension::Exec_C_ADDI16SP() { rd = get_rd(); imm = get_imm_LUI(); regs->setValue(rd, imm); - log->SC_log(Log::INFO) << std::dec << "C.LUI x" << rd << " <- 0x" + log->SC_log(Log::INFO) << std::dec << "C.LUI: x" << rd << " <- 0x" << std::hex << imm << "\n"; }