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risc-v-tlm
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default value to variable to remove a warning

This commit is contained in:
mariusmonton 2018-11-12 17:08:26 +01:00
parent 5c6102ea17
commit bdf261cbc6
1 changed files with 1 additions and 1 deletions
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2
src/CPU.cpp
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@ -266,7 +266,7 @@ void CPU::CPU_thread(void) {
tlm::tlm_generic_payload* trans = new tlm::tlm_generic_payload;
uint32_t INSTR;
sc_time delay = SC_ZERO_TIME;
bool PC_not_affected;
bool PC_not_affected = false;
bool incPCby2 = false;
trans->set_command( tlm::TLM_READ_COMMAND );