fixed log condition
This commit is contained in:
Màrius Montón
parent
5ee634e4b4
commit
c33524e726
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@ -90,7 +90,7 @@ bool BASE_ISA::Exec_LUI() {
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imm = get_imm_U() << 12;
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regs->setValue(rd, imm);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "LUI x" << std::dec << rd << " <- 0x" << std::hex
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<< imm << std::endl;
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}
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@ -109,7 +109,7 @@ bool BASE_ISA::Exec_AUIPC() {
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regs->setValue(rd, new_pc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "AUIPC x" << std::dec << rd << " <- 0x"
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<< std::hex << imm << " + PC (0x" << new_pc << ")" << std::endl;
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}
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@ -132,7 +132,7 @@ bool BASE_ISA::Exec_JAL() {
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old_pc = old_pc + 4;
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regs->setValue(rd, old_pc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "JAL: x" << std::dec << rd << " <- 0x" << std::hex
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<< old_pc << std::dec << ". PC + 0x" << std::hex << mem_addr
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<< " -> PC (0x" << new_pc << ")" << std::endl;
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@ -156,7 +156,7 @@ bool BASE_ISA::Exec_JALR() {
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new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
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regs->setPC(new_pc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "JALR: x" << std::dec << rd << " <- 0x"
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<< std::hex << old_pc + 4 << " PC <- 0x" << new_pc << std::endl;
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}
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@ -178,7 +178,7 @@ bool BASE_ISA::Exec_BEQ() {
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new_pc = regs->getPC();
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}
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "BEQ x" << std::dec << rs1 << "(0x" << std::hex
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<< regs->getValue(rs1) << ") == x" << std::dec << rs2 << "(0x"
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<< std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex
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@ -207,7 +207,7 @@ bool BASE_ISA::Exec_BNE() {
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new_pc = regs->getPC();
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}
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "BNE: x" << std::dec << rs1 << "(0x" << std::hex
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<< val1 << ") == x" << std::dec << rs2 << "(0x" << std::hex << val2
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<< ")? -> PC (0x" << std::hex << new_pc << ")" << std::dec
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@ -231,7 +231,7 @@ bool BASE_ISA::Exec_BLT() {
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regs->incPC();
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}
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "BLT x" << std::dec << rs1 << "(0x" << std::hex
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<< (int32_t) regs->getValue(rs1) << ") < x" << std::dec << rs2
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<< "(0x" << std::hex << (int32_t) regs->getValue(rs2)
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@ -256,7 +256,7 @@ bool BASE_ISA::Exec_BGE() {
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regs->incPC();
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}
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "BGE x" << std::dec << rs1 << "(0x" << std::hex
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<< (int32_t) regs->getValue(rs1) << ") > x" << std::dec << rs2
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<< "(0x" << std::hex << (int32_t) regs->getValue(rs2)
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@ -282,7 +282,7 @@ bool BASE_ISA::Exec_BLTU() {
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new_pc = regs->getPC();
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}
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "BLTU x" << std::dec << rs1 << "(0x" << std::hex
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<< regs->getValue(rs1) << ") < x" << std::dec << rs2 << "(0x"
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<< std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex
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@ -306,7 +306,7 @@ bool BASE_ISA::Exec_BGEU() {
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regs->incPC();
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}
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "BGEU x" << std::dec << rs1 << "(0x" << std::hex
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<< regs->getValue(rs1) << ") > x" << std::dec << rs2 << "(0x"
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<< std::hex << regs->getValue(rs2) << ")? -> PC (0x" << std::hex
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@ -330,7 +330,7 @@ bool BASE_ISA::Exec_LB() {
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data = mem_intf->readDataMem(mem_addr, 1);
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regs->setValue(rd, data);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "LB: x" << rs1 << " + " << imm << " (@0x"
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<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::endl;
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}
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@ -352,7 +352,7 @@ bool BASE_ISA::Exec_LH() {
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data = mem_intf->readDataMem(mem_addr, 2);
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regs->setValue(rd, data);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "LH: x" << rs1 << " + " << imm << " (@0x"
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<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::endl;
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}
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@ -374,7 +374,7 @@ bool BASE_ISA::Exec_LW() {
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data = mem_intf->readDataMem(mem_addr, 4);
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regs->setValue(rd, data);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << std::dec << "LW: x" << rs1 << "(0x" << std::hex
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<< regs->getValue(rs1) << ") + " << std::dec << imm << " (@0x"
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<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::hex
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@ -397,7 +397,7 @@ bool BASE_ISA::Exec_LBU() {
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data = mem_intf->readDataMem(mem_addr, 1);
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regs->setValue(rd, data);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "LBU: x" << rs1 << " + " << imm << " (@0x"
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<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::endl;
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}
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@ -418,7 +418,7 @@ bool BASE_ISA::Exec_LHU() {
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data = mem_intf->readDataMem(mem_addr, 2);
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regs->setValue(rd, data);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "LHU: x" << std::dec << rs1 << " + " << imm
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<< " (@0x" << std::hex << mem_addr << std::dec << ") -> x" << rd
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<< "(0x" << std::hex << data << ")" << std::endl;
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@ -442,7 +442,7 @@ bool BASE_ISA::Exec_SB() {
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mem_intf->writeDataMem(mem_addr, data, 1);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SB: x" << std::dec << rs2 << " -> x" << rs1
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<< " + 0x" << std::hex << imm << " (@0x" << std::hex << mem_addr
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<< std::dec << ")" << std::endl;
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@ -466,7 +466,7 @@ bool BASE_ISA::Exec_SH() {
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mem_intf->writeDataMem(mem_addr, data, 2);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SH: x" << std::dec << rs2 << " -> x" << rs1
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<< " + 0x" << std::hex << imm << " (@0x" << std::hex << mem_addr
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<< std::dec << ")" << std::endl;
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@ -490,7 +490,7 @@ bool BASE_ISA::Exec_SW() {
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mem_intf->writeDataMem(mem_addr, data, 4);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SW: x" << std::dec << rs2 << "(0x" << std::hex
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<< data << ") -> x" << std::dec << rs1 << " + 0x" << std::hex << imm
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<< " (@0x" << std::hex << mem_addr << std::dec << ")" << std::endl;
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@ -510,7 +510,7 @@ bool BASE_ISA::Exec_ADDI() {
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calc = regs->getValue(rs1) + imm;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "ADDI: x" << std::dec << rs1 << " + " << imm
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<< " -> x" << std::dec << rd << "(0x" << std::hex << calc << ")"
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<< std::endl;
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@ -573,7 +573,7 @@ bool BASE_ISA::Exec_XORI() {
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calc = regs->getValue(rs1) ^ imm;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "XORI: x" << rs1 << " XOR " << imm << "-> x" << rd
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<< std::endl;
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}
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@ -593,7 +593,7 @@ bool BASE_ISA::Exec_ORI() {
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calc = regs->getValue(rs1) | imm;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "ORI: x" << rs1 << " OR " << imm << "-> x" << rd
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<< std::endl;
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}
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@ -615,7 +615,7 @@ bool BASE_ISA::Exec_ANDI() {
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calc = aux & imm;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "ANDI: x" << rs1 << "(0x" << std::hex << aux
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<< ") AND 0x" << imm << " -> x" << std::dec << rd << "(0x"
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<< std::hex << calc << ")" << std::endl;
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@ -645,7 +645,7 @@ bool BASE_ISA::Exec_SLLI() {
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calc = ((uint32_t) regs->getValue(rs1)) << shift;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SLLI: x" << std::dec << rs1 << " << " << shift
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<< " -> x" << rd << "(0x" << std::hex << calc << ")" << std::endl;
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}
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@ -667,7 +667,7 @@ bool BASE_ISA::Exec_SRLI() {
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calc = ((uint32_t) regs->getValue(rs1)) >> shift;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SRLI: x" << std::dec << rs1 << " >> " << shift
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<< " -> x" << rd << std::endl;
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}
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@ -689,7 +689,7 @@ bool BASE_ISA::Exec_SRAI() {
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calc = regs->getValue(rs1) >> shift;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SRAI: x" << std::dec << rs1 << " >> " << shift
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<< " -> x" << rd << std::endl;
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}
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@ -708,7 +708,7 @@ bool BASE_ISA::Exec_ADD() {
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "ADD: x" << std::dec << rs1 << " + x" << rs2
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<< " -> x" << rd << std::hex << "(0x" << calc << ")" << std::endl;
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}
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@ -726,7 +726,7 @@ bool BASE_ISA::Exec_SUB() {
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calc = regs->getValue(rs1) - regs->getValue(rs2);
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SUB: x" << rs1 << " - x" << rs2 << " -> x" << rd
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<< "(" << calc << ")" << std::endl;
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}
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@ -748,7 +748,7 @@ bool BASE_ISA::Exec_SLL() {
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calc = ((uint32_t) regs->getValue(rs1)) << shift;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SLL: x" << rs1 << " << " << shift << " -> x"
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<< rd << std::endl;
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}
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@ -807,7 +807,7 @@ bool BASE_ISA::Exec_XOR() {
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calc = regs->getValue(rs1) ^ regs->getValue(rs2);
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "XOR: x" << rs1 << " XOR x" << rs2 << "-> x" << rd
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<< std::endl;
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}
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@ -829,7 +829,7 @@ bool BASE_ISA::Exec_SRL() {
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calc = ((uint32_t) regs->getValue(rs1)) >> shift;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SRL: x" << rs1 << " >> " << shift << " -> x"
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<< rd << std::endl;
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}
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@ -851,7 +851,7 @@ bool BASE_ISA::Exec_SRA() {
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calc = regs->getValue(rs1) >> shift;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "SRA: x" << rs1 << " >> " << shift << " -> x"
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<< rd << std::endl;
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}
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@ -870,7 +870,7 @@ bool BASE_ISA::Exec_OR() {
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calc = regs->getValue(rs1) | regs->getValue(rs2);
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "OR: x" << rs1 << " OR x" << rs2 << "-> x" << rd
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<< std::endl;
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}
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@ -889,7 +889,7 @@ bool BASE_ISA::Exec_AND() {
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calc = regs->getValue(rs1) & regs->getValue(rs2);
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "AND: x" << rs1 << " AND x" << rs2 << "-> x" << rd
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<< std::endl;
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}
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@ -157,7 +157,7 @@ bool C_extension::Exec_C_JR() {
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new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
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regs->setPC(new_pc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "JR: PC <- 0x" << std::hex << new_pc << std::endl;
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}
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@ -175,7 +175,7 @@ bool C_extension::Exec_C_MV() {
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calc = regs->getValue(rs1) + regs->getValue(rs2);
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "C.MV: x" << std::dec << rs1 << "(0x" << std::hex
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<< regs->getValue(rs1) << ") + x" << std::dec << rs2 << "(0x"
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<< std::hex << regs->getValue(rs2) << ") -> x" << std::dec << rd
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@ -196,7 +196,7 @@ bool C_extension::Exec_C_ADD() {
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calc = regs->getValue(rs1) + regs->getValue(rs2);
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "C.ADD: x" << std::dec << rs1 << " + x" << rs2
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<< " -> x" << rd << "(0x" << std::hex << calc << ")" << std::endl;
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}
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@ -221,7 +221,7 @@ bool C_extension::Exec_C_LWSP() {
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regs->setValue(rd, data);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << "C.LWSP: x" << std::dec << rs1 << " + " << imm
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<< " (@0x" << std::hex << mem_addr << std::dec << ") -> x" << rd
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<< "(" << std::hex << data << ")" << std::dec << std::endl;
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@ -247,7 +247,7 @@ bool C_extension::Exec_C_ADDI4SPN() {
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calc = regs->getValue(rs1) + imm;
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regs->setValue(rd, calc);
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if (log->getLogLevel() > Log::INFO) {
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if (log->getLogLevel() >= Log::INFO) {
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log->SC_log(Log::INFO) << std::dec << "C.ADDI4SPN: x" << rs1 << "(0x"
|
||||
<< std::hex << regs->getValue(rs1) << ") + " << std::dec << imm
|
||||
<< " -> x" << rd << "(0x" << std::hex << calc << ")" << std::endl;
|
||||
|
|
@ -301,7 +301,7 @@ bool C_extension::Exec_C_SWSP() {
|
|||
|
||||
mem_intf->writeDataMem(mem_addr, data, 4);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << std::dec << "C.SWSP: x" << rs2 << "(0x"
|
||||
<< std::hex << data << ") -> x" << std::dec << rs1 << " + " << imm
|
||||
<< " (@0x" << std::hex << mem_addr << std::dec << ")" << std::endl;
|
||||
|
|
@ -326,7 +326,7 @@ bool C_extension::Exec_C_BEQZ() {
|
|||
new_pc = regs->getPC();
|
||||
}
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.BEQZ: x" << std::dec << rs1 << "(" << val1
|
||||
<< ") == 0? -> PC (0x" << std::hex << new_pc << ")" << std::dec
|
||||
<< std::endl;
|
||||
|
|
@ -351,7 +351,7 @@ bool C_extension::Exec_C_BNEZ() {
|
|||
new_pc = regs->getPC();
|
||||
}
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.BNEZ: x" << std::dec << rs1 << "(0x"
|
||||
<< std::hex << val1 << ") != 0? -> PC (0x" << std::hex << new_pc
|
||||
<< ")" << std::dec << std::endl;
|
||||
|
|
@ -372,7 +372,7 @@ bool C_extension::Exec_C_LI() {
|
|||
calc = regs->getValue(rs1) + imm;
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << std::dec << "C.LI: x" << rs1 << "("
|
||||
<< regs->getValue(rs1) << ") + " << imm << " -> x" << rd << "("
|
||||
<< calc << ")" << std::endl;
|
||||
|
|
@ -395,7 +395,7 @@ bool C_extension::Exec_C_SRLI() {
|
|||
calc = ((uint32_t) regs->getValue(rs1)) >> shift;
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.SRLI: x" << rs1 << " >> " << shift << " -> x"
|
||||
<< rd << std::endl;
|
||||
}
|
||||
|
|
@ -417,7 +417,7 @@ bool C_extension::Exec_C_SRAI() {
|
|||
calc = (int32_t) regs->getValue(rs1) >> shift;
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.SRAI: x" << rs1 << " >> " << std::dec << shift
|
||||
<< " -> x" << rd << "(" << calc << ")" << std::endl;
|
||||
}
|
||||
|
|
@ -439,7 +439,7 @@ bool C_extension::Exec_C_SLLI() {
|
|||
calc = ((uint32_t) regs->getValue(rs1)) << shift;
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.SLLI: x" << std::dec << rs1 << " << " << shift
|
||||
<< " -> x" << rd << "(0x" << calc << ")" << std::endl;
|
||||
}
|
||||
|
|
@ -461,7 +461,7 @@ bool C_extension::Exec_C_ANDI() {
|
|||
calc = aux & imm;
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.ANDI: x" << rs1 << "(" << aux << ") AND "
|
||||
<< imm << " -> x" << rd << std::endl;
|
||||
}
|
||||
|
|
@ -480,7 +480,7 @@ bool C_extension::Exec_C_SUB() {
|
|||
calc = regs->getValue(rs1) - regs->getValue(rs2);
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.SUB: x" << std::dec << rs1 << " - x" << rs2
|
||||
<< " -> x" << rd << std::endl;
|
||||
}
|
||||
|
|
@ -499,7 +499,7 @@ bool C_extension::Exec_C_XOR() {
|
|||
calc = regs->getValue(rs1) ^ regs->getValue(rs2);
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.XOR: x" << std::dec << rs1 << " XOR x" << rs2
|
||||
<< "-> x" << rd << std::endl;
|
||||
}
|
||||
|
|
@ -518,7 +518,7 @@ bool C_extension::Exec_C_OR() {
|
|||
calc = regs->getValue(rs1) | regs->getValue(rs2);
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C_OR: x" << std::dec << rs1 << " OR x" << rs2
|
||||
<< "-> x" << rd << std::endl;
|
||||
}
|
||||
|
|
@ -537,7 +537,7 @@ bool C_extension::Exec_C_AND() {
|
|||
calc = regs->getValue(rs1) & regs->getValue(rs2);
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.AND: x" << std::dec << rs1 << " AND x" << rs2
|
||||
<< "-> x" << rd << std::endl;
|
||||
}
|
||||
|
|
@ -557,7 +557,7 @@ bool C_extension::Exec_C_ADDI() {
|
|||
calc = regs->getValue(rs1) + imm;
|
||||
regs->setValue(rd, calc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.ADDI: x" << std::dec << rs1 << " + " << imm
|
||||
<< " -> x" << std::dec << rd << "(0x" << std::hex << calc << ")"
|
||||
<< std::endl;
|
||||
|
|
@ -580,7 +580,7 @@ bool C_extension::Exec_C_JALR() {
|
|||
new_pc = (regs->getValue(rs1) + mem_addr) & 0xFFFFFFFE;
|
||||
regs->setPC(new_pc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.JALR: x" << std::dec << rd << " <- 0x"
|
||||
<< std::hex << old_pc + 4 << " PC <- 0x" << std::hex << new_pc
|
||||
<< std::endl;
|
||||
|
|
@ -603,7 +603,7 @@ bool C_extension::Exec_C_LW() {
|
|||
data = mem_intf->readDataMem(mem_addr, 4);
|
||||
regs->setValue(rd, data);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << std::dec << "C.LW: x" << rs1 << "(0x" << std::hex
|
||||
<< regs->getValue(rs1) << ") + " << std::dec << imm << " (@0x"
|
||||
<< std::hex << mem_addr << std::dec << ") -> x" << rd << std::hex
|
||||
|
|
@ -628,7 +628,7 @@ bool C_extension::Exec_C_SW() {
|
|||
|
||||
mem_intf->writeDataMem(mem_addr, data, 4);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.SW: x" << std::dec << rs2 << "(0x" << std::hex
|
||||
<< data << ") -> x" << std::dec << rs1 << " + 0x" << std::hex << imm
|
||||
<< " (@0x" << std::hex << mem_addr << std::dec << ")" << std::endl;
|
||||
|
|
@ -652,7 +652,7 @@ bool C_extension::Exec_C_JAL(int m_rd) {
|
|||
old_pc = old_pc + 2;
|
||||
regs->setValue(rd, old_pc);
|
||||
|
||||
if (log->getLogLevel() > Log::INFO) {
|
||||
if (log->getLogLevel() >= Log::INFO) {
|
||||
log->SC_log(Log::INFO) << "C.JAL: x" << std::dec << rd << " <- 0x"
|
||||
<< std::hex << old_pc << std::dec << ". PC + 0x" << std::hex
|
||||
<< mem_addr << " -> PC (0x" << new_pc << ")" << std::endl;
|
||||
|
|
|
|||
Loading…
Reference in New Issue