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@ -91,6 +91,7 @@ public:
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void FENCE(Instruction &inst);
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void FENCE(Instruction &inst);
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void ECALL(Instruction &inst);
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void ECALL(Instruction &inst);
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bool EBREAK(Instruction &inst);
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void CSRRW(Instruction &inst);
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void CSRRW(Instruction &inst);
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void CSRRS(Instruction &inst);
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void CSRRS(Instruction &inst);
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@ -107,7 +108,7 @@ public:
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void C_JR(Instruction &inst);
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void C_JR(Instruction &inst);
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void C_MV(Instruction &inst);
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void C_MV(Instruction &inst);
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void C_LWSP(Instruction &inst);
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void C_LWSP(Instruction &inst);
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void C_ADDI4SPN(Instruction &inst);
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bool C_ADDI4SPN(Instruction &inst);
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void C_SLLI(Instruction &inst);
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void C_SLLI(Instruction &inst);
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void C_ADDI16SP(Instruction &inst);
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void C_ADDI16SP(Instruction &inst);
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void C_SWSP(Instruction &inst);
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void C_SWSP(Instruction &inst);
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@ -139,7 +140,7 @@ private:
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uint32_t readDataMem(uint32_t addr, int size);
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uint32_t readDataMem(uint32_t addr, int size);
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void writeDataMem(uint32_t addr, uint32_t data, int size);
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void writeDataMem(uint32_t addr, uint32_t data, int size);
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void RaiseException(uint32_t cause);
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void RaiseException(uint32_t cause, uint32_t inst = 0);
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Registers *regs;
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Registers *regs;
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Performance *perf;
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Performance *perf;
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@ -28,7 +28,7 @@ bool CPU::process_c_instruction(Instruction &inst) {
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switch(c_inst.decode()) {
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switch(c_inst.decode()) {
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case OP_C_ADDI4SPN:
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case OP_C_ADDI4SPN:
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exec->C_ADDI4SPN(inst);
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PC_not_affected = exec->C_ADDI4SPN(inst);
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break;
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break;
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case OP_C_LW:
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case OP_C_LW:
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exec->LW(inst, true);
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exec->LW(inst, true);
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@ -297,6 +297,9 @@ bool CPU::process_base_instruction(Instruction &inst) {
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case OP_ECALL:
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case OP_ECALL:
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exec->ECALL(inst);
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exec->ECALL(inst);
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break;
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break;
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case OP_EBREAK:
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exec->EBREAK(inst);
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break;
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case OP_CSRRW:
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case OP_CSRRW:
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exec->CSRRW(inst);
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exec->CSRRW(inst);
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break;
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break;
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@ -336,9 +336,10 @@ void Execute::LHU(Instruction &inst) {
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data = readDataMem(mem_addr, 2);
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data = readDataMem(mem_addr, 2);
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regs->setValue(rd, data);
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regs->setValue(rd, data);
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log->SC_log(Log::INFO) << "LHU: x"
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log->SC_log(Log::INFO) << "LHU: x" << dec
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<< rs1 << " + " << imm << " (@0x"
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<< rs1 << " + " << imm << " (@0x"
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<< hex <<mem_addr << dec << ") -> x" << rd << endl;
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<< hex << mem_addr << dec << ") -> x"
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<< rd << "(0x" << hex << data << ")"<< endl;
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}
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}
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void Execute::SB(Instruction &inst) {
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void Execute::SB(Instruction &inst) {
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@ -557,7 +558,7 @@ bool Execute::SLLI(Instruction &inst) {
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calc = ((uint32_t)regs->getValue(rs1)) << shift;
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calc = ((uint32_t)regs->getValue(rs1)) << shift;
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regs->setValue(rd, calc);
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regs->setValue(rd, calc);
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log->SC_log(Log::INFO) << "SLLI: x"
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log->SC_log(Log::INFO) << "SLLI: x" << dec
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<< rs1 << " << " << shift << " -> x"
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<< rs1 << " << " << shift << " -> x"
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<< rd << "(0x" << hex << calc << ")" << endl;
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<< rd << "(0x" << hex << calc << ")" << endl;
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@ -578,7 +579,7 @@ void Execute::SRLI(Instruction &inst) {
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calc = ((uint32_t)regs->getValue(rs1)) >> shift;
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calc = ((uint32_t)regs->getValue(rs1)) >> shift;
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regs->setValue(rd, calc);
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regs->setValue(rd, calc);
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log->SC_log(Log::INFO) << "SRLI: x"
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log->SC_log(Log::INFO) << "SRLI: x" << dec
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<< rs1 << " >> " << shift << " -> x"
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<< rs1 << " >> " << shift << " -> x"
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<< rd << endl;
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<< rd << endl;
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}
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}
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@ -597,7 +598,7 @@ void Execute::SRAI(Instruction &inst) {
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calc = regs->getValue(rs1) >> shift;
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calc = regs->getValue(rs1) >> shift;
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regs->setValue(rd, calc);
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regs->setValue(rd, calc);
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log->SC_log(Log::INFO) << "SRAI: x"
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log->SC_log(Log::INFO) << "SRAI: x" << dec
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<< rs1 << " >> " << shift << " -> x"
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<< rs1 << " >> " << shift << " -> x"
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<< rd << endl;
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<< rd << endl;
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}
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}
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@ -798,6 +799,19 @@ void Execute::ECALL(Instruction &inst) {
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SC_REPORT_ERROR("Execute", "ECALL");
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SC_REPORT_ERROR("Execute", "ECALL");
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}
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}
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bool Execute::EBREAK(Instruction &inst) {
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log->SC_log(Log::INFO) << "EBREAK" << endl;
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std::cout << endl << "EBRAK Instruction called, dumping information" << endl;
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regs->dump();
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cout << "Simulation time " << sc_time_stamp() << endl;
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perf->dump();
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RaiseException(EXCEPTION_CAUSE_BREAKPOINT);
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return true;
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}
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void Execute::CSRRW(Instruction &inst) {
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void Execute::CSRRW(Instruction &inst) {
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int rd, rs1;
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int rd, rs1;
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int csr;
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int csr;
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@ -1049,7 +1063,7 @@ void Execute::C_LWSP(Instruction &inst) {
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<< rd << "(" << hex << data << ")"<< dec << endl;
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<< rd << "(" << hex << data << ")"<< dec << endl;
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}
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}
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void Execute::C_ADDI4SPN(Instruction &inst) {
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bool Execute::C_ADDI4SPN(Instruction &inst) {
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int rd, rs1;
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int rd, rs1;
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int32_t imm = 0;
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int32_t imm = 0;
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int32_t calc;
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int32_t calc;
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@ -1060,6 +1074,11 @@ void Execute::C_ADDI4SPN(Instruction &inst) {
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rs1 = 2;
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rs1 = 2;
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imm = c_inst.get_imm_ADDI4SPN();
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imm = c_inst.get_imm_ADDI4SPN();
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if (imm == 0) {
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RaiseException(EXCEPTION_CAUSE_ILLEGAL_INSTRUCTION, inst.getInstr() );
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return false;
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}
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calc = regs->getValue(rs1) + imm;
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calc = regs->getValue(rs1) + imm;
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regs->setValue(rd, calc);
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regs->setValue(rd, calc);
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@ -1067,6 +1086,8 @@ void Execute::C_ADDI4SPN(Instruction &inst) {
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<< rs1 << "(0x" << hex << regs->getValue(rs1) << ") + "
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<< rs1 << "(0x" << hex << regs->getValue(rs1) << ") + "
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<< dec << imm << " -> x"
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<< dec << imm << " -> x"
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<< rd << "(0x" << hex << calc << ")" << endl;
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<< rd << "(0x" << hex << calc << ")" << endl;
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return true;
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}
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}
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void Execute::C_ADDI16SP(Instruction &inst) {
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void Execute::C_ADDI16SP(Instruction &inst) {
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@ -1618,7 +1639,7 @@ void Execute::writeDataMem(uint32_t addr, uint32_t data, int size) {
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}
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}
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void Execute::RaiseException(uint32_t cause) {
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void Execute::RaiseException(uint32_t cause, uint32_t inst) {
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uint32_t new_pc, current_pc, m_cause;
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uint32_t new_pc, current_pc, m_cause;
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current_pc = regs->getPC();
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current_pc = regs->getPC();
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@ -1628,7 +1649,11 @@ void Execute::RaiseException(uint32_t cause) {
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new_pc = regs->getCSR(CSR_MTVEC);
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new_pc = regs->getCSR(CSR_MTVEC);
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regs->setCSR(CSR_MEPC, current_pc );
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regs->setCSR(CSR_MEPC, current_pc );
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regs->setCSR(CSR_MTVAL, current_pc );
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if (cause == EXCEPTION_CAUSE_ILLEGAL_INSTRUCTION) {
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regs->setCSR(CSR_MTVAL, inst);
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} else {
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regs->setCSR(CSR_MTVAL, current_pc );
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}
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regs->setCSR(CSR_MCAUSE, cause);
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regs->setCSR(CSR_MCAUSE, cause);
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regs->setCSR(CSR_MSTATUS, m_cause);
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regs->setCSR(CSR_MSTATUS, m_cause);
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