From d1c80d10144e3972e47759a431960863170269c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A0rius=20Mont=C3=B3n?= Date: Mon, 8 Nov 2021 18:16:34 +0100 Subject: [PATCH] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 5579fe8..cc1244f 100644 --- a/README.md +++ b/README.md @@ -6,7 +6,7 @@ This is another RISC-V ISA simulator, this is coded in SystemC + TLM-2. It supports RV32IMAC Instruction set by now. -[![travis](https://api.travis-ci.com/mariusmm/RISC-V-TLM.svg?branch=master](https://travis-ci.org/mariusmm/RISC-V-TLM) +[![travis](https://api.travis-ci.com/mariusmm/RISC-V-TLM.svg?branch=master)](https://travis-ci.org/mariusmm/RISC-V-TLM) [![Codacy Badge](https://api.codacy.com/project/badge/Grade/0f7ccc8435f14ce2b241b3bfead772a2)](https://www.codacy.com/app/mariusmm/RISC-V-TLM?utm_source=github.com&utm_medium=referral&utm_content=mariusmm/RISC-V-TLM&utm_campaign=Badge_Grade) [![Coverity Scan Build Status](https://img.shields.io/coverity/scan/18772.svg)](https://scan.coverity.com/projects/mariusmm-risc-v-tlm) [![license](https://img.shields.io/badge/license-GNU--3.0-green.svg)](https://github.com/mariusmm/RISC-V-TLM/blob/master/LICENSE)