From de2e14ff28630ace249b0aeb8c5e9388c1d058c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A0rius=20Mont=C3=B3n?= Date: Thu, 25 Nov 2021 23:31:49 +0100 Subject: [PATCH] better log output --- src/BASE_ISA.cpp | 13 ++++++++----- src/CPU.cpp | 6 +++--- src/C_extension.cpp | 9 +++++---- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/src/BASE_ISA.cpp b/src/BASE_ISA.cpp index 5637b3f..ba74d03 100644 --- a/src/BASE_ISA.cpp +++ b/src/BASE_ISA.cpp @@ -284,14 +284,17 @@ bool BASE_ISA::Exec_BGEU() const { if ( static_cast(regs->getValue(rs1)) >= static_cast(regs->getValue(rs2)) ) { new_pc = static_cast(regs->getPC() + get_imm_B()); + + logger->debug("{} ns. PC: 0x{:x}. BGEU: x{:d}(0x{:x}) > x{:d}(0x{:x}) -> PC (0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(), + rs1, regs->getValue(rs1), rs2, regs->getValue(rs2), new_pc); + regs->setPC(new_pc); } else { + logger->debug("{} ns. PC: 0x{:x}. BGEU: x{:d}(0x{:x}) > x{:d}(0x{:x}) -> PC (0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(), + rs1, regs->getValue(rs1), rs2, regs->getValue(rs2), regs->getPC() + 4); regs->incPC(); } - logger->debug("{} ns. PC: 0x{:x}. BGEU: x{:d}(0x{:x}) > x{:d}(0x{:x}) -> PC (0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(), - rs1, regs->getValue(rs1), rs2, regs->getValue(rs2), new_pc); - return true; } @@ -578,8 +581,8 @@ bool BASE_ISA::Exec_ANDI() const { calc = aux & imm; regs->setValue(rd, static_cast(calc)); - logger->debug("{} ns. PC: 0x{:x}. ANDI: x{:d} AND x{:d} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), - rs1, imm, rd); + logger->debug("{} ns. PC: 0x{:x}. ANDI: x{:d}(0x{:x}) AND 0x{:x} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), + rs1, aux, imm, rd); return true; } diff --git a/src/CPU.cpp b/src/CPU.cpp index 4142c2f..218e439 100644 --- a/src/CPU.cpp +++ b/src/CPU.cpp @@ -142,9 +142,9 @@ bool CPU::CPU_step() { } } - perf->codeMemoryRead(); - inst.setInstr(INSTR); - bool breakpoint = false; + perf->codeMemoryRead(); + inst.setInstr(INSTR); + bool breakpoint = false; /* check what type of instruction is and execute it */ switch (inst.check_extension()) { diff --git a/src/C_extension.cpp b/src/C_extension.cpp index 3958db4..1db40d8 100644 --- a/src/C_extension.cpp +++ b/src/C_extension.cpp @@ -154,10 +154,11 @@ bool C_extension::Exec_C_JR() { mem_addr = 0; new_pc = static_cast(static_cast((regs->getValue(rs1)) + static_cast(mem_addr)) & 0xFFFFFFFE); - regs->setPC(new_pc); logger->debug("{} ns. PC: 0x{:x}. C.JR: PC <- 0x{:x}", sc_core::sc_time_stamp().value(), regs->getPC(), new_pc); + regs->setPC(new_pc); + return true; } @@ -433,7 +434,7 @@ bool C_extension::Exec_C_ANDI() { calc = aux & imm; regs->setValue(rd, static_cast(calc)); - logger->debug("{} ns. PC: 0x{:x}. C.ANDI: x{:d}({:d}) AND {:d} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), + logger->debug("{} ns. PC: 0x{:x}. C.ANDI: x{:d}(0x{:x}) AND 0x{:x} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), rs1, aux, imm, rd); return true; @@ -450,8 +451,8 @@ bool C_extension::Exec_C_SUB() { calc = regs->getValue(rs1) - regs->getValue(rs2); regs->setValue(rd, static_cast(calc)); - logger->debug("{} ns. PC: 0x{:x}. C.SUB: x{:d} - x{:d} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), - rs1, rs2, rd); + logger->debug("{} ns. PC: 0x{:x}. C.SUB: x{:d} - x{:d} -> x{:d}(0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(), + rs1, rs2, rd, calc); return true; }