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Debug configuration

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Màrius Montón 2021-02-21 19:42:51 +01:00
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@ -24,6 +24,7 @@ Table of Contents
* [TODO](./README.md#todo) * [TODO](./README.md#todo)
* [Compile](./README.md#compile) * [Compile](./README.md#compile)
* [Cross-compiler](./README.md#cross-compiler) * [Cross-compiler](./README.md#cross-compiler)
* [Debug](./README.md#debug)
* [Docker container](./README.md#docker-container) * [Docker container](./README.md#docker-container)
* [How to use Docker](./README.md#how-to-use-docker) * [How to use Docker](./README.md#how-to-use-docker)
* [Test](./README.md#test) * [Test](./README.md#test)
@ -66,7 +67,7 @@ i5-5200<span>@</span>2.2Ghz and about 3.000.000 instructions / sec in a Intel Co
Trace perihperal creates a xterm window where it prints out all received data. Trace perihperal creates a xterm window where it prints out all received data.
### Structure ### Structure
![Modules' hierarchy](https://github.com/mariusmm/RISC-V-TLM/blob/master/doc/Hierarchy.png) ![Modules' hierarchy](doc/Hierarchy.png)
### Memory map ### Memory map
@ -99,8 +100,9 @@ Task to do:
- [x] Test, test, test & test. I'm sure there are a ~~lot of~~ some bugs in the code - [x] Test, test, test & test. I'm sure there are a ~~lot of~~ some bugs in the code
- [x] riscv-test almost complete (see [Test](https://github.com/mariusmm/RISC-V-TLM/wiki/Tests)) - [x] riscv-test almost complete (see [Test](https://github.com/mariusmm/RISC-V-TLM/wiki/Tests))
- [x] riscv-compliance - [x] riscv-compliance
* Improve structure and modules hierarchy * [ ] Improve structure and modules hierarchy
* Add 64 & 128 bits architecture (RV64I, RV128I) * [ ] Add 64 & 128 bits architecture (RV64I, RV128I)
* [x] Debug capabilities
## Compile ## Compile
In order to compile the project you need SystemC-2.3.2 installed in your system. In order to compile the project you need SystemC-2.3.2 installed in your system.
@ -146,6 +148,22 @@ There is a Helper_functions.c file with defiitions of all missing functions need
**_lseek_r()**, **_isatty_r()**, **_write()**). All of them are defined empty except **_write()** that is written to use the Trace perihperal. **_lseek_r()**, **_isatty_r()**, **_write()**). All of them are defined empty except **_write()** that is written to use the Trace perihperal.
The definition of the function **_write()** allows developer to use printf() as usual and the stdout will be redirected to the Trace perihperal. The definition of the function **_write()** allows developer to use printf() as usual and the stdout will be redirected to the Trace perihperal.
## Debug
It is possible to debug an application running in RISC-V-TLM simulator.
It is tested with riscv32-unknown-elf-gdb version 8.3.0.20190516-git and eclipse.
Configure a "C/C++ Remote Application" debug configuration as the figure
![Modules' hierarchy](doc/DebugConfiguration.png)
gdbinit.txt file must contain:
```
set debug remote 1
set arch riscv:rv32
```
With this configuration, eclipse debuggins is almost normal (I experienced some problems wiith "step-over" and "step-into" commands)
## Docker container ## Docker container
There is a Docker container available with the latest release at https://hub.docker.com/r/mariusmm/riscv-tlm. There is a Docker container available with the latest release at https://hub.docker.com/r/mariusmm/riscv-tlm.

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