* A_Instruction, C_Instruction and M_Instruction renamed to *_extension
* These files decode and executes extensions
* These classes use a new base clase extension_base
* Execute & Instruction classes heavyly modified:
* Execute now is BASE_ISA and decodes and executes base ISA, Zicsr & Zifencei
* Instruction keeps the instruction being executed, nothing else
* Add memory interface to ISS to clear the code and the structure
* Removed "using namespace " directives, all classes are called using their namespace
* Added proper header to each file
* Added license to all files
* memory module parses 03 field and sets Program Counter (PC) to right value
* almost all RV32I instructions implemented
* added Trace module to mimic ARM ITM module
* added BusCtrl module as bus controler (very simple) to allow CPU & RISC_V_execute to access memory & peripherals
* lot of minor changes
mariusmonton