152 lines
3.8 KiB
C++
152 lines
3.8 KiB
C++
/*!
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\file Execute.h
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\brief RISC-V ISA implementation
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\author Màrius Montón
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\date August 2018
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*/
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#ifndef Execute_H
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#define Execute_H
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#define SC_INCLUDE_DYNAMIC_PROCESSES
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#include "systemc"
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#include "tlm.h"
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#include "tlm_utils/simple_initiator_socket.h"
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#include "memory.h"
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#include "Instruction.h"
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#include "C_Instruction.h"
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#include "M_Instruction.h"
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#include "Registers.h"
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#include "Log.h"
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using namespace sc_core;
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using namespace sc_dt;
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using namespace std;
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/**
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* @brief Risc_V execute module
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*/
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class Execute : sc_module {
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public:
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/**
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* @brief Constructor
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* @param name module name
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* @param register_bank pointer to register bank to use
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*/
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Execute(sc_module_name name,
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Registers *register_bank);
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/* Quick & dirty way to publish a socket though modules */
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tlm_utils::simple_initiator_socket<Execute> data_bus;
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bool LUI(Instruction &inst);
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bool AUIPC(Instruction &inst);
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bool JAL(Instruction &inst, bool c_extension = false, int m_rd = 1);
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bool JALR(Instruction &inst, bool c_extension = false);
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bool BEQ(Instruction &inst);
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bool BNE(Instruction &inst);
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bool BLT(Instruction &inst);
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bool BGE(Instruction &inst);
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bool BLTU(Instruction &inst);
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bool BGEU(Instruction &inst);
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bool LB(Instruction &inst);
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bool LH(Instruction &inst);
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bool LW(Instruction &inst, bool c_extension = false);
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bool LBU(Instruction &inst);
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bool LHU(Instruction &inst);
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bool SB(Instruction &inst);
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bool SH(Instruction &inst);
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bool SW(Instruction &inst, bool c_extension = false);
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bool SBU(Instruction &inst);
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bool SHU(Instruction &inst);
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bool ADDI(Instruction &inst, bool c_extension = false);
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bool SLTI(Instruction &inst);
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bool SLTIU(Instruction &inst);
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bool XORI(Instruction &inst);
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bool ORI(Instruction &inst);
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bool ANDI(Instruction &inst);
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bool SLLI(Instruction &inst);
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bool SRLI(Instruction &inst);
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bool SRAI(Instruction &inst);
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bool ADD(Instruction &inst);
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bool SUB(Instruction &inst);
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bool SLL(Instruction &inst);
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bool SLT(Instruction &inst);
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bool SLTU(Instruction &inst);
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bool XOR(Instruction &inst);
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bool SRL(Instruction &inst);
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bool SRA(Instruction &inst);
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bool OR(Instruction &inst);
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bool AND(Instruction &inst);
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bool FENCE(Instruction &inst);
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bool ECALL(Instruction &inst);
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bool EBREAK(Instruction &inst);
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bool CSRRW(Instruction &inst);
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bool CSRRS(Instruction &inst);
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bool CSRRC(Instruction &inst);
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bool CSRRWI(Instruction &inst);
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bool CSRRSI(Instruction &inst);
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bool CSRRCI(Instruction &inst);
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/*********************** Privileged Instructions ******************************/
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bool MRET(Instruction &inst);
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bool WFI(Instruction &inst);
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/* C Extensions */
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bool C_JR(Instruction &inst);
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bool C_MV(Instruction &inst);
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bool C_LWSP(Instruction &inst);
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bool C_ADDI4SPN(Instruction &inst);
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bool C_SLLI(Instruction &inst);
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bool C_ADDI16SP(Instruction &inst);
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bool C_SWSP(Instruction &inst);
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bool C_BEQZ(Instruction &inst);
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bool C_BNEZ(Instruction &inst);
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bool C_LI(Instruction &inst);
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bool C_SRLI(Instruction &inst);
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bool C_SRAI(Instruction &inst);
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bool C_ANDI(Instruction &inst);
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bool C_ADD(Instruction &inst);
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bool C_SUB(Instruction &inst);
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bool C_XOR(Instruction &inst);
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bool C_OR(Instruction &inst);
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bool C_AND(Instruction &inst);
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/* M Extensinos */
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bool M_MUL(Instruction &inst);
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bool M_MULH(Instruction &inst);
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bool M_MULHSU(Instruction &inst);
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bool M_MULHU(Instruction &inst);
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bool M_DIV(Instruction &inst);
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bool M_DIVU(Instruction &inst);
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bool M_REM(Instruction &inst);
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bool M_REMU(Instruction &inst);
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bool NOP(Instruction &inst);
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private:
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uint32_t readDataMem(uint32_t addr, int size);
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void writeDataMem(uint32_t addr, uint32_t data, int size);
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void RaiseException(uint32_t cause, uint32_t inst = 0);
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Registers *regs;
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Performance *perf;
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Log *log;
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};
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#endif
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