269 lines
4.6 KiB
C++
269 lines
4.6 KiB
C++
/*!
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\file Registers.h
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\brief Basic register file
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\author Màrius Montón
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\date August 2018
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*/
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#ifndef REGISTERS_H
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#define REGISTERS_H
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#define SC_INCLUDE_DYNAMIC_PROCESSES
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#include <iomanip>
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#include "systemc"
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#include "tlm.h"
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#include "Performance.h"
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#include "Memory.h"
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#define MISA_A_EXTENSION (1 << 0)
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#define MISA_B_EXTENSION (1 << 1)
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#define MISA_C_EXTENSION (1 << 2)
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#define MISA_I_BASE (1 << 8)
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#define MISA_M_EXTENSION (1 << 12)
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#define MISA_MXL (1 << 30)
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#define CSR_MVENDORID (0xF11)
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#define CSR_MARCHID (0xF12)
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#define CSR_MIMPID (0xF13)
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#define CSR_MHARTID (0xF14)
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#define CSR_MSTATUS (0x300)
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#define CSR_MISA (0x301)
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#define CSR_MEDELEG (0x302)
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#define CSR_MIDELEG (0x303)
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#define CSR_MIE (0x304)
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#define CSR_MTVEC (0x305)
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#define CSR_MCOUNTEREN (0x306)
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#define CSR_MSTATUSH (0x310)
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#define CSR_MSCRATCH (0x340)
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#define CSR_MEPC (0x341)
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#define CSR_MCAUSE (0x342)
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#define CSR_MTVAL (0x343)
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#define CSR_MIP (0x344)
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#define CSR_SSCRATCH (0x140)
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#define CSR_SEPC (0x141)
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#define CSR_SCAUSE (0x142)
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#define CSR_STVAL (0x143)
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#define CSR_SIP (0x144)
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#define CSR_MCYCLE (0xB00)
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#define CSR_MINSTRET (0xB02)
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#define CSR_MCYCLEH (0xB80)
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#define CSR_MINSTRETH (0xB82)
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#define CSR_CYCLE (0xC00)
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#define CSR_TIME (0xC01)
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#define CSR_INSTRET (0xC02)
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#define CSR_CYCLEH (0xC80)
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#define CSR_TIMEH (0xC81)
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#define CSR_INSTRETH (0xC02)
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#define CSR_STVEC (0x105)
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#define MSTATUS_UIE (1 << 0)
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#define MSTATUS_SIE (1 << 1)
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#define MSTATUS_MIE (1 << 3)
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#define MSTATUS_UPIE (1 << 4)
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#define MSTATUS_SPIE (1 << 5)
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#define MSTATUS_MPIE (1 << 7)
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#define MSTATUS_SPP (1 << 8)
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#define MSTATUS_MPP (1 << 11)
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#define MSTATUS_FS (1 << 13)
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#define MSTATUS_XS (1 << 15)
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#define MSTATUS_MPRV (1 << 17)
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#define MSTATUS_SUM (1 << 18)
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#define MSTATUS_MXR (1 << 19)
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#define MSTATUS_TVM (1 << 20)
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#define MSTATUS_TW (1 << 21)
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#define MSTATUS_TSR (1 << 22)
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#define MIP_USIP (1 << 0)
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#define MIP_SSIP (1 << 1)
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#define MIP_MSIP (1 << 3)
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#define MIP_UTIP (1 << 4)
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#define MIP_STIP (1 << 5)
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#define MIP_MTIP (1 << 7)
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#define MIP_UEIP (1 << 8)
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#define MIP_SEIP (1 << 9)
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#define MIP_MEIP (1 << 11)
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#define MIE_USIE (1 << 0)
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#define MIE_SSIE (1 << 1)
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#define MIE_MSIE (1 << 3)
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#define MIE_UTIE (1 << 4)
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#define MIE_STIE (1 << 5)
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#define MIE_MTIE (1 << 7)
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#define MIE_UEIE (1 << 8)
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#define MIE_SEIE (1 << 9)
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#define MIE_MEIE (1 << 11)
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/* 1 ns tick in CYCLE & TIME counters */
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#define TICKS_PER_SECOND (1000000)
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using namespace sc_core;
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using namespace sc_dt;
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using namespace std;
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/**
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* @brief Register file implementation
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*/
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class Registers {
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public:
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enum {
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x0 = 0,
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x1 = 1,
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x2,
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x3,
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x4,
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x5,
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x6,
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x7,
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x8,
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x9,
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x10,
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x11,
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x12,
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x13,
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x14,
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x15,
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x16,
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x17,
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x18,
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x19,
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x20,
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x21,
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x22,
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x23,
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x24,
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x25,
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x26,
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x27,
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x28,
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x29,
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x30,
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x31,
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zero = x0,
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ra = x1,
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sp = x2,
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gp = x3,
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tp = x4,
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t0 = x5,
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t1 = x6,
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t2 = x7,
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s0 = x8,
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fp = x8,
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s1 = x9,
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a0 = x10,
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a1 = x11,
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a2 = x12,
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a3 = x13,
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a4 = x14,
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a5 = x15,
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a6 = x16,
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a7 = x17,
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s2 = x18,
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s3 = x19,
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s4 = x20,
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s5 = x21,
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s6 = x22,
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s7 = x23,
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s8 = x24,
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s9 = x25,
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s10 = x26,
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s11 = x27,
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t3 = x28,
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t4 = x29,
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t5 = x30,
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t6 = x31
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};
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/**
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* Default constructor
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*/
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Registers();
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/**
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* Set value for a register
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* @param reg_num register number
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* @param value register value
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*/
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void setValue(int reg_num, int32_t value);
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/**
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* Returns register value
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* @param reg_num register number
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* @return register value
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*/
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int32_t getValue(int reg_num);
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/**
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* Returns PC value
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* @return PC value
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*/
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uint32_t getPC();
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/**
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* Sets arbitraty value to PC
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* @param new_pc new address to PC
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*/
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void setPC(uint32_t new_pc);
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/**
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* Increments PC couunter to next address
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*/
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inline void incPC(bool C_ext=false) {
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if (C_ext == true) {
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register_PC += 2;
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} else {
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register_PC += 4;
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}
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}
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/**
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* @brief Get CSR value
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* @param csr CSR number to access
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* @return CSR value
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*/
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uint32_t getCSR(int csr);
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/**
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* @brief Set CSR value
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* @param csr CSR number to access
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* @param value new value to register
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*/
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void setCSR(int csr, uint32_t value);
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/**
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* Dump register data to console
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*/
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void dump();
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private:
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/**
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* bank of registers (32 regs of 32bits each)
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*/
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int32_t register_bank[32];
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/**
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* Program counter (32 bits width)
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*/
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uint32_t register_PC;
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/**
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* CSR registers (4096 maximum)
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*/
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uint32_t CSR[4096];
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Performance *perf;
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void initCSR(void);
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};
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#endif
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