57 lines
1.4 KiB
ArmAsm
57 lines
1.4 KiB
ArmAsm
.global TIMER_CMP_INT
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.global portSAVE_CONTEXT
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.global portRESTORE_CONTEXT
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.globl timer_ISR
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#define STORE sw
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#define LOAD lw
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#define REGBYTES 4
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.align 2
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TIMER_CMP_INT:
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/* store execution context on the stack (register content) */
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addi sp, sp, -REGBYTES * 32
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STORE x1, 0x0(sp)
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STORE x4, 3 * REGBYTES(sp)
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STORE x5, 4 * REGBYTES(sp)
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STORE x6, 5 * REGBYTES(sp)
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STORE x7, 6 * REGBYTES(sp)
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STORE x10, 9 * REGBYTES(sp)
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STORE x11, 10 * REGBYTES(sp)
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STORE x12, 11 * REGBYTES(sp)
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STORE x13, 12 * REGBYTES(sp)
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STORE x14, 13 * REGBYTES(sp)
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STORE x15, 14 * REGBYTES(sp)
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STORE x16, 15 * REGBYTES(sp)
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STORE x17, 16 * REGBYTES(sp)
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STORE x28, 27 * REGBYTES(sp)
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STORE x29, 28 * REGBYTES(sp)
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STORE x30, 29 * REGBYTES(sp)
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STORE x31, 30 * REGBYTES(sp)
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/* load interrupt/trap reason and call external C function to handle it */
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csrr a0, mcause
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jal timer_ISR
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/* re-store the saved context */
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LOAD x1, 0x0(sp)
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LOAD x4, 3 * REGBYTES(sp)
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LOAD x5, 4 * REGBYTES(sp)
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LOAD x6, 5 * REGBYTES(sp)
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LOAD x7, 6 * REGBYTES(sp)
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LOAD x10, 9 * REGBYTES(sp)
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LOAD x11, 10 * REGBYTES(sp)
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LOAD x12, 11 * REGBYTES(sp)
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LOAD x13, 12 * REGBYTES(sp)
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LOAD x14, 13 * REGBYTES(sp)
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LOAD x15, 14 * REGBYTES(sp)
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LOAD x16, 15 * REGBYTES(sp)
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LOAD x17, 16 * REGBYTES(sp)
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LOAD x28, 27 * REGBYTES(sp)
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LOAD x29, 28 * REGBYTES(sp)
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LOAD x30, 29 * REGBYTES(sp)
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LOAD x31, 30 * REGBYTES(sp)
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addi sp, sp, REGBYTES * 32
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mret
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