353 lines
11 KiB
C++
353 lines
11 KiB
C++
/*!
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\file M_extension.h
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\brief Implement M extensions part of the RISC-V
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\author Màrius Montón
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\date November 2018
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*/
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// SPDX-License-Identifier: GPL-3.0-or-later
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#ifndef M_EXTENSION__H
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#define M_EXTENSION__H
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#include "systemc"
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#include "extension_base.h"
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#include "Registers.h"
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namespace riscv_tlm {
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typedef enum {
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OP_M_MUL,
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OP_M_MULH,
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OP_M_MULHSU,
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OP_M_MULHU,
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OP_M_DIV,
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OP_M_DIVU,
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OP_M_REM,
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OP_M_REMU,
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OP_M_ERROR
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} op_M_Codes;
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typedef enum {
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M_MUL = 0b000,
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M_MULH = 0b001,
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M_MULHSU = 0b010,
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M_MULHU = 0b011,
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M_DIV = 0b100,
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M_DIVU = 0b101,
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M_REM = 0b110,
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M_REMU = 0b111,
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} M_Codes;
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/**
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* @brief Instruction decoding and fields access
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*/
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template<typename T>
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class M_extension : public extension_base<T> {
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public:
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/**
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* @brief Constructor, same as base clase
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*/
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using extension_base<T>::extension_base;
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/**
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* @brief Decodes opcode of instruction
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* @return opcode of instruction
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*/
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[[nodiscard]] op_M_Codes decode() const {
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switch (opcode()) {
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case M_MUL:
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return OP_M_MUL;
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break;
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case M_MULH:
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return OP_M_MULH;
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break;
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case M_MULHSU:
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return OP_M_MULHSU;
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break;
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case M_MULHU:
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return OP_M_MULHU;
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break;
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case M_DIV:
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return OP_M_DIV;
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break;
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case M_DIVU:
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return OP_M_DIVU;
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break;
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case M_REM:
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return OP_M_REM;
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break;
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case M_REMU:
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return OP_M_REMU;
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break;
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[[unlikely]] default:
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return OP_M_ERROR;
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break;
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}
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return OP_M_ERROR;
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}
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inline void dump() const override {
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std::cout << std::hex << "0x" << this->m_instr << std::dec << std::endl;
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}
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void Exec_M_MUL() const {
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unsigned int rd, rs1, rs2;
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std::int32_t multiplier, multiplicand;
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std::int64_t result;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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multiplier = static_cast<std::int32_t>(extension_base<T>::regs->getValue(rs1));
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multiplicand = static_cast<std::int32_t>(extension_base<T>::regs->getValue(rs2));
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result = static_cast<std::int64_t>(multiplier * multiplicand);
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result = result & 0x00000000FFFFFFFF;
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this->regs->setValue(rd, static_cast<std::int32_t>(result));
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this->logger->debug("{} ns. PC: 0x{:x}. M.MUL: x{:d} * x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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extension_base<T>::regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_MULH() const {
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unsigned int rd, rs1, rs2;
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std::int32_t multiplier, multiplicand;
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std::int64_t result;
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std::int32_t ret_value;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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multiplier = static_cast<std::int32_t>(this->regs->getValue(rs1));
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multiplicand = static_cast<std::int32_t>(this->regs->getValue(rs2));
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result = static_cast<std::int64_t>(multiplier) * static_cast<std::int64_t>(multiplicand);
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ret_value = static_cast<std::int32_t>((result >> 32) & 0x00000000FFFFFFFF);
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this->regs->setValue(rd, ret_value);
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this->logger->debug("{} ns. PC: 0x{:x}. M.MULH: x{:d} * x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_MULHSU() const {
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unsigned int rd, rs1, rs2;
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std::int32_t multiplier;
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std::uint32_t multiplicand;
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std::int64_t result;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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multiplier = static_cast<std::int32_t>(this->regs->getValue(rs1));
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multiplicand = this->regs->getValue(rs2);
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result = static_cast<std::int64_t>(multiplier * static_cast<std::uint64_t>(multiplicand));
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result = (result >> 32) & 0x00000000FFFFFFFF;
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this->regs->setValue(rd, static_cast<std::int32_t>(result));
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this->logger->debug("{} ns. PC: 0x{:x}. M.MULHSU: x{:d} * x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_MULHU() const {
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unsigned int rd, rs1, rs2;
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std::uint32_t multiplier, multiplicand;
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std::uint64_t result;
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std::int32_t ret_value;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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multiplier = static_cast<std::int32_t>(this->regs->getValue(rs1));
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multiplicand = static_cast<std::int32_t>(this->regs->getValue(rs2));
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result = static_cast<std::uint64_t>(multiplier) * static_cast<std::uint64_t>(multiplicand);
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ret_value = static_cast<std::int32_t>((result >> 32) & 0x00000000FFFFFFFF);
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this->regs->setValue(rd, ret_value);
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this->logger->debug("{} ns. PC: 0x{:x}. M.MULHU: x{:d} * x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_DIV() const {
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unsigned int rd, rs1, rs2;
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std::int32_t divisor, dividend;
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std::int64_t result;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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dividend = static_cast<std::int32_t>(this->regs->getValue(rs1));
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divisor = static_cast<std::int32_t>(this->regs->getValue(rs2));
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if (divisor == 0) {
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result = -1;
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} else if ((divisor == -1) && (dividend == static_cast<std::int32_t>(0x80000000))) {
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result = 0x0000000080000000;
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} else {
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result = dividend / divisor;
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result = result & 0x00000000FFFFFFFF;
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}
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this->regs->setValue(rd, static_cast<std::int32_t>(result));
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this->logger->debug("{} ns. PC: 0x{:x}. M.DIV: x{:d} / x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_DIVU() const {
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unsigned int rd, rs1, rs2;
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std::uint32_t divisor, dividend;
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std::uint64_t result;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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dividend = this->regs->getValue(rs1);
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divisor = this->regs->getValue(rs2);
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if (divisor == 0) {
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result = -1;
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} else {
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result = dividend / divisor;
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result = result & 0x00000000FFFFFFFF;
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}
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this->regs->setValue(rd, static_cast<std::int32_t>(result));
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this->logger->debug("{} ns. PC: 0x{:x}. M.DIVU: x{:d} / x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_REM() const {
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unsigned int rd, rs1, rs2;
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std::int32_t divisor, dividend;
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std::int32_t result;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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dividend = static_cast<std::int32_t>(this->regs->getValue(rs1));
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divisor = static_cast<std::int32_t>(this->regs->getValue(rs2));
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if (divisor == 0) {
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result = dividend;
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} else if ((divisor == -1) && (dividend == static_cast<std::int32_t>(0x80000000))) {
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result = 0;
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} else {
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result = dividend % divisor;
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}
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this->regs->setValue(rd, result);
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this->logger->debug("{} ns. PC: 0x{:x}. M.REM: x{:d} / x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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void Exec_M_REMU() const {
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unsigned int rd, rs1, rs2;
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std::uint32_t divisor, dividend;
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std::uint32_t result;
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rd = this->get_rd();
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rs1 = this->get_rs1();
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rs2 = this->get_rs2();
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dividend = static_cast<std::int32_t>(this->regs->getValue(rs1));
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divisor = static_cast<std::int32_t>(this->regs->getValue(rs2));
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if (divisor == 0) {
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result = dividend;
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} else {
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result = dividend % divisor;
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}
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this->regs->setValue(rd, static_cast<std::int32_t>(result));
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this->logger->debug("{} ns. PC: 0x{:x}. M.REMU: x{:d} / x{:d} -> x{:d}({:d})",
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sc_core::sc_time_stamp().value(),
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this->regs->getPC(),
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rs1, rs2, rd, result);
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}
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bool process_instruction(Instruction &inst) {
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this->setInstr(inst.getInstr());
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switch (decode()) {
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case OP_M_MUL:
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Exec_M_MUL();
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break;
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case OP_M_MULH:
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Exec_M_MULH();
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break;
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case OP_M_MULHSU:
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Exec_M_MULHSU();
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break;
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case OP_M_MULHU:
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Exec_M_MULHU();
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break;
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case OP_M_DIV:
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Exec_M_DIV();
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break;
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case OP_M_DIVU:
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Exec_M_DIVU();
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break;
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case OP_M_REM:
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Exec_M_REM();
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break;
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case OP_M_REMU:
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Exec_M_REMU();
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break;
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[[unlikely]] default:
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std::cout << "M instruction not implemented yet" << "\n";
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inst.dump();
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//NOP(inst);
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sc_core::sc_stop();
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break;
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}
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return true;
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}
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private:
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/**
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* @brief Access to opcode field
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* @return return opcode field
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*/
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[[nodiscard]] inline std::uint32_t opcode() const override {
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return static_cast<std::uint32_t>(this->m_instr.range(14, 12));
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}
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};
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}
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#endif
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