diff --git a/nitefury_pcie_xdma_ddr/project/sources/ip/Top_axi_bram_ctrl_0_0/Top_axi_bram_ctrl_0_0.xci b/nitefury_pcie_xdma_ddr/project/sources/ip/Top_axi_bram_ctrl_0_0/Top_axi_bram_ctrl_0_0.xci index 5ec5d02..14b3595 100644 --- a/nitefury_pcie_xdma_ddr/project/sources/ip/Top_axi_bram_ctrl_0_0/Top_axi_bram_ctrl_0_0.xci +++ b/nitefury_pcie_xdma_ddr/project/sources/ip/Top_axi_bram_ctrl_0_0/Top_axi_bram_ctrl_0_0.xci @@ -244,7 +244,7 @@ "description": "Memory Map for S_AXI", "address_blocks": { "Mem0": { - "base_address": "0", + "base_address": "4294967296", "range": "4096", "display_name": "Mem0", "description": "Register Block", diff --git a/nitefury_pcie_xdma_ddr/project/sources/ip/Top_blk_mem_gen_0_0/Top_blk_mem_gen_0_0.xci b/nitefury_pcie_xdma_ddr/project/sources/ip/Top_blk_mem_gen_0_0/Top_blk_mem_gen_0_0.xci index 85fb810..f5f615f 100644 --- a/nitefury_pcie_xdma_ddr/project/sources/ip/Top_blk_mem_gen_0_0/Top_blk_mem_gen_0_0.xci +++ b/nitefury_pcie_xdma_ddr/project/sources/ip/Top_blk_mem_gen_0_0/Top_blk_mem_gen_0_0.xci @@ -247,7 +247,7 @@ "S_1": { "address_blocks": { "Mem0": { - "base_address": "0", + "base_address": "4294967296", "range": "4096", "usage": "memory", "access": "read-write", diff --git a/nitefury_pcie_xdma_ddr/project/sources/ip/Top_mig_7series_1_0/Top_mig_7series_1_0.xci b/nitefury_pcie_xdma_ddr/project/sources/ip/Top_mig_7series_1_0/Top_mig_7series_1_0.xci index 60026ee..392e499 100644 --- a/nitefury_pcie_xdma_ddr/project/sources/ip/Top_mig_7series_1_0/Top_mig_7series_1_0.xci +++ b/nitefury_pcie_xdma_ddr/project/sources/ip/Top_mig_7series_1_0/Top_mig_7series_1_0.xci @@ -2147,7 +2147,7 @@ "c0_s_axi_ctrl_memmap": { "address_blocks": { "c0_s_axi_ctrl_memaddr": { - "base_address": "0", + "base_address": "4295229440", "range": "1048576", "usage": "register", "access": "read-write" @@ -2167,7 +2167,7 @@ "c1_s_axi_ctrl_memmap": { "address_blocks": { "c1_s_axi_ctrl_memaddr": { - "base_address": "0", + "base_address": "4295491584", "range": "1048576", "usage": "register", "access": "read-write" @@ -2177,7 +2177,7 @@ "c1_memmap": { "address_blocks": { "c1_memaddr": { - "base_address": "0", + "base_address": "2147483648", "range": "2147483648", "usage": "memory", "access": "read-write" diff --git a/nitefury_pcie_xdma_ddr/project/xdma_ddr_prog.tcl b/nitefury_pcie_xdma_ddr/project/xdma_ddr_prog.tcl new file mode 100644 index 0000000..1df9795 --- /dev/null +++ b/nitefury_pcie_xdma_ddr/project/xdma_ddr_prog.tcl @@ -0,0 +1,9 @@ + + +if { [ catch { open_hw_manager } ] } { open_hw } +connect_hw_server +open_hw_target +puts [get_hw_devices] +set obj [lindex [get_hw_devices [current_hw_device]] 0] +set_property PROGRAM.FILE ./xdma_ddr.bit $obj +program_hw_devices $obj \ No newline at end of file