xc7k480t/nitefury_pcie_xdma_ddr
Colin 55677acfde Update nitefury_pcie_xdma_ddr address map and dma test. pass all. 2025-05-15 00:35:46 +08:00
..
project Update nitefury_pcie_xdma_ddr address map and dma test. pass all. 2025-05-15 00:35:46 +08:00
.gitignore Update nitefury_pcie_xdma_ddr. 2025-05-11 00:07:51 +08:00
LICENSE Add nitefury_pcie_xdma_ddr. 2025-05-10 13:29:27 +08:00
README.md Add nitefury_pcie_xdma_ddr. 2025-05-10 13:29:27 +08:00
dma_test.py Update nitefury_pcie_xdma_ddr address map and dma test. pass all. 2025-05-15 00:35:46 +08:00
nitefury_xdma_ddr_v1.zip Add nitefury_xdma_ddr_v2.zip. 2025-05-14 00:45:26 +08:00
nitefury_xdma_ddr_v2.zip Add nitefury_xdma_ddr_v2.zip. 2025-05-14 00:45:26 +08:00

README.md

nitefury_pcie_xdma_ddr

Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board

Follow the step by step guide on our website:- https://fpganinjas.io/xdma-pcie-vivado/