3311 lines
145 KiB
Verilog
3311 lines
145 KiB
Verilog
//Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
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//--------------------------------------------------------------------------------
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//Tool Version: Vivado v.2022.2 (lin64) Build 3671981 Fri Oct 14 04:59:54 MDT 2022
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//Date : Wed May 14 00:03:48 2025
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//Host : colin-9700k running 64-bit Ubuntu 22.04.5 LTS
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//Command : generate_target Top.bd
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//Design : Top
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//Purpose : IP block netlist
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//--------------------------------------------------------------------------------
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`timescale 1 ps / 1 ps
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(* CORE_GENERATION_INFO = "Top,IP_Integrator,{x_ipVendor=xilinx.com,x_ipLibrary=BlockDiagram,x_ipName=Top,x_ipVersion=1.00.a,x_ipLanguage=VERILOG,numBlks=19,numReposBlks=14,numNonXlnxBlks=0,numHierBlks=5,maxHierDepth=0,numSysgenBlks=0,numHlsBlks=0,numHdlrefBlks=0,numPkgbdBlks=0,bdsource=USER,synth_mode=OOC_per_IP}" *) (* HW_HANDOFF = "Top.hwdef" *)
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module Top
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(C0_DDR3_0_addr,
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C0_DDR3_0_ba,
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C0_DDR3_0_cas_n,
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C0_DDR3_0_ck_n,
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C0_DDR3_0_ck_p,
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C0_DDR3_0_cke,
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C0_DDR3_0_cs_n,
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C0_DDR3_0_dq,
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C0_DDR3_0_dqs_n,
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C0_DDR3_0_dqs_p,
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C0_DDR3_0_odt,
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C0_DDR3_0_ras_n,
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C0_DDR3_0_reset_n,
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C0_DDR3_0_we_n,
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C0_SYS_CLK_0_clk_n,
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C0_SYS_CLK_0_clk_p,
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C1_DDR3_0_addr,
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C1_DDR3_0_ba,
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C1_DDR3_0_cas_n,
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C1_DDR3_0_ck_n,
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C1_DDR3_0_ck_p,
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C1_DDR3_0_cke,
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C1_DDR3_0_cs_n,
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C1_DDR3_0_dq,
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C1_DDR3_0_dqs_n,
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C1_DDR3_0_dqs_p,
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C1_DDR3_0_odt,
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C1_DDR3_0_ras_n,
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C1_DDR3_0_reset_n,
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C1_DDR3_0_we_n,
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C1_SYS_CLK_0_clk_n,
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C1_SYS_CLK_0_clk_p,
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pci_reset,
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pcie_clkin_clk_n,
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pcie_clkin_clk_p,
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pcie_mgt_0_rxn,
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pcie_mgt_0_rxp,
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pcie_mgt_0_txn,
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pcie_mgt_0_txp,
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user_lnk_up_0);
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 ADDR" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME C0_DDR3_0, AXI_ARBITRATION_SCHEME TDM, BURST_LENGTH 8, CAN_DEBUG false, CAS_LATENCY 11, CAS_WRITE_LATENCY 11, CS_ENABLED true, DATA_MASK_ENABLED true, DATA_WIDTH 8, MEMORY_TYPE COMPONENTS, MEM_ADDR_MAP ROW_COLUMN_BANK, SLOT Single, TIMEPERIOD_PS 1250" *) output [14:0]C0_DDR3_0_addr;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 BA" *) output [2:0]C0_DDR3_0_ba;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 CAS_N" *) output C0_DDR3_0_cas_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 CK_N" *) output [0:0]C0_DDR3_0_ck_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 CK_P" *) output [0:0]C0_DDR3_0_ck_p;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 CKE" *) output [0:0]C0_DDR3_0_cke;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 CS_N" *) output [0:0]C0_DDR3_0_cs_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 DQ" *) inout [71:0]C0_DDR3_0_dq;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 DQS_N" *) inout [8:0]C0_DDR3_0_dqs_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 DQS_P" *) inout [8:0]C0_DDR3_0_dqs_p;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 ODT" *) output [0:0]C0_DDR3_0_odt;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 RAS_N" *) output C0_DDR3_0_ras_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 RESET_N" *) output C0_DDR3_0_reset_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C0_DDR3_0 WE_N" *) output C0_DDR3_0_we_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:diff_clock:1.0 C0_SYS_CLK_0 CLK_N" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME C0_SYS_CLK_0, CAN_DEBUG false, FREQ_HZ 100000000" *) input C0_SYS_CLK_0_clk_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:diff_clock:1.0 C0_SYS_CLK_0 CLK_P" *) input C0_SYS_CLK_0_clk_p;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 ADDR" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME C1_DDR3_0, AXI_ARBITRATION_SCHEME TDM, BURST_LENGTH 8, CAN_DEBUG false, CAS_LATENCY 11, CAS_WRITE_LATENCY 11, CS_ENABLED true, DATA_MASK_ENABLED true, DATA_WIDTH 8, MEMORY_TYPE COMPONENTS, MEM_ADDR_MAP ROW_COLUMN_BANK, SLOT Single, TIMEPERIOD_PS 1250" *) output [14:0]C1_DDR3_0_addr;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 BA" *) output [2:0]C1_DDR3_0_ba;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 CAS_N" *) output C1_DDR3_0_cas_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 CK_N" *) output [0:0]C1_DDR3_0_ck_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 CK_P" *) output [0:0]C1_DDR3_0_ck_p;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 CKE" *) output [0:0]C1_DDR3_0_cke;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 CS_N" *) output [0:0]C1_DDR3_0_cs_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 DQ" *) inout [71:0]C1_DDR3_0_dq;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 DQS_N" *) inout [8:0]C1_DDR3_0_dqs_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 DQS_P" *) inout [8:0]C1_DDR3_0_dqs_p;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 ODT" *) output [0:0]C1_DDR3_0_odt;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 RAS_N" *) output C1_DDR3_0_ras_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 RESET_N" *) output C1_DDR3_0_reset_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 C1_DDR3_0 WE_N" *) output C1_DDR3_0_we_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:diff_clock:1.0 C1_SYS_CLK_0 CLK_N" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME C1_SYS_CLK_0, CAN_DEBUG false, FREQ_HZ 100000000" *) input C1_SYS_CLK_0_clk_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:diff_clock:1.0 C1_SYS_CLK_0 CLK_P" *) input C1_SYS_CLK_0_clk_p;
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(* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 RST.PCI_RESET RST" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME RST.PCI_RESET, INSERT_VIP 0, POLARITY ACTIVE_LOW" *) input pci_reset;
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(* X_INTERFACE_INFO = "xilinx.com:interface:diff_clock:1.0 pcie_clkin CLK_N" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME pcie_clkin, CAN_DEBUG false, FREQ_HZ 100000000" *) input [0:0]pcie_clkin_clk_n;
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(* X_INTERFACE_INFO = "xilinx.com:interface:diff_clock:1.0 pcie_clkin CLK_P" *) input [0:0]pcie_clkin_clk_p;
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(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_mgt_0 rxn" *) input [0:0]pcie_mgt_0_rxn;
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(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_mgt_0 rxp" *) input [0:0]pcie_mgt_0_rxp;
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(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_mgt_0 txn" *) output [0:0]pcie_mgt_0_txn;
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(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_mgt_0 txp" *) output [0:0]pcie_mgt_0_txp;
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output user_lnk_up_0;
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wire C0_SYS_CLK_0_1_CLK_N;
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wire C0_SYS_CLK_0_1_CLK_P;
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wire C1_SYS_CLK_0_1_CLK_N;
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wire C1_SYS_CLK_0_1_CLK_P;
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wire M01_ACLK_1;
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wire S00_ACLK_1;
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wire S00_ARESETN_1;
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wire [63:0]S00_AXI_1_ARADDR;
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wire [1:0]S00_AXI_1_ARBURST;
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wire [3:0]S00_AXI_1_ARCACHE;
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wire [3:0]S00_AXI_1_ARID;
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wire [7:0]S00_AXI_1_ARLEN;
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wire S00_AXI_1_ARLOCK;
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wire [2:0]S00_AXI_1_ARPROT;
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wire [0:0]S00_AXI_1_ARREADY;
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wire [2:0]S00_AXI_1_ARSIZE;
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wire S00_AXI_1_ARVALID;
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wire [63:0]S00_AXI_1_AWADDR;
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wire [1:0]S00_AXI_1_AWBURST;
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wire [3:0]S00_AXI_1_AWCACHE;
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wire [3:0]S00_AXI_1_AWID;
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wire [7:0]S00_AXI_1_AWLEN;
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wire S00_AXI_1_AWLOCK;
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wire [2:0]S00_AXI_1_AWPROT;
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wire [0:0]S00_AXI_1_AWREADY;
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wire [2:0]S00_AXI_1_AWSIZE;
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wire S00_AXI_1_AWVALID;
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wire [3:0]S00_AXI_1_BID;
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wire S00_AXI_1_BREADY;
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wire [1:0]S00_AXI_1_BRESP;
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wire [0:0]S00_AXI_1_BVALID;
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wire [63:0]S00_AXI_1_RDATA;
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wire [3:0]S00_AXI_1_RID;
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wire [0:0]S00_AXI_1_RLAST;
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wire S00_AXI_1_RREADY;
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wire [1:0]S00_AXI_1_RRESP;
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wire [0:0]S00_AXI_1_RVALID;
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wire [63:0]S00_AXI_1_WDATA;
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wire S00_AXI_1_WLAST;
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wire [0:0]S00_AXI_1_WREADY;
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wire [7:0]S00_AXI_1_WSTRB;
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wire S00_AXI_1_WVALID;
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wire [12:0]axi_bram_ctrl_0_BRAM_PORTA_ADDR;
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wire axi_bram_ctrl_0_BRAM_PORTA_CLK;
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wire [63:0]axi_bram_ctrl_0_BRAM_PORTA_DIN;
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wire [63:0]axi_bram_ctrl_0_BRAM_PORTA_DOUT;
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wire axi_bram_ctrl_0_BRAM_PORTA_EN;
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wire axi_bram_ctrl_0_BRAM_PORTA_RST;
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wire [7:0]axi_bram_ctrl_0_BRAM_PORTA_WE;
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wire [30:0]axi_interconnect_0_M00_AXI_ARADDR;
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wire [1:0]axi_interconnect_0_M00_AXI_ARBURST;
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wire [3:0]axi_interconnect_0_M00_AXI_ARCACHE;
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wire [3:0]axi_interconnect_0_M00_AXI_ARID;
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wire [7:0]axi_interconnect_0_M00_AXI_ARLEN;
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wire axi_interconnect_0_M00_AXI_ARLOCK;
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wire [2:0]axi_interconnect_0_M00_AXI_ARPROT;
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wire [3:0]axi_interconnect_0_M00_AXI_ARQOS;
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wire axi_interconnect_0_M00_AXI_ARREADY;
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wire [2:0]axi_interconnect_0_M00_AXI_ARSIZE;
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wire axi_interconnect_0_M00_AXI_ARVALID;
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wire [30:0]axi_interconnect_0_M00_AXI_AWADDR;
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wire [1:0]axi_interconnect_0_M00_AXI_AWBURST;
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wire [3:0]axi_interconnect_0_M00_AXI_AWCACHE;
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wire [3:0]axi_interconnect_0_M00_AXI_AWID;
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wire [7:0]axi_interconnect_0_M00_AXI_AWLEN;
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wire axi_interconnect_0_M00_AXI_AWLOCK;
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wire [2:0]axi_interconnect_0_M00_AXI_AWPROT;
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wire [3:0]axi_interconnect_0_M00_AXI_AWQOS;
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wire axi_interconnect_0_M00_AXI_AWREADY;
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wire [2:0]axi_interconnect_0_M00_AXI_AWSIZE;
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wire axi_interconnect_0_M00_AXI_AWVALID;
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wire [3:0]axi_interconnect_0_M00_AXI_BID;
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wire axi_interconnect_0_M00_AXI_BREADY;
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wire [1:0]axi_interconnect_0_M00_AXI_BRESP;
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wire axi_interconnect_0_M00_AXI_BVALID;
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wire [63:0]axi_interconnect_0_M00_AXI_RDATA;
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wire [3:0]axi_interconnect_0_M00_AXI_RID;
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wire axi_interconnect_0_M00_AXI_RLAST;
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wire axi_interconnect_0_M00_AXI_RREADY;
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wire [1:0]axi_interconnect_0_M00_AXI_RRESP;
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wire axi_interconnect_0_M00_AXI_RVALID;
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wire [63:0]axi_interconnect_0_M00_AXI_WDATA;
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wire axi_interconnect_0_M00_AXI_WLAST;
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wire axi_interconnect_0_M00_AXI_WREADY;
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wire [7:0]axi_interconnect_0_M00_AXI_WSTRB;
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wire axi_interconnect_0_M00_AXI_WVALID;
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wire [30:0]axi_interconnect_0_M01_AXI_ARADDR;
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wire [1:0]axi_interconnect_0_M01_AXI_ARBURST;
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wire [3:0]axi_interconnect_0_M01_AXI_ARCACHE;
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wire [3:0]axi_interconnect_0_M01_AXI_ARID;
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wire [7:0]axi_interconnect_0_M01_AXI_ARLEN;
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wire axi_interconnect_0_M01_AXI_ARLOCK;
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wire [2:0]axi_interconnect_0_M01_AXI_ARPROT;
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wire [3:0]axi_interconnect_0_M01_AXI_ARQOS;
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wire axi_interconnect_0_M01_AXI_ARREADY;
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wire [2:0]axi_interconnect_0_M01_AXI_ARSIZE;
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wire axi_interconnect_0_M01_AXI_ARVALID;
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wire [30:0]axi_interconnect_0_M01_AXI_AWADDR;
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wire [1:0]axi_interconnect_0_M01_AXI_AWBURST;
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wire [3:0]axi_interconnect_0_M01_AXI_AWCACHE;
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wire [3:0]axi_interconnect_0_M01_AXI_AWID;
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wire [7:0]axi_interconnect_0_M01_AXI_AWLEN;
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wire axi_interconnect_0_M01_AXI_AWLOCK;
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wire [2:0]axi_interconnect_0_M01_AXI_AWPROT;
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wire [3:0]axi_interconnect_0_M01_AXI_AWQOS;
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wire axi_interconnect_0_M01_AXI_AWREADY;
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wire [2:0]axi_interconnect_0_M01_AXI_AWSIZE;
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wire axi_interconnect_0_M01_AXI_AWVALID;
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wire [3:0]axi_interconnect_0_M01_AXI_BID;
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wire axi_interconnect_0_M01_AXI_BREADY;
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wire [1:0]axi_interconnect_0_M01_AXI_BRESP;
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wire axi_interconnect_0_M01_AXI_BVALID;
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wire [63:0]axi_interconnect_0_M01_AXI_RDATA;
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wire [3:0]axi_interconnect_0_M01_AXI_RID;
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wire axi_interconnect_0_M01_AXI_RLAST;
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wire axi_interconnect_0_M01_AXI_RREADY;
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wire [1:0]axi_interconnect_0_M01_AXI_RRESP;
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wire axi_interconnect_0_M01_AXI_RVALID;
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wire [63:0]axi_interconnect_0_M01_AXI_WDATA;
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wire axi_interconnect_0_M01_AXI_WLAST;
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wire axi_interconnect_0_M01_AXI_WREADY;
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wire [7:0]axi_interconnect_0_M01_AXI_WSTRB;
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wire axi_interconnect_0_M01_AXI_WVALID;
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wire [63:0]axi_interconnect_0_M02_AXI_ARADDR;
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wire [1:0]axi_interconnect_0_M02_AXI_ARBURST;
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wire [3:0]axi_interconnect_0_M02_AXI_ARCACHE;
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wire [3:0]axi_interconnect_0_M02_AXI_ARID;
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wire [7:0]axi_interconnect_0_M02_AXI_ARLEN;
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wire axi_interconnect_0_M02_AXI_ARLOCK;
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wire [2:0]axi_interconnect_0_M02_AXI_ARPROT;
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wire axi_interconnect_0_M02_AXI_ARREADY;
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wire [2:0]axi_interconnect_0_M02_AXI_ARSIZE;
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wire axi_interconnect_0_M02_AXI_ARVALID;
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wire [63:0]axi_interconnect_0_M02_AXI_AWADDR;
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wire [1:0]axi_interconnect_0_M02_AXI_AWBURST;
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wire [3:0]axi_interconnect_0_M02_AXI_AWCACHE;
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wire [3:0]axi_interconnect_0_M02_AXI_AWID;
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wire [7:0]axi_interconnect_0_M02_AXI_AWLEN;
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wire axi_interconnect_0_M02_AXI_AWLOCK;
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wire [2:0]axi_interconnect_0_M02_AXI_AWPROT;
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wire axi_interconnect_0_M02_AXI_AWREADY;
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wire [2:0]axi_interconnect_0_M02_AXI_AWSIZE;
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wire axi_interconnect_0_M02_AXI_AWVALID;
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wire [3:0]axi_interconnect_0_M02_AXI_BID;
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wire axi_interconnect_0_M02_AXI_BREADY;
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wire [1:0]axi_interconnect_0_M02_AXI_BRESP;
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wire axi_interconnect_0_M02_AXI_BVALID;
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wire [63:0]axi_interconnect_0_M02_AXI_RDATA;
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wire [3:0]axi_interconnect_0_M02_AXI_RID;
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wire axi_interconnect_0_M02_AXI_RLAST;
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wire axi_interconnect_0_M02_AXI_RREADY;
|
|
wire [1:0]axi_interconnect_0_M02_AXI_RRESP;
|
|
wire axi_interconnect_0_M02_AXI_RVALID;
|
|
wire [63:0]axi_interconnect_0_M02_AXI_WDATA;
|
|
wire axi_interconnect_0_M02_AXI_WLAST;
|
|
wire axi_interconnect_0_M02_AXI_WREADY;
|
|
wire [7:0]axi_interconnect_0_M02_AXI_WSTRB;
|
|
wire axi_interconnect_0_M02_AXI_WVALID;
|
|
wire [63:0]jtag_axi_0_M_AXI_ARADDR;
|
|
wire jtag_axi_0_M_AXI_ARREADY;
|
|
wire jtag_axi_0_M_AXI_ARVALID;
|
|
wire [63:0]jtag_axi_0_M_AXI_AWADDR;
|
|
wire jtag_axi_0_M_AXI_AWREADY;
|
|
wire jtag_axi_0_M_AXI_AWVALID;
|
|
wire jtag_axi_0_M_AXI_BREADY;
|
|
wire [1:0]jtag_axi_0_M_AXI_BRESP;
|
|
wire jtag_axi_0_M_AXI_BVALID;
|
|
wire [31:0]jtag_axi_0_M_AXI_RDATA;
|
|
wire jtag_axi_0_M_AXI_RREADY;
|
|
wire [1:0]jtag_axi_0_M_AXI_RRESP;
|
|
wire jtag_axi_0_M_AXI_RVALID;
|
|
wire [31:0]jtag_axi_0_M_AXI_WDATA;
|
|
wire jtag_axi_0_M_AXI_WREADY;
|
|
wire jtag_axi_0_M_AXI_WVALID;
|
|
wire [63:0]jtag_axi_1_M_AXI_ARADDR;
|
|
wire jtag_axi_1_M_AXI_ARREADY;
|
|
wire jtag_axi_1_M_AXI_ARVALID;
|
|
wire [63:0]jtag_axi_1_M_AXI_AWADDR;
|
|
wire jtag_axi_1_M_AXI_AWREADY;
|
|
wire jtag_axi_1_M_AXI_AWVALID;
|
|
wire jtag_axi_1_M_AXI_BREADY;
|
|
wire [1:0]jtag_axi_1_M_AXI_BRESP;
|
|
wire jtag_axi_1_M_AXI_BVALID;
|
|
wire [31:0]jtag_axi_1_M_AXI_RDATA;
|
|
wire jtag_axi_1_M_AXI_RREADY;
|
|
wire [1:0]jtag_axi_1_M_AXI_RRESP;
|
|
wire jtag_axi_1_M_AXI_RVALID;
|
|
wire [31:0]jtag_axi_1_M_AXI_WDATA;
|
|
wire jtag_axi_1_M_AXI_WREADY;
|
|
wire jtag_axi_1_M_AXI_WVALID;
|
|
wire [14:0]mig_7series_1_C0_DDR3_ADDR;
|
|
wire [2:0]mig_7series_1_C0_DDR3_BA;
|
|
wire mig_7series_1_C0_DDR3_CAS_N;
|
|
wire [0:0]mig_7series_1_C0_DDR3_CKE;
|
|
wire [0:0]mig_7series_1_C0_DDR3_CK_N;
|
|
wire [0:0]mig_7series_1_C0_DDR3_CK_P;
|
|
wire [0:0]mig_7series_1_C0_DDR3_CS_N;
|
|
wire [71:0]mig_7series_1_C0_DDR3_DQ;
|
|
wire [8:0]mig_7series_1_C0_DDR3_DQS_N;
|
|
wire [8:0]mig_7series_1_C0_DDR3_DQS_P;
|
|
wire [0:0]mig_7series_1_C0_DDR3_ODT;
|
|
wire mig_7series_1_C0_DDR3_RAS_N;
|
|
wire mig_7series_1_C0_DDR3_RESET_N;
|
|
wire mig_7series_1_C0_DDR3_WE_N;
|
|
wire [14:0]mig_7series_1_C1_DDR3_ADDR;
|
|
wire [2:0]mig_7series_1_C1_DDR3_BA;
|
|
wire mig_7series_1_C1_DDR3_CAS_N;
|
|
wire [0:0]mig_7series_1_C1_DDR3_CKE;
|
|
wire [0:0]mig_7series_1_C1_DDR3_CK_N;
|
|
wire [0:0]mig_7series_1_C1_DDR3_CK_P;
|
|
wire [0:0]mig_7series_1_C1_DDR3_CS_N;
|
|
wire [71:0]mig_7series_1_C1_DDR3_DQ;
|
|
wire [8:0]mig_7series_1_C1_DDR3_DQS_N;
|
|
wire [8:0]mig_7series_1_C1_DDR3_DQS_P;
|
|
wire [0:0]mig_7series_1_C1_DDR3_ODT;
|
|
wire mig_7series_1_C1_DDR3_RAS_N;
|
|
wire mig_7series_1_C1_DDR3_RESET_N;
|
|
wire mig_7series_1_C1_DDR3_WE_N;
|
|
wire mig_7series_1_c0_ui_clk;
|
|
wire mig_7series_1_c0_ui_clk_sync_rst;
|
|
wire mig_7series_1_c1_ui_clk_sync_rst;
|
|
wire pci_reset_1;
|
|
wire [0:0]pcie_clkin_1_CLK_N;
|
|
wire [0:0]pcie_clkin_1_CLK_P;
|
|
wire [0:0]util_ds_buf_0_IBUF_OUT;
|
|
wire [7:0]util_vector_logic_0_Res;
|
|
wire [7:0]util_vector_logic_1_Res;
|
|
wire [0:0]xdma_1_pcie_mgt_rxn;
|
|
wire [0:0]xdma_1_pcie_mgt_rxp;
|
|
wire [0:0]xdma_1_pcie_mgt_txn;
|
|
wire [0:0]xdma_1_pcie_mgt_txp;
|
|
wire xdma_1_user_lnk_up;
|
|
wire [0:0]xlconstant_0_dout;
|
|
wire [0:0]xlconstant_2_dout;
|
|
|
|
assign C0_DDR3_0_addr[14:0] = mig_7series_1_C0_DDR3_ADDR;
|
|
assign C0_DDR3_0_ba[2:0] = mig_7series_1_C0_DDR3_BA;
|
|
assign C0_DDR3_0_cas_n = mig_7series_1_C0_DDR3_CAS_N;
|
|
assign C0_DDR3_0_ck_n[0] = mig_7series_1_C0_DDR3_CK_N;
|
|
assign C0_DDR3_0_ck_p[0] = mig_7series_1_C0_DDR3_CK_P;
|
|
assign C0_DDR3_0_cke[0] = mig_7series_1_C0_DDR3_CKE;
|
|
assign C0_DDR3_0_cs_n[0] = mig_7series_1_C0_DDR3_CS_N;
|
|
assign C0_DDR3_0_odt[0] = mig_7series_1_C0_DDR3_ODT;
|
|
assign C0_DDR3_0_ras_n = mig_7series_1_C0_DDR3_RAS_N;
|
|
assign C0_DDR3_0_reset_n = mig_7series_1_C0_DDR3_RESET_N;
|
|
assign C0_DDR3_0_we_n = mig_7series_1_C0_DDR3_WE_N;
|
|
assign C0_SYS_CLK_0_1_CLK_N = C0_SYS_CLK_0_clk_n;
|
|
assign C0_SYS_CLK_0_1_CLK_P = C0_SYS_CLK_0_clk_p;
|
|
assign C1_DDR3_0_addr[14:0] = mig_7series_1_C1_DDR3_ADDR;
|
|
assign C1_DDR3_0_ba[2:0] = mig_7series_1_C1_DDR3_BA;
|
|
assign C1_DDR3_0_cas_n = mig_7series_1_C1_DDR3_CAS_N;
|
|
assign C1_DDR3_0_ck_n[0] = mig_7series_1_C1_DDR3_CK_N;
|
|
assign C1_DDR3_0_ck_p[0] = mig_7series_1_C1_DDR3_CK_P;
|
|
assign C1_DDR3_0_cke[0] = mig_7series_1_C1_DDR3_CKE;
|
|
assign C1_DDR3_0_cs_n[0] = mig_7series_1_C1_DDR3_CS_N;
|
|
assign C1_DDR3_0_odt[0] = mig_7series_1_C1_DDR3_ODT;
|
|
assign C1_DDR3_0_ras_n = mig_7series_1_C1_DDR3_RAS_N;
|
|
assign C1_DDR3_0_reset_n = mig_7series_1_C1_DDR3_RESET_N;
|
|
assign C1_DDR3_0_we_n = mig_7series_1_C1_DDR3_WE_N;
|
|
assign C1_SYS_CLK_0_1_CLK_N = C1_SYS_CLK_0_clk_n;
|
|
assign C1_SYS_CLK_0_1_CLK_P = C1_SYS_CLK_0_clk_p;
|
|
assign pci_reset_1 = pci_reset;
|
|
assign pcie_clkin_1_CLK_N = pcie_clkin_clk_n[0];
|
|
assign pcie_clkin_1_CLK_P = pcie_clkin_clk_p[0];
|
|
assign pcie_mgt_0_txn[0] = xdma_1_pcie_mgt_txn;
|
|
assign pcie_mgt_0_txp[0] = xdma_1_pcie_mgt_txp;
|
|
assign user_lnk_up_0 = xdma_1_user_lnk_up;
|
|
assign xdma_1_pcie_mgt_rxn = pcie_mgt_0_rxn[0];
|
|
assign xdma_1_pcie_mgt_rxp = pcie_mgt_0_rxp[0];
|
|
Top_axi_bram_ctrl_0_0 axi_bram_ctrl_0
|
|
(.bram_addr_a(axi_bram_ctrl_0_BRAM_PORTA_ADDR),
|
|
.bram_clk_a(axi_bram_ctrl_0_BRAM_PORTA_CLK),
|
|
.bram_en_a(axi_bram_ctrl_0_BRAM_PORTA_EN),
|
|
.bram_rddata_a(axi_bram_ctrl_0_BRAM_PORTA_DOUT),
|
|
.bram_rst_a(axi_bram_ctrl_0_BRAM_PORTA_RST),
|
|
.bram_we_a(axi_bram_ctrl_0_BRAM_PORTA_WE),
|
|
.bram_wrdata_a(axi_bram_ctrl_0_BRAM_PORTA_DIN),
|
|
.s_axi_aclk(S00_ACLK_1),
|
|
.s_axi_araddr(axi_interconnect_0_M02_AXI_ARADDR[12:0]),
|
|
.s_axi_arburst(axi_interconnect_0_M02_AXI_ARBURST),
|
|
.s_axi_arcache(axi_interconnect_0_M02_AXI_ARCACHE),
|
|
.s_axi_aresetn(S00_ARESETN_1),
|
|
.s_axi_arid(axi_interconnect_0_M02_AXI_ARID),
|
|
.s_axi_arlen(axi_interconnect_0_M02_AXI_ARLEN),
|
|
.s_axi_arlock(axi_interconnect_0_M02_AXI_ARLOCK),
|
|
.s_axi_arprot(axi_interconnect_0_M02_AXI_ARPROT),
|
|
.s_axi_arready(axi_interconnect_0_M02_AXI_ARREADY),
|
|
.s_axi_arsize(axi_interconnect_0_M02_AXI_ARSIZE),
|
|
.s_axi_arvalid(axi_interconnect_0_M02_AXI_ARVALID),
|
|
.s_axi_awaddr(axi_interconnect_0_M02_AXI_AWADDR[12:0]),
|
|
.s_axi_awburst(axi_interconnect_0_M02_AXI_AWBURST),
|
|
.s_axi_awcache(axi_interconnect_0_M02_AXI_AWCACHE),
|
|
.s_axi_awid(axi_interconnect_0_M02_AXI_AWID),
|
|
.s_axi_awlen(axi_interconnect_0_M02_AXI_AWLEN),
|
|
.s_axi_awlock(axi_interconnect_0_M02_AXI_AWLOCK),
|
|
.s_axi_awprot(axi_interconnect_0_M02_AXI_AWPROT),
|
|
.s_axi_awready(axi_interconnect_0_M02_AXI_AWREADY),
|
|
.s_axi_awsize(axi_interconnect_0_M02_AXI_AWSIZE),
|
|
.s_axi_awvalid(axi_interconnect_0_M02_AXI_AWVALID),
|
|
.s_axi_bid(axi_interconnect_0_M02_AXI_BID),
|
|
.s_axi_bready(axi_interconnect_0_M02_AXI_BREADY),
|
|
.s_axi_bresp(axi_interconnect_0_M02_AXI_BRESP),
|
|
.s_axi_bvalid(axi_interconnect_0_M02_AXI_BVALID),
|
|
.s_axi_rdata(axi_interconnect_0_M02_AXI_RDATA),
|
|
.s_axi_rid(axi_interconnect_0_M02_AXI_RID),
|
|
.s_axi_rlast(axi_interconnect_0_M02_AXI_RLAST),
|
|
.s_axi_rready(axi_interconnect_0_M02_AXI_RREADY),
|
|
.s_axi_rresp(axi_interconnect_0_M02_AXI_RRESP),
|
|
.s_axi_rvalid(axi_interconnect_0_M02_AXI_RVALID),
|
|
.s_axi_wdata(axi_interconnect_0_M02_AXI_WDATA),
|
|
.s_axi_wlast(axi_interconnect_0_M02_AXI_WLAST),
|
|
.s_axi_wready(axi_interconnect_0_M02_AXI_WREADY),
|
|
.s_axi_wstrb(axi_interconnect_0_M02_AXI_WSTRB),
|
|
.s_axi_wvalid(axi_interconnect_0_M02_AXI_WVALID));
|
|
Top_axi_interconnect_0_0 axi_interconnect_0
|
|
(.ACLK(S00_ACLK_1),
|
|
.ARESETN(S00_ARESETN_1),
|
|
.M00_ACLK(mig_7series_1_c0_ui_clk),
|
|
.M00_ARESETN(util_vector_logic_0_Res),
|
|
.M00_AXI_araddr(axi_interconnect_0_M00_AXI_ARADDR),
|
|
.M00_AXI_arburst(axi_interconnect_0_M00_AXI_ARBURST),
|
|
.M00_AXI_arcache(axi_interconnect_0_M00_AXI_ARCACHE),
|
|
.M00_AXI_arid(axi_interconnect_0_M00_AXI_ARID),
|
|
.M00_AXI_arlen(axi_interconnect_0_M00_AXI_ARLEN),
|
|
.M00_AXI_arlock(axi_interconnect_0_M00_AXI_ARLOCK),
|
|
.M00_AXI_arprot(axi_interconnect_0_M00_AXI_ARPROT),
|
|
.M00_AXI_arqos(axi_interconnect_0_M00_AXI_ARQOS),
|
|
.M00_AXI_arready(axi_interconnect_0_M00_AXI_ARREADY),
|
|
.M00_AXI_arsize(axi_interconnect_0_M00_AXI_ARSIZE),
|
|
.M00_AXI_arvalid(axi_interconnect_0_M00_AXI_ARVALID),
|
|
.M00_AXI_awaddr(axi_interconnect_0_M00_AXI_AWADDR),
|
|
.M00_AXI_awburst(axi_interconnect_0_M00_AXI_AWBURST),
|
|
.M00_AXI_awcache(axi_interconnect_0_M00_AXI_AWCACHE),
|
|
.M00_AXI_awid(axi_interconnect_0_M00_AXI_AWID),
|
|
.M00_AXI_awlen(axi_interconnect_0_M00_AXI_AWLEN),
|
|
.M00_AXI_awlock(axi_interconnect_0_M00_AXI_AWLOCK),
|
|
.M00_AXI_awprot(axi_interconnect_0_M00_AXI_AWPROT),
|
|
.M00_AXI_awqos(axi_interconnect_0_M00_AXI_AWQOS),
|
|
.M00_AXI_awready(axi_interconnect_0_M00_AXI_AWREADY),
|
|
.M00_AXI_awsize(axi_interconnect_0_M00_AXI_AWSIZE),
|
|
.M00_AXI_awvalid(axi_interconnect_0_M00_AXI_AWVALID),
|
|
.M00_AXI_bid(axi_interconnect_0_M00_AXI_BID),
|
|
.M00_AXI_bready(axi_interconnect_0_M00_AXI_BREADY),
|
|
.M00_AXI_bresp(axi_interconnect_0_M00_AXI_BRESP),
|
|
.M00_AXI_bvalid(axi_interconnect_0_M00_AXI_BVALID),
|
|
.M00_AXI_rdata(axi_interconnect_0_M00_AXI_RDATA),
|
|
.M00_AXI_rid(axi_interconnect_0_M00_AXI_RID),
|
|
.M00_AXI_rlast(axi_interconnect_0_M00_AXI_RLAST),
|
|
.M00_AXI_rready(axi_interconnect_0_M00_AXI_RREADY),
|
|
.M00_AXI_rresp(axi_interconnect_0_M00_AXI_RRESP),
|
|
.M00_AXI_rvalid(axi_interconnect_0_M00_AXI_RVALID),
|
|
.M00_AXI_wdata(axi_interconnect_0_M00_AXI_WDATA),
|
|
.M00_AXI_wlast(axi_interconnect_0_M00_AXI_WLAST),
|
|
.M00_AXI_wready(axi_interconnect_0_M00_AXI_WREADY),
|
|
.M00_AXI_wstrb(axi_interconnect_0_M00_AXI_WSTRB),
|
|
.M00_AXI_wvalid(axi_interconnect_0_M00_AXI_WVALID),
|
|
.M01_ACLK(M01_ACLK_1),
|
|
.M01_ARESETN(util_vector_logic_1_Res),
|
|
.M01_AXI_araddr(axi_interconnect_0_M01_AXI_ARADDR),
|
|
.M01_AXI_arburst(axi_interconnect_0_M01_AXI_ARBURST),
|
|
.M01_AXI_arcache(axi_interconnect_0_M01_AXI_ARCACHE),
|
|
.M01_AXI_arid(axi_interconnect_0_M01_AXI_ARID),
|
|
.M01_AXI_arlen(axi_interconnect_0_M01_AXI_ARLEN),
|
|
.M01_AXI_arlock(axi_interconnect_0_M01_AXI_ARLOCK),
|
|
.M01_AXI_arprot(axi_interconnect_0_M01_AXI_ARPROT),
|
|
.M01_AXI_arqos(axi_interconnect_0_M01_AXI_ARQOS),
|
|
.M01_AXI_arready(axi_interconnect_0_M01_AXI_ARREADY),
|
|
.M01_AXI_arsize(axi_interconnect_0_M01_AXI_ARSIZE),
|
|
.M01_AXI_arvalid(axi_interconnect_0_M01_AXI_ARVALID),
|
|
.M01_AXI_awaddr(axi_interconnect_0_M01_AXI_AWADDR),
|
|
.M01_AXI_awburst(axi_interconnect_0_M01_AXI_AWBURST),
|
|
.M01_AXI_awcache(axi_interconnect_0_M01_AXI_AWCACHE),
|
|
.M01_AXI_awid(axi_interconnect_0_M01_AXI_AWID),
|
|
.M01_AXI_awlen(axi_interconnect_0_M01_AXI_AWLEN),
|
|
.M01_AXI_awlock(axi_interconnect_0_M01_AXI_AWLOCK),
|
|
.M01_AXI_awprot(axi_interconnect_0_M01_AXI_AWPROT),
|
|
.M01_AXI_awqos(axi_interconnect_0_M01_AXI_AWQOS),
|
|
.M01_AXI_awready(axi_interconnect_0_M01_AXI_AWREADY),
|
|
.M01_AXI_awsize(axi_interconnect_0_M01_AXI_AWSIZE),
|
|
.M01_AXI_awvalid(axi_interconnect_0_M01_AXI_AWVALID),
|
|
.M01_AXI_bid(axi_interconnect_0_M01_AXI_BID),
|
|
.M01_AXI_bready(axi_interconnect_0_M01_AXI_BREADY),
|
|
.M01_AXI_bresp(axi_interconnect_0_M01_AXI_BRESP),
|
|
.M01_AXI_bvalid(axi_interconnect_0_M01_AXI_BVALID),
|
|
.M01_AXI_rdata(axi_interconnect_0_M01_AXI_RDATA),
|
|
.M01_AXI_rid(axi_interconnect_0_M01_AXI_RID),
|
|
.M01_AXI_rlast(axi_interconnect_0_M01_AXI_RLAST),
|
|
.M01_AXI_rready(axi_interconnect_0_M01_AXI_RREADY),
|
|
.M01_AXI_rresp(axi_interconnect_0_M01_AXI_RRESP),
|
|
.M01_AXI_rvalid(axi_interconnect_0_M01_AXI_RVALID),
|
|
.M01_AXI_wdata(axi_interconnect_0_M01_AXI_WDATA),
|
|
.M01_AXI_wlast(axi_interconnect_0_M01_AXI_WLAST),
|
|
.M01_AXI_wready(axi_interconnect_0_M01_AXI_WREADY),
|
|
.M01_AXI_wstrb(axi_interconnect_0_M01_AXI_WSTRB),
|
|
.M01_AXI_wvalid(axi_interconnect_0_M01_AXI_WVALID),
|
|
.M02_ACLK(S00_ACLK_1),
|
|
.M02_ARESETN({S00_ARESETN_1,S00_ARESETN_1,S00_ARESETN_1,S00_ARESETN_1,S00_ARESETN_1,S00_ARESETN_1,S00_ARESETN_1,S00_ARESETN_1}),
|
|
.M02_AXI_araddr(axi_interconnect_0_M02_AXI_ARADDR),
|
|
.M02_AXI_arburst(axi_interconnect_0_M02_AXI_ARBURST),
|
|
.M02_AXI_arcache(axi_interconnect_0_M02_AXI_ARCACHE),
|
|
.M02_AXI_arid(axi_interconnect_0_M02_AXI_ARID),
|
|
.M02_AXI_arlen(axi_interconnect_0_M02_AXI_ARLEN),
|
|
.M02_AXI_arlock(axi_interconnect_0_M02_AXI_ARLOCK),
|
|
.M02_AXI_arprot(axi_interconnect_0_M02_AXI_ARPROT),
|
|
.M02_AXI_arready(axi_interconnect_0_M02_AXI_ARREADY),
|
|
.M02_AXI_arsize(axi_interconnect_0_M02_AXI_ARSIZE),
|
|
.M02_AXI_arvalid(axi_interconnect_0_M02_AXI_ARVALID),
|
|
.M02_AXI_awaddr(axi_interconnect_0_M02_AXI_AWADDR),
|
|
.M02_AXI_awburst(axi_interconnect_0_M02_AXI_AWBURST),
|
|
.M02_AXI_awcache(axi_interconnect_0_M02_AXI_AWCACHE),
|
|
.M02_AXI_awid(axi_interconnect_0_M02_AXI_AWID),
|
|
.M02_AXI_awlen(axi_interconnect_0_M02_AXI_AWLEN),
|
|
.M02_AXI_awlock(axi_interconnect_0_M02_AXI_AWLOCK),
|
|
.M02_AXI_awprot(axi_interconnect_0_M02_AXI_AWPROT),
|
|
.M02_AXI_awready(axi_interconnect_0_M02_AXI_AWREADY),
|
|
.M02_AXI_awsize(axi_interconnect_0_M02_AXI_AWSIZE),
|
|
.M02_AXI_awvalid(axi_interconnect_0_M02_AXI_AWVALID),
|
|
.M02_AXI_bid(axi_interconnect_0_M02_AXI_BID),
|
|
.M02_AXI_bready(axi_interconnect_0_M02_AXI_BREADY),
|
|
.M02_AXI_bresp(axi_interconnect_0_M02_AXI_BRESP),
|
|
.M02_AXI_bvalid(axi_interconnect_0_M02_AXI_BVALID),
|
|
.M02_AXI_rdata(axi_interconnect_0_M02_AXI_RDATA),
|
|
.M02_AXI_rid(axi_interconnect_0_M02_AXI_RID),
|
|
.M02_AXI_rlast(axi_interconnect_0_M02_AXI_RLAST),
|
|
.M02_AXI_rready(axi_interconnect_0_M02_AXI_RREADY),
|
|
.M02_AXI_rresp(axi_interconnect_0_M02_AXI_RRESP),
|
|
.M02_AXI_rvalid(axi_interconnect_0_M02_AXI_RVALID),
|
|
.M02_AXI_wdata(axi_interconnect_0_M02_AXI_WDATA),
|
|
.M02_AXI_wlast(axi_interconnect_0_M02_AXI_WLAST),
|
|
.M02_AXI_wready(axi_interconnect_0_M02_AXI_WREADY),
|
|
.M02_AXI_wstrb(axi_interconnect_0_M02_AXI_WSTRB),
|
|
.M02_AXI_wvalid(axi_interconnect_0_M02_AXI_WVALID),
|
|
.S00_ACLK(S00_ACLK_1),
|
|
.S00_ARESETN(S00_ARESETN_1),
|
|
.S00_AXI_araddr(S00_AXI_1_ARADDR),
|
|
.S00_AXI_arburst(S00_AXI_1_ARBURST),
|
|
.S00_AXI_arcache(S00_AXI_1_ARCACHE),
|
|
.S00_AXI_arid(S00_AXI_1_ARID),
|
|
.S00_AXI_arlen(S00_AXI_1_ARLEN),
|
|
.S00_AXI_arlock(S00_AXI_1_ARLOCK),
|
|
.S00_AXI_arprot(S00_AXI_1_ARPROT),
|
|
.S00_AXI_arready(S00_AXI_1_ARREADY),
|
|
.S00_AXI_arsize(S00_AXI_1_ARSIZE),
|
|
.S00_AXI_arvalid(S00_AXI_1_ARVALID),
|
|
.S00_AXI_awaddr(S00_AXI_1_AWADDR),
|
|
.S00_AXI_awburst(S00_AXI_1_AWBURST),
|
|
.S00_AXI_awcache(S00_AXI_1_AWCACHE),
|
|
.S00_AXI_awid(S00_AXI_1_AWID),
|
|
.S00_AXI_awlen(S00_AXI_1_AWLEN),
|
|
.S00_AXI_awlock(S00_AXI_1_AWLOCK),
|
|
.S00_AXI_awprot(S00_AXI_1_AWPROT),
|
|
.S00_AXI_awready(S00_AXI_1_AWREADY),
|
|
.S00_AXI_awsize(S00_AXI_1_AWSIZE),
|
|
.S00_AXI_awvalid(S00_AXI_1_AWVALID),
|
|
.S00_AXI_bid(S00_AXI_1_BID),
|
|
.S00_AXI_bready(S00_AXI_1_BREADY),
|
|
.S00_AXI_bresp(S00_AXI_1_BRESP),
|
|
.S00_AXI_bvalid(S00_AXI_1_BVALID),
|
|
.S00_AXI_rdata(S00_AXI_1_RDATA),
|
|
.S00_AXI_rid(S00_AXI_1_RID),
|
|
.S00_AXI_rlast(S00_AXI_1_RLAST),
|
|
.S00_AXI_rready(S00_AXI_1_RREADY),
|
|
.S00_AXI_rresp(S00_AXI_1_RRESP),
|
|
.S00_AXI_rvalid(S00_AXI_1_RVALID),
|
|
.S00_AXI_wdata(S00_AXI_1_WDATA),
|
|
.S00_AXI_wlast(S00_AXI_1_WLAST),
|
|
.S00_AXI_wready(S00_AXI_1_WREADY),
|
|
.S00_AXI_wstrb(S00_AXI_1_WSTRB),
|
|
.S00_AXI_wvalid(S00_AXI_1_WVALID));
|
|
Top_blk_mem_gen_0_0 blk_mem_gen_0
|
|
(.addra({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,axi_bram_ctrl_0_BRAM_PORTA_ADDR}),
|
|
.clka(axi_bram_ctrl_0_BRAM_PORTA_CLK),
|
|
.dina(axi_bram_ctrl_0_BRAM_PORTA_DIN),
|
|
.douta(axi_bram_ctrl_0_BRAM_PORTA_DOUT),
|
|
.ena(axi_bram_ctrl_0_BRAM_PORTA_EN),
|
|
.rsta(axi_bram_ctrl_0_BRAM_PORTA_RST),
|
|
.wea(axi_bram_ctrl_0_BRAM_PORTA_WE));
|
|
Top_jtag_axi_0_0 jtag_axi_0
|
|
(.aclk(mig_7series_1_c0_ui_clk),
|
|
.aresetn(util_vector_logic_0_Res[0]),
|
|
.m_axi_araddr(jtag_axi_0_M_AXI_ARADDR),
|
|
.m_axi_arready(jtag_axi_0_M_AXI_ARREADY),
|
|
.m_axi_arvalid(jtag_axi_0_M_AXI_ARVALID),
|
|
.m_axi_awaddr(jtag_axi_0_M_AXI_AWADDR),
|
|
.m_axi_awready(jtag_axi_0_M_AXI_AWREADY),
|
|
.m_axi_awvalid(jtag_axi_0_M_AXI_AWVALID),
|
|
.m_axi_bready(jtag_axi_0_M_AXI_BREADY),
|
|
.m_axi_bresp(jtag_axi_0_M_AXI_BRESP),
|
|
.m_axi_bvalid(jtag_axi_0_M_AXI_BVALID),
|
|
.m_axi_rdata(jtag_axi_0_M_AXI_RDATA),
|
|
.m_axi_rready(jtag_axi_0_M_AXI_RREADY),
|
|
.m_axi_rresp(jtag_axi_0_M_AXI_RRESP),
|
|
.m_axi_rvalid(jtag_axi_0_M_AXI_RVALID),
|
|
.m_axi_wdata(jtag_axi_0_M_AXI_WDATA),
|
|
.m_axi_wready(jtag_axi_0_M_AXI_WREADY),
|
|
.m_axi_wvalid(jtag_axi_0_M_AXI_WVALID));
|
|
Top_jtag_axi_0_1 jtag_axi_1
|
|
(.aclk(M01_ACLK_1),
|
|
.aresetn(util_vector_logic_1_Res[0]),
|
|
.m_axi_araddr(jtag_axi_1_M_AXI_ARADDR),
|
|
.m_axi_arready(jtag_axi_1_M_AXI_ARREADY),
|
|
.m_axi_arvalid(jtag_axi_1_M_AXI_ARVALID),
|
|
.m_axi_awaddr(jtag_axi_1_M_AXI_AWADDR),
|
|
.m_axi_awready(jtag_axi_1_M_AXI_AWREADY),
|
|
.m_axi_awvalid(jtag_axi_1_M_AXI_AWVALID),
|
|
.m_axi_bready(jtag_axi_1_M_AXI_BREADY),
|
|
.m_axi_bresp(jtag_axi_1_M_AXI_BRESP),
|
|
.m_axi_bvalid(jtag_axi_1_M_AXI_BVALID),
|
|
.m_axi_rdata(jtag_axi_1_M_AXI_RDATA),
|
|
.m_axi_rready(jtag_axi_1_M_AXI_RREADY),
|
|
.m_axi_rresp(jtag_axi_1_M_AXI_RRESP),
|
|
.m_axi_rvalid(jtag_axi_1_M_AXI_RVALID),
|
|
.m_axi_wdata(jtag_axi_1_M_AXI_WDATA),
|
|
.m_axi_wready(jtag_axi_1_M_AXI_WREADY),
|
|
.m_axi_wvalid(jtag_axi_1_M_AXI_WVALID));
|
|
Top_mig_7series_1_0 mig_7series_1
|
|
(.c0_aresetn(xlconstant_0_dout),
|
|
.c0_ddr3_addr(mig_7series_1_C0_DDR3_ADDR),
|
|
.c0_ddr3_ba(mig_7series_1_C0_DDR3_BA),
|
|
.c0_ddr3_cas_n(mig_7series_1_C0_DDR3_CAS_N),
|
|
.c0_ddr3_ck_n(mig_7series_1_C0_DDR3_CK_N),
|
|
.c0_ddr3_ck_p(mig_7series_1_C0_DDR3_CK_P),
|
|
.c0_ddr3_cke(mig_7series_1_C0_DDR3_CKE),
|
|
.c0_ddr3_cs_n(mig_7series_1_C0_DDR3_CS_N),
|
|
.c0_ddr3_dq(C0_DDR3_0_dq[71:0]),
|
|
.c0_ddr3_dqs_n(C0_DDR3_0_dqs_n[8:0]),
|
|
.c0_ddr3_dqs_p(C0_DDR3_0_dqs_p[8:0]),
|
|
.c0_ddr3_odt(mig_7series_1_C0_DDR3_ODT),
|
|
.c0_ddr3_ras_n(mig_7series_1_C0_DDR3_RAS_N),
|
|
.c0_ddr3_reset_n(mig_7series_1_C0_DDR3_RESET_N),
|
|
.c0_ddr3_we_n(mig_7series_1_C0_DDR3_WE_N),
|
|
.c0_s_axi_araddr(axi_interconnect_0_M00_AXI_ARADDR),
|
|
.c0_s_axi_arburst(axi_interconnect_0_M00_AXI_ARBURST),
|
|
.c0_s_axi_arcache(axi_interconnect_0_M00_AXI_ARCACHE),
|
|
.c0_s_axi_arid(axi_interconnect_0_M00_AXI_ARID),
|
|
.c0_s_axi_arlen(axi_interconnect_0_M00_AXI_ARLEN),
|
|
.c0_s_axi_arlock(axi_interconnect_0_M00_AXI_ARLOCK),
|
|
.c0_s_axi_arprot(axi_interconnect_0_M00_AXI_ARPROT),
|
|
.c0_s_axi_arqos(axi_interconnect_0_M00_AXI_ARQOS),
|
|
.c0_s_axi_arready(axi_interconnect_0_M00_AXI_ARREADY),
|
|
.c0_s_axi_arsize(axi_interconnect_0_M00_AXI_ARSIZE),
|
|
.c0_s_axi_arvalid(axi_interconnect_0_M00_AXI_ARVALID),
|
|
.c0_s_axi_awaddr(axi_interconnect_0_M00_AXI_AWADDR),
|
|
.c0_s_axi_awburst(axi_interconnect_0_M00_AXI_AWBURST),
|
|
.c0_s_axi_awcache(axi_interconnect_0_M00_AXI_AWCACHE),
|
|
.c0_s_axi_awid(axi_interconnect_0_M00_AXI_AWID),
|
|
.c0_s_axi_awlen(axi_interconnect_0_M00_AXI_AWLEN),
|
|
.c0_s_axi_awlock(axi_interconnect_0_M00_AXI_AWLOCK),
|
|
.c0_s_axi_awprot(axi_interconnect_0_M00_AXI_AWPROT),
|
|
.c0_s_axi_awqos(axi_interconnect_0_M00_AXI_AWQOS),
|
|
.c0_s_axi_awready(axi_interconnect_0_M00_AXI_AWREADY),
|
|
.c0_s_axi_awsize(axi_interconnect_0_M00_AXI_AWSIZE),
|
|
.c0_s_axi_awvalid(axi_interconnect_0_M00_AXI_AWVALID),
|
|
.c0_s_axi_bid(axi_interconnect_0_M00_AXI_BID),
|
|
.c0_s_axi_bready(axi_interconnect_0_M00_AXI_BREADY),
|
|
.c0_s_axi_bresp(axi_interconnect_0_M00_AXI_BRESP),
|
|
.c0_s_axi_bvalid(axi_interconnect_0_M00_AXI_BVALID),
|
|
.c0_s_axi_ctrl_araddr(jtag_axi_0_M_AXI_ARADDR[31:0]),
|
|
.c0_s_axi_ctrl_arready(jtag_axi_0_M_AXI_ARREADY),
|
|
.c0_s_axi_ctrl_arvalid(jtag_axi_0_M_AXI_ARVALID),
|
|
.c0_s_axi_ctrl_awaddr(jtag_axi_0_M_AXI_AWADDR[31:0]),
|
|
.c0_s_axi_ctrl_awready(jtag_axi_0_M_AXI_AWREADY),
|
|
.c0_s_axi_ctrl_awvalid(jtag_axi_0_M_AXI_AWVALID),
|
|
.c0_s_axi_ctrl_bready(jtag_axi_0_M_AXI_BREADY),
|
|
.c0_s_axi_ctrl_bresp(jtag_axi_0_M_AXI_BRESP),
|
|
.c0_s_axi_ctrl_bvalid(jtag_axi_0_M_AXI_BVALID),
|
|
.c0_s_axi_ctrl_rdata(jtag_axi_0_M_AXI_RDATA),
|
|
.c0_s_axi_ctrl_rready(jtag_axi_0_M_AXI_RREADY),
|
|
.c0_s_axi_ctrl_rresp(jtag_axi_0_M_AXI_RRESP),
|
|
.c0_s_axi_ctrl_rvalid(jtag_axi_0_M_AXI_RVALID),
|
|
.c0_s_axi_ctrl_wdata(jtag_axi_0_M_AXI_WDATA),
|
|
.c0_s_axi_ctrl_wready(jtag_axi_0_M_AXI_WREADY),
|
|
.c0_s_axi_ctrl_wvalid(jtag_axi_0_M_AXI_WVALID),
|
|
.c0_s_axi_rdata(axi_interconnect_0_M00_AXI_RDATA),
|
|
.c0_s_axi_rid(axi_interconnect_0_M00_AXI_RID),
|
|
.c0_s_axi_rlast(axi_interconnect_0_M00_AXI_RLAST),
|
|
.c0_s_axi_rready(axi_interconnect_0_M00_AXI_RREADY),
|
|
.c0_s_axi_rresp(axi_interconnect_0_M00_AXI_RRESP),
|
|
.c0_s_axi_rvalid(axi_interconnect_0_M00_AXI_RVALID),
|
|
.c0_s_axi_wdata(axi_interconnect_0_M00_AXI_WDATA),
|
|
.c0_s_axi_wlast(axi_interconnect_0_M00_AXI_WLAST),
|
|
.c0_s_axi_wready(axi_interconnect_0_M00_AXI_WREADY),
|
|
.c0_s_axi_wstrb(axi_interconnect_0_M00_AXI_WSTRB),
|
|
.c0_s_axi_wvalid(axi_interconnect_0_M00_AXI_WVALID),
|
|
.c0_sys_clk_n(C0_SYS_CLK_0_1_CLK_N),
|
|
.c0_sys_clk_p(C0_SYS_CLK_0_1_CLK_P),
|
|
.c0_ui_clk(mig_7series_1_c0_ui_clk),
|
|
.c0_ui_clk_sync_rst(mig_7series_1_c0_ui_clk_sync_rst),
|
|
.c1_aresetn(xlconstant_0_dout),
|
|
.c1_ddr3_addr(mig_7series_1_C1_DDR3_ADDR),
|
|
.c1_ddr3_ba(mig_7series_1_C1_DDR3_BA),
|
|
.c1_ddr3_cas_n(mig_7series_1_C1_DDR3_CAS_N),
|
|
.c1_ddr3_ck_n(mig_7series_1_C1_DDR3_CK_N),
|
|
.c1_ddr3_ck_p(mig_7series_1_C1_DDR3_CK_P),
|
|
.c1_ddr3_cke(mig_7series_1_C1_DDR3_CKE),
|
|
.c1_ddr3_cs_n(mig_7series_1_C1_DDR3_CS_N),
|
|
.c1_ddr3_dq(C1_DDR3_0_dq[71:0]),
|
|
.c1_ddr3_dqs_n(C1_DDR3_0_dqs_n[8:0]),
|
|
.c1_ddr3_dqs_p(C1_DDR3_0_dqs_p[8:0]),
|
|
.c1_ddr3_odt(mig_7series_1_C1_DDR3_ODT),
|
|
.c1_ddr3_ras_n(mig_7series_1_C1_DDR3_RAS_N),
|
|
.c1_ddr3_reset_n(mig_7series_1_C1_DDR3_RESET_N),
|
|
.c1_ddr3_we_n(mig_7series_1_C1_DDR3_WE_N),
|
|
.c1_s_axi_araddr(axi_interconnect_0_M01_AXI_ARADDR),
|
|
.c1_s_axi_arburst(axi_interconnect_0_M01_AXI_ARBURST),
|
|
.c1_s_axi_arcache(axi_interconnect_0_M01_AXI_ARCACHE),
|
|
.c1_s_axi_arid(axi_interconnect_0_M01_AXI_ARID),
|
|
.c1_s_axi_arlen(axi_interconnect_0_M01_AXI_ARLEN),
|
|
.c1_s_axi_arlock(axi_interconnect_0_M01_AXI_ARLOCK),
|
|
.c1_s_axi_arprot(axi_interconnect_0_M01_AXI_ARPROT),
|
|
.c1_s_axi_arqos(axi_interconnect_0_M01_AXI_ARQOS),
|
|
.c1_s_axi_arready(axi_interconnect_0_M01_AXI_ARREADY),
|
|
.c1_s_axi_arsize(axi_interconnect_0_M01_AXI_ARSIZE),
|
|
.c1_s_axi_arvalid(axi_interconnect_0_M01_AXI_ARVALID),
|
|
.c1_s_axi_awaddr(axi_interconnect_0_M01_AXI_AWADDR),
|
|
.c1_s_axi_awburst(axi_interconnect_0_M01_AXI_AWBURST),
|
|
.c1_s_axi_awcache(axi_interconnect_0_M01_AXI_AWCACHE),
|
|
.c1_s_axi_awid(axi_interconnect_0_M01_AXI_AWID),
|
|
.c1_s_axi_awlen(axi_interconnect_0_M01_AXI_AWLEN),
|
|
.c1_s_axi_awlock(axi_interconnect_0_M01_AXI_AWLOCK),
|
|
.c1_s_axi_awprot(axi_interconnect_0_M01_AXI_AWPROT),
|
|
.c1_s_axi_awqos(axi_interconnect_0_M01_AXI_AWQOS),
|
|
.c1_s_axi_awready(axi_interconnect_0_M01_AXI_AWREADY),
|
|
.c1_s_axi_awsize(axi_interconnect_0_M01_AXI_AWSIZE),
|
|
.c1_s_axi_awvalid(axi_interconnect_0_M01_AXI_AWVALID),
|
|
.c1_s_axi_bid(axi_interconnect_0_M01_AXI_BID),
|
|
.c1_s_axi_bready(axi_interconnect_0_M01_AXI_BREADY),
|
|
.c1_s_axi_bresp(axi_interconnect_0_M01_AXI_BRESP),
|
|
.c1_s_axi_bvalid(axi_interconnect_0_M01_AXI_BVALID),
|
|
.c1_s_axi_ctrl_araddr(jtag_axi_1_M_AXI_ARADDR[31:0]),
|
|
.c1_s_axi_ctrl_arready(jtag_axi_1_M_AXI_ARREADY),
|
|
.c1_s_axi_ctrl_arvalid(jtag_axi_1_M_AXI_ARVALID),
|
|
.c1_s_axi_ctrl_awaddr(jtag_axi_1_M_AXI_AWADDR[31:0]),
|
|
.c1_s_axi_ctrl_awready(jtag_axi_1_M_AXI_AWREADY),
|
|
.c1_s_axi_ctrl_awvalid(jtag_axi_1_M_AXI_AWVALID),
|
|
.c1_s_axi_ctrl_bready(jtag_axi_1_M_AXI_BREADY),
|
|
.c1_s_axi_ctrl_bresp(jtag_axi_1_M_AXI_BRESP),
|
|
.c1_s_axi_ctrl_bvalid(jtag_axi_1_M_AXI_BVALID),
|
|
.c1_s_axi_ctrl_rdata(jtag_axi_1_M_AXI_RDATA),
|
|
.c1_s_axi_ctrl_rready(jtag_axi_1_M_AXI_RREADY),
|
|
.c1_s_axi_ctrl_rresp(jtag_axi_1_M_AXI_RRESP),
|
|
.c1_s_axi_ctrl_rvalid(jtag_axi_1_M_AXI_RVALID),
|
|
.c1_s_axi_ctrl_wdata(jtag_axi_1_M_AXI_WDATA),
|
|
.c1_s_axi_ctrl_wready(jtag_axi_1_M_AXI_WREADY),
|
|
.c1_s_axi_ctrl_wvalid(jtag_axi_1_M_AXI_WVALID),
|
|
.c1_s_axi_rdata(axi_interconnect_0_M01_AXI_RDATA),
|
|
.c1_s_axi_rid(axi_interconnect_0_M01_AXI_RID),
|
|
.c1_s_axi_rlast(axi_interconnect_0_M01_AXI_RLAST),
|
|
.c1_s_axi_rready(axi_interconnect_0_M01_AXI_RREADY),
|
|
.c1_s_axi_rresp(axi_interconnect_0_M01_AXI_RRESP),
|
|
.c1_s_axi_rvalid(axi_interconnect_0_M01_AXI_RVALID),
|
|
.c1_s_axi_wdata(axi_interconnect_0_M01_AXI_WDATA),
|
|
.c1_s_axi_wlast(axi_interconnect_0_M01_AXI_WLAST),
|
|
.c1_s_axi_wready(axi_interconnect_0_M01_AXI_WREADY),
|
|
.c1_s_axi_wstrb(axi_interconnect_0_M01_AXI_WSTRB),
|
|
.c1_s_axi_wvalid(axi_interconnect_0_M01_AXI_WVALID),
|
|
.c1_sys_clk_n(C1_SYS_CLK_0_1_CLK_N),
|
|
.c1_sys_clk_p(C1_SYS_CLK_0_1_CLK_P),
|
|
.c1_ui_clk(M01_ACLK_1),
|
|
.c1_ui_clk_sync_rst(mig_7series_1_c1_ui_clk_sync_rst),
|
|
.sys_rst(xlconstant_2_dout));
|
|
Top_util_ds_buf_0_0 util_ds_buf_0
|
|
(.IBUF_DS_N(pcie_clkin_1_CLK_N),
|
|
.IBUF_DS_P(pcie_clkin_1_CLK_P),
|
|
.IBUF_OUT(util_ds_buf_0_IBUF_OUT));
|
|
Top_util_vector_logic_0_0 util_vector_logic_0
|
|
(.Op1({mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst,mig_7series_1_c0_ui_clk_sync_rst}),
|
|
.Res(util_vector_logic_0_Res));
|
|
Top_util_vector_logic_0_1 util_vector_logic_1
|
|
(.Op1({mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst,mig_7series_1_c1_ui_clk_sync_rst}),
|
|
.Res(util_vector_logic_1_Res));
|
|
Top_xdma_1_0 xdma_1
|
|
(.axi_aclk(S00_ACLK_1),
|
|
.axi_aresetn(S00_ARESETN_1),
|
|
.cfg_mgmt_addr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
|
|
.cfg_mgmt_byte_enable({1'b0,1'b0,1'b0,1'b0}),
|
|
.cfg_mgmt_read(1'b0),
|
|
.cfg_mgmt_type1_cfg_reg_access(1'b0),
|
|
.cfg_mgmt_write(1'b0),
|
|
.cfg_mgmt_write_data({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
|
|
.m_axi_araddr(S00_AXI_1_ARADDR),
|
|
.m_axi_arburst(S00_AXI_1_ARBURST),
|
|
.m_axi_arcache(S00_AXI_1_ARCACHE),
|
|
.m_axi_arid(S00_AXI_1_ARID),
|
|
.m_axi_arlen(S00_AXI_1_ARLEN),
|
|
.m_axi_arlock(S00_AXI_1_ARLOCK),
|
|
.m_axi_arprot(S00_AXI_1_ARPROT),
|
|
.m_axi_arready(S00_AXI_1_ARREADY),
|
|
.m_axi_arsize(S00_AXI_1_ARSIZE),
|
|
.m_axi_arvalid(S00_AXI_1_ARVALID),
|
|
.m_axi_awaddr(S00_AXI_1_AWADDR),
|
|
.m_axi_awburst(S00_AXI_1_AWBURST),
|
|
.m_axi_awcache(S00_AXI_1_AWCACHE),
|
|
.m_axi_awid(S00_AXI_1_AWID),
|
|
.m_axi_awlen(S00_AXI_1_AWLEN),
|
|
.m_axi_awlock(S00_AXI_1_AWLOCK),
|
|
.m_axi_awprot(S00_AXI_1_AWPROT),
|
|
.m_axi_awready(S00_AXI_1_AWREADY),
|
|
.m_axi_awsize(S00_AXI_1_AWSIZE),
|
|
.m_axi_awvalid(S00_AXI_1_AWVALID),
|
|
.m_axi_bid(S00_AXI_1_BID),
|
|
.m_axi_bready(S00_AXI_1_BREADY),
|
|
.m_axi_bresp(S00_AXI_1_BRESP),
|
|
.m_axi_bvalid(S00_AXI_1_BVALID),
|
|
.m_axi_rdata(S00_AXI_1_RDATA),
|
|
.m_axi_rid(S00_AXI_1_RID),
|
|
.m_axi_rlast(S00_AXI_1_RLAST),
|
|
.m_axi_rready(S00_AXI_1_RREADY),
|
|
.m_axi_rresp(S00_AXI_1_RRESP),
|
|
.m_axi_rvalid(S00_AXI_1_RVALID),
|
|
.m_axi_wdata(S00_AXI_1_WDATA),
|
|
.m_axi_wlast(S00_AXI_1_WLAST),
|
|
.m_axi_wready(S00_AXI_1_WREADY),
|
|
.m_axi_wstrb(S00_AXI_1_WSTRB),
|
|
.m_axi_wvalid(S00_AXI_1_WVALID),
|
|
.pci_exp_rxn(xdma_1_pcie_mgt_rxn),
|
|
.pci_exp_rxp(xdma_1_pcie_mgt_rxp),
|
|
.pci_exp_txn(xdma_1_pcie_mgt_txn),
|
|
.pci_exp_txp(xdma_1_pcie_mgt_txp),
|
|
.sys_clk(util_ds_buf_0_IBUF_OUT),
|
|
.sys_rst_n(pci_reset_1),
|
|
.user_lnk_up(xdma_1_user_lnk_up),
|
|
.usr_irq_req(1'b0));
|
|
Top_xlconstant_0_0 xlconstant_0
|
|
(.dout(xlconstant_0_dout));
|
|
Top_xlconstant_2_0 xlconstant_2
|
|
(.dout(xlconstant_2_dout));
|
|
endmodule
|
|
|
|
module Top_axi_interconnect_0_0
|
|
(ACLK,
|
|
ARESETN,
|
|
M00_ACLK,
|
|
M00_ARESETN,
|
|
M00_AXI_araddr,
|
|
M00_AXI_arburst,
|
|
M00_AXI_arcache,
|
|
M00_AXI_arid,
|
|
M00_AXI_arlen,
|
|
M00_AXI_arlock,
|
|
M00_AXI_arprot,
|
|
M00_AXI_arqos,
|
|
M00_AXI_arready,
|
|
M00_AXI_arsize,
|
|
M00_AXI_arvalid,
|
|
M00_AXI_awaddr,
|
|
M00_AXI_awburst,
|
|
M00_AXI_awcache,
|
|
M00_AXI_awid,
|
|
M00_AXI_awlen,
|
|
M00_AXI_awlock,
|
|
M00_AXI_awprot,
|
|
M00_AXI_awqos,
|
|
M00_AXI_awready,
|
|
M00_AXI_awsize,
|
|
M00_AXI_awvalid,
|
|
M00_AXI_bid,
|
|
M00_AXI_bready,
|
|
M00_AXI_bresp,
|
|
M00_AXI_bvalid,
|
|
M00_AXI_rdata,
|
|
M00_AXI_rid,
|
|
M00_AXI_rlast,
|
|
M00_AXI_rready,
|
|
M00_AXI_rresp,
|
|
M00_AXI_rvalid,
|
|
M00_AXI_wdata,
|
|
M00_AXI_wlast,
|
|
M00_AXI_wready,
|
|
M00_AXI_wstrb,
|
|
M00_AXI_wvalid,
|
|
M01_ACLK,
|
|
M01_ARESETN,
|
|
M01_AXI_araddr,
|
|
M01_AXI_arburst,
|
|
M01_AXI_arcache,
|
|
M01_AXI_arid,
|
|
M01_AXI_arlen,
|
|
M01_AXI_arlock,
|
|
M01_AXI_arprot,
|
|
M01_AXI_arqos,
|
|
M01_AXI_arready,
|
|
M01_AXI_arsize,
|
|
M01_AXI_arvalid,
|
|
M01_AXI_awaddr,
|
|
M01_AXI_awburst,
|
|
M01_AXI_awcache,
|
|
M01_AXI_awid,
|
|
M01_AXI_awlen,
|
|
M01_AXI_awlock,
|
|
M01_AXI_awprot,
|
|
M01_AXI_awqos,
|
|
M01_AXI_awready,
|
|
M01_AXI_awsize,
|
|
M01_AXI_awvalid,
|
|
M01_AXI_bid,
|
|
M01_AXI_bready,
|
|
M01_AXI_bresp,
|
|
M01_AXI_bvalid,
|
|
M01_AXI_rdata,
|
|
M01_AXI_rid,
|
|
M01_AXI_rlast,
|
|
M01_AXI_rready,
|
|
M01_AXI_rresp,
|
|
M01_AXI_rvalid,
|
|
M01_AXI_wdata,
|
|
M01_AXI_wlast,
|
|
M01_AXI_wready,
|
|
M01_AXI_wstrb,
|
|
M01_AXI_wvalid,
|
|
M02_ACLK,
|
|
M02_ARESETN,
|
|
M02_AXI_araddr,
|
|
M02_AXI_arburst,
|
|
M02_AXI_arcache,
|
|
M02_AXI_arid,
|
|
M02_AXI_arlen,
|
|
M02_AXI_arlock,
|
|
M02_AXI_arprot,
|
|
M02_AXI_arready,
|
|
M02_AXI_arsize,
|
|
M02_AXI_arvalid,
|
|
M02_AXI_awaddr,
|
|
M02_AXI_awburst,
|
|
M02_AXI_awcache,
|
|
M02_AXI_awid,
|
|
M02_AXI_awlen,
|
|
M02_AXI_awlock,
|
|
M02_AXI_awprot,
|
|
M02_AXI_awready,
|
|
M02_AXI_awsize,
|
|
M02_AXI_awvalid,
|
|
M02_AXI_bid,
|
|
M02_AXI_bready,
|
|
M02_AXI_bresp,
|
|
M02_AXI_bvalid,
|
|
M02_AXI_rdata,
|
|
M02_AXI_rid,
|
|
M02_AXI_rlast,
|
|
M02_AXI_rready,
|
|
M02_AXI_rresp,
|
|
M02_AXI_rvalid,
|
|
M02_AXI_wdata,
|
|
M02_AXI_wlast,
|
|
M02_AXI_wready,
|
|
M02_AXI_wstrb,
|
|
M02_AXI_wvalid,
|
|
S00_ACLK,
|
|
S00_ARESETN,
|
|
S00_AXI_araddr,
|
|
S00_AXI_arburst,
|
|
S00_AXI_arcache,
|
|
S00_AXI_arid,
|
|
S00_AXI_arlen,
|
|
S00_AXI_arlock,
|
|
S00_AXI_arprot,
|
|
S00_AXI_arready,
|
|
S00_AXI_arsize,
|
|
S00_AXI_arvalid,
|
|
S00_AXI_awaddr,
|
|
S00_AXI_awburst,
|
|
S00_AXI_awcache,
|
|
S00_AXI_awid,
|
|
S00_AXI_awlen,
|
|
S00_AXI_awlock,
|
|
S00_AXI_awprot,
|
|
S00_AXI_awready,
|
|
S00_AXI_awsize,
|
|
S00_AXI_awvalid,
|
|
S00_AXI_bid,
|
|
S00_AXI_bready,
|
|
S00_AXI_bresp,
|
|
S00_AXI_bvalid,
|
|
S00_AXI_rdata,
|
|
S00_AXI_rid,
|
|
S00_AXI_rlast,
|
|
S00_AXI_rready,
|
|
S00_AXI_rresp,
|
|
S00_AXI_rvalid,
|
|
S00_AXI_wdata,
|
|
S00_AXI_wlast,
|
|
S00_AXI_wready,
|
|
S00_AXI_wstrb,
|
|
S00_AXI_wvalid);
|
|
input ACLK;
|
|
input ARESETN;
|
|
input M00_ACLK;
|
|
input [7:0]M00_ARESETN;
|
|
output [30:0]M00_AXI_araddr;
|
|
output [1:0]M00_AXI_arburst;
|
|
output [3:0]M00_AXI_arcache;
|
|
output [3:0]M00_AXI_arid;
|
|
output [7:0]M00_AXI_arlen;
|
|
output M00_AXI_arlock;
|
|
output [2:0]M00_AXI_arprot;
|
|
output [3:0]M00_AXI_arqos;
|
|
input M00_AXI_arready;
|
|
output [2:0]M00_AXI_arsize;
|
|
output M00_AXI_arvalid;
|
|
output [30:0]M00_AXI_awaddr;
|
|
output [1:0]M00_AXI_awburst;
|
|
output [3:0]M00_AXI_awcache;
|
|
output [3:0]M00_AXI_awid;
|
|
output [7:0]M00_AXI_awlen;
|
|
output M00_AXI_awlock;
|
|
output [2:0]M00_AXI_awprot;
|
|
output [3:0]M00_AXI_awqos;
|
|
input M00_AXI_awready;
|
|
output [2:0]M00_AXI_awsize;
|
|
output M00_AXI_awvalid;
|
|
input [3:0]M00_AXI_bid;
|
|
output M00_AXI_bready;
|
|
input [1:0]M00_AXI_bresp;
|
|
input M00_AXI_bvalid;
|
|
input [63:0]M00_AXI_rdata;
|
|
input [3:0]M00_AXI_rid;
|
|
input M00_AXI_rlast;
|
|
output M00_AXI_rready;
|
|
input [1:0]M00_AXI_rresp;
|
|
input M00_AXI_rvalid;
|
|
output [63:0]M00_AXI_wdata;
|
|
output M00_AXI_wlast;
|
|
input M00_AXI_wready;
|
|
output [7:0]M00_AXI_wstrb;
|
|
output M00_AXI_wvalid;
|
|
input M01_ACLK;
|
|
input [7:0]M01_ARESETN;
|
|
output [30:0]M01_AXI_araddr;
|
|
output [1:0]M01_AXI_arburst;
|
|
output [3:0]M01_AXI_arcache;
|
|
output [3:0]M01_AXI_arid;
|
|
output [7:0]M01_AXI_arlen;
|
|
output M01_AXI_arlock;
|
|
output [2:0]M01_AXI_arprot;
|
|
output [3:0]M01_AXI_arqos;
|
|
input M01_AXI_arready;
|
|
output [2:0]M01_AXI_arsize;
|
|
output M01_AXI_arvalid;
|
|
output [30:0]M01_AXI_awaddr;
|
|
output [1:0]M01_AXI_awburst;
|
|
output [3:0]M01_AXI_awcache;
|
|
output [3:0]M01_AXI_awid;
|
|
output [7:0]M01_AXI_awlen;
|
|
output M01_AXI_awlock;
|
|
output [2:0]M01_AXI_awprot;
|
|
output [3:0]M01_AXI_awqos;
|
|
input M01_AXI_awready;
|
|
output [2:0]M01_AXI_awsize;
|
|
output M01_AXI_awvalid;
|
|
input [3:0]M01_AXI_bid;
|
|
output M01_AXI_bready;
|
|
input [1:0]M01_AXI_bresp;
|
|
input M01_AXI_bvalid;
|
|
input [63:0]M01_AXI_rdata;
|
|
input [3:0]M01_AXI_rid;
|
|
input M01_AXI_rlast;
|
|
output M01_AXI_rready;
|
|
input [1:0]M01_AXI_rresp;
|
|
input M01_AXI_rvalid;
|
|
output [63:0]M01_AXI_wdata;
|
|
output M01_AXI_wlast;
|
|
input M01_AXI_wready;
|
|
output [7:0]M01_AXI_wstrb;
|
|
output M01_AXI_wvalid;
|
|
input M02_ACLK;
|
|
input [7:0]M02_ARESETN;
|
|
output [63:0]M02_AXI_araddr;
|
|
output [1:0]M02_AXI_arburst;
|
|
output [3:0]M02_AXI_arcache;
|
|
output [3:0]M02_AXI_arid;
|
|
output [7:0]M02_AXI_arlen;
|
|
output M02_AXI_arlock;
|
|
output [2:0]M02_AXI_arprot;
|
|
input M02_AXI_arready;
|
|
output [2:0]M02_AXI_arsize;
|
|
output M02_AXI_arvalid;
|
|
output [63:0]M02_AXI_awaddr;
|
|
output [1:0]M02_AXI_awburst;
|
|
output [3:0]M02_AXI_awcache;
|
|
output [3:0]M02_AXI_awid;
|
|
output [7:0]M02_AXI_awlen;
|
|
output M02_AXI_awlock;
|
|
output [2:0]M02_AXI_awprot;
|
|
input M02_AXI_awready;
|
|
output [2:0]M02_AXI_awsize;
|
|
output M02_AXI_awvalid;
|
|
input [3:0]M02_AXI_bid;
|
|
output M02_AXI_bready;
|
|
input [1:0]M02_AXI_bresp;
|
|
input M02_AXI_bvalid;
|
|
input [63:0]M02_AXI_rdata;
|
|
input [3:0]M02_AXI_rid;
|
|
input M02_AXI_rlast;
|
|
output M02_AXI_rready;
|
|
input [1:0]M02_AXI_rresp;
|
|
input M02_AXI_rvalid;
|
|
output [63:0]M02_AXI_wdata;
|
|
output M02_AXI_wlast;
|
|
input M02_AXI_wready;
|
|
output [7:0]M02_AXI_wstrb;
|
|
output M02_AXI_wvalid;
|
|
input S00_ACLK;
|
|
input S00_ARESETN;
|
|
input [63:0]S00_AXI_araddr;
|
|
input [1:0]S00_AXI_arburst;
|
|
input [3:0]S00_AXI_arcache;
|
|
input [3:0]S00_AXI_arid;
|
|
input [7:0]S00_AXI_arlen;
|
|
input [0:0]S00_AXI_arlock;
|
|
input [2:0]S00_AXI_arprot;
|
|
output [0:0]S00_AXI_arready;
|
|
input [2:0]S00_AXI_arsize;
|
|
input [0:0]S00_AXI_arvalid;
|
|
input [63:0]S00_AXI_awaddr;
|
|
input [1:0]S00_AXI_awburst;
|
|
input [3:0]S00_AXI_awcache;
|
|
input [3:0]S00_AXI_awid;
|
|
input [7:0]S00_AXI_awlen;
|
|
input [0:0]S00_AXI_awlock;
|
|
input [2:0]S00_AXI_awprot;
|
|
output [0:0]S00_AXI_awready;
|
|
input [2:0]S00_AXI_awsize;
|
|
input [0:0]S00_AXI_awvalid;
|
|
output [3:0]S00_AXI_bid;
|
|
input [0:0]S00_AXI_bready;
|
|
output [1:0]S00_AXI_bresp;
|
|
output [0:0]S00_AXI_bvalid;
|
|
output [63:0]S00_AXI_rdata;
|
|
output [3:0]S00_AXI_rid;
|
|
output [0:0]S00_AXI_rlast;
|
|
input [0:0]S00_AXI_rready;
|
|
output [1:0]S00_AXI_rresp;
|
|
output [0:0]S00_AXI_rvalid;
|
|
input [63:0]S00_AXI_wdata;
|
|
input [0:0]S00_AXI_wlast;
|
|
output [0:0]S00_AXI_wready;
|
|
input [7:0]S00_AXI_wstrb;
|
|
input [0:0]S00_AXI_wvalid;
|
|
|
|
wire M00_ACLK_1;
|
|
wire [7:0]M00_ARESETN_1;
|
|
wire M01_ACLK_1;
|
|
wire [7:0]M01_ARESETN_1;
|
|
wire M02_ACLK_1;
|
|
wire [7:0]M02_ARESETN_1;
|
|
wire S00_ACLK_1;
|
|
wire S00_ARESETN_1;
|
|
wire axi_interconnect_0_ACLK_net;
|
|
wire axi_interconnect_0_ARESETN_net;
|
|
wire [63:0]axi_interconnect_0_to_s00_couplers_ARADDR;
|
|
wire [1:0]axi_interconnect_0_to_s00_couplers_ARBURST;
|
|
wire [3:0]axi_interconnect_0_to_s00_couplers_ARCACHE;
|
|
wire [3:0]axi_interconnect_0_to_s00_couplers_ARID;
|
|
wire [7:0]axi_interconnect_0_to_s00_couplers_ARLEN;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_ARLOCK;
|
|
wire [2:0]axi_interconnect_0_to_s00_couplers_ARPROT;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_ARREADY;
|
|
wire [2:0]axi_interconnect_0_to_s00_couplers_ARSIZE;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_ARVALID;
|
|
wire [63:0]axi_interconnect_0_to_s00_couplers_AWADDR;
|
|
wire [1:0]axi_interconnect_0_to_s00_couplers_AWBURST;
|
|
wire [3:0]axi_interconnect_0_to_s00_couplers_AWCACHE;
|
|
wire [3:0]axi_interconnect_0_to_s00_couplers_AWID;
|
|
wire [7:0]axi_interconnect_0_to_s00_couplers_AWLEN;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_AWLOCK;
|
|
wire [2:0]axi_interconnect_0_to_s00_couplers_AWPROT;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_AWREADY;
|
|
wire [2:0]axi_interconnect_0_to_s00_couplers_AWSIZE;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_AWVALID;
|
|
wire [3:0]axi_interconnect_0_to_s00_couplers_BID;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_BREADY;
|
|
wire [1:0]axi_interconnect_0_to_s00_couplers_BRESP;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_BVALID;
|
|
wire [63:0]axi_interconnect_0_to_s00_couplers_RDATA;
|
|
wire [3:0]axi_interconnect_0_to_s00_couplers_RID;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_RLAST;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_RREADY;
|
|
wire [1:0]axi_interconnect_0_to_s00_couplers_RRESP;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_RVALID;
|
|
wire [63:0]axi_interconnect_0_to_s00_couplers_WDATA;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_WLAST;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_WREADY;
|
|
wire [7:0]axi_interconnect_0_to_s00_couplers_WSTRB;
|
|
wire [0:0]axi_interconnect_0_to_s00_couplers_WVALID;
|
|
wire [30:0]m00_couplers_to_axi_interconnect_0_ARADDR;
|
|
wire [1:0]m00_couplers_to_axi_interconnect_0_ARBURST;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_ARCACHE;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_ARID;
|
|
wire [7:0]m00_couplers_to_axi_interconnect_0_ARLEN;
|
|
wire m00_couplers_to_axi_interconnect_0_ARLOCK;
|
|
wire [2:0]m00_couplers_to_axi_interconnect_0_ARPROT;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_ARQOS;
|
|
wire m00_couplers_to_axi_interconnect_0_ARREADY;
|
|
wire [2:0]m00_couplers_to_axi_interconnect_0_ARSIZE;
|
|
wire m00_couplers_to_axi_interconnect_0_ARVALID;
|
|
wire [30:0]m00_couplers_to_axi_interconnect_0_AWADDR;
|
|
wire [1:0]m00_couplers_to_axi_interconnect_0_AWBURST;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_AWCACHE;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_AWID;
|
|
wire [7:0]m00_couplers_to_axi_interconnect_0_AWLEN;
|
|
wire m00_couplers_to_axi_interconnect_0_AWLOCK;
|
|
wire [2:0]m00_couplers_to_axi_interconnect_0_AWPROT;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_AWQOS;
|
|
wire m00_couplers_to_axi_interconnect_0_AWREADY;
|
|
wire [2:0]m00_couplers_to_axi_interconnect_0_AWSIZE;
|
|
wire m00_couplers_to_axi_interconnect_0_AWVALID;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_BID;
|
|
wire m00_couplers_to_axi_interconnect_0_BREADY;
|
|
wire [1:0]m00_couplers_to_axi_interconnect_0_BRESP;
|
|
wire m00_couplers_to_axi_interconnect_0_BVALID;
|
|
wire [63:0]m00_couplers_to_axi_interconnect_0_RDATA;
|
|
wire [3:0]m00_couplers_to_axi_interconnect_0_RID;
|
|
wire m00_couplers_to_axi_interconnect_0_RLAST;
|
|
wire m00_couplers_to_axi_interconnect_0_RREADY;
|
|
wire [1:0]m00_couplers_to_axi_interconnect_0_RRESP;
|
|
wire m00_couplers_to_axi_interconnect_0_RVALID;
|
|
wire [63:0]m00_couplers_to_axi_interconnect_0_WDATA;
|
|
wire m00_couplers_to_axi_interconnect_0_WLAST;
|
|
wire m00_couplers_to_axi_interconnect_0_WREADY;
|
|
wire [7:0]m00_couplers_to_axi_interconnect_0_WSTRB;
|
|
wire m00_couplers_to_axi_interconnect_0_WVALID;
|
|
wire [30:0]m01_couplers_to_axi_interconnect_0_ARADDR;
|
|
wire [1:0]m01_couplers_to_axi_interconnect_0_ARBURST;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_ARCACHE;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_ARID;
|
|
wire [7:0]m01_couplers_to_axi_interconnect_0_ARLEN;
|
|
wire m01_couplers_to_axi_interconnect_0_ARLOCK;
|
|
wire [2:0]m01_couplers_to_axi_interconnect_0_ARPROT;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_ARQOS;
|
|
wire m01_couplers_to_axi_interconnect_0_ARREADY;
|
|
wire [2:0]m01_couplers_to_axi_interconnect_0_ARSIZE;
|
|
wire m01_couplers_to_axi_interconnect_0_ARVALID;
|
|
wire [30:0]m01_couplers_to_axi_interconnect_0_AWADDR;
|
|
wire [1:0]m01_couplers_to_axi_interconnect_0_AWBURST;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_AWCACHE;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_AWID;
|
|
wire [7:0]m01_couplers_to_axi_interconnect_0_AWLEN;
|
|
wire m01_couplers_to_axi_interconnect_0_AWLOCK;
|
|
wire [2:0]m01_couplers_to_axi_interconnect_0_AWPROT;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_AWQOS;
|
|
wire m01_couplers_to_axi_interconnect_0_AWREADY;
|
|
wire [2:0]m01_couplers_to_axi_interconnect_0_AWSIZE;
|
|
wire m01_couplers_to_axi_interconnect_0_AWVALID;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_BID;
|
|
wire m01_couplers_to_axi_interconnect_0_BREADY;
|
|
wire [1:0]m01_couplers_to_axi_interconnect_0_BRESP;
|
|
wire m01_couplers_to_axi_interconnect_0_BVALID;
|
|
wire [63:0]m01_couplers_to_axi_interconnect_0_RDATA;
|
|
wire [3:0]m01_couplers_to_axi_interconnect_0_RID;
|
|
wire m01_couplers_to_axi_interconnect_0_RLAST;
|
|
wire m01_couplers_to_axi_interconnect_0_RREADY;
|
|
wire [1:0]m01_couplers_to_axi_interconnect_0_RRESP;
|
|
wire m01_couplers_to_axi_interconnect_0_RVALID;
|
|
wire [63:0]m01_couplers_to_axi_interconnect_0_WDATA;
|
|
wire m01_couplers_to_axi_interconnect_0_WLAST;
|
|
wire m01_couplers_to_axi_interconnect_0_WREADY;
|
|
wire [7:0]m01_couplers_to_axi_interconnect_0_WSTRB;
|
|
wire m01_couplers_to_axi_interconnect_0_WVALID;
|
|
wire [63:0]m02_couplers_to_axi_interconnect_0_ARADDR;
|
|
wire [1:0]m02_couplers_to_axi_interconnect_0_ARBURST;
|
|
wire [3:0]m02_couplers_to_axi_interconnect_0_ARCACHE;
|
|
wire [3:0]m02_couplers_to_axi_interconnect_0_ARID;
|
|
wire [7:0]m02_couplers_to_axi_interconnect_0_ARLEN;
|
|
wire m02_couplers_to_axi_interconnect_0_ARLOCK;
|
|
wire [2:0]m02_couplers_to_axi_interconnect_0_ARPROT;
|
|
wire m02_couplers_to_axi_interconnect_0_ARREADY;
|
|
wire [2:0]m02_couplers_to_axi_interconnect_0_ARSIZE;
|
|
wire m02_couplers_to_axi_interconnect_0_ARVALID;
|
|
wire [63:0]m02_couplers_to_axi_interconnect_0_AWADDR;
|
|
wire [1:0]m02_couplers_to_axi_interconnect_0_AWBURST;
|
|
wire [3:0]m02_couplers_to_axi_interconnect_0_AWCACHE;
|
|
wire [3:0]m02_couplers_to_axi_interconnect_0_AWID;
|
|
wire [7:0]m02_couplers_to_axi_interconnect_0_AWLEN;
|
|
wire m02_couplers_to_axi_interconnect_0_AWLOCK;
|
|
wire [2:0]m02_couplers_to_axi_interconnect_0_AWPROT;
|
|
wire m02_couplers_to_axi_interconnect_0_AWREADY;
|
|
wire [2:0]m02_couplers_to_axi_interconnect_0_AWSIZE;
|
|
wire m02_couplers_to_axi_interconnect_0_AWVALID;
|
|
wire [3:0]m02_couplers_to_axi_interconnect_0_BID;
|
|
wire m02_couplers_to_axi_interconnect_0_BREADY;
|
|
wire [1:0]m02_couplers_to_axi_interconnect_0_BRESP;
|
|
wire m02_couplers_to_axi_interconnect_0_BVALID;
|
|
wire [63:0]m02_couplers_to_axi_interconnect_0_RDATA;
|
|
wire [3:0]m02_couplers_to_axi_interconnect_0_RID;
|
|
wire m02_couplers_to_axi_interconnect_0_RLAST;
|
|
wire m02_couplers_to_axi_interconnect_0_RREADY;
|
|
wire [1:0]m02_couplers_to_axi_interconnect_0_RRESP;
|
|
wire m02_couplers_to_axi_interconnect_0_RVALID;
|
|
wire [63:0]m02_couplers_to_axi_interconnect_0_WDATA;
|
|
wire m02_couplers_to_axi_interconnect_0_WLAST;
|
|
wire m02_couplers_to_axi_interconnect_0_WREADY;
|
|
wire [7:0]m02_couplers_to_axi_interconnect_0_WSTRB;
|
|
wire m02_couplers_to_axi_interconnect_0_WVALID;
|
|
wire [63:0]s00_couplers_to_xbar_ARADDR;
|
|
wire [1:0]s00_couplers_to_xbar_ARBURST;
|
|
wire [3:0]s00_couplers_to_xbar_ARCACHE;
|
|
wire [3:0]s00_couplers_to_xbar_ARID;
|
|
wire [7:0]s00_couplers_to_xbar_ARLEN;
|
|
wire [0:0]s00_couplers_to_xbar_ARLOCK;
|
|
wire [2:0]s00_couplers_to_xbar_ARPROT;
|
|
wire [0:0]s00_couplers_to_xbar_ARREADY;
|
|
wire [2:0]s00_couplers_to_xbar_ARSIZE;
|
|
wire [0:0]s00_couplers_to_xbar_ARVALID;
|
|
wire [63:0]s00_couplers_to_xbar_AWADDR;
|
|
wire [1:0]s00_couplers_to_xbar_AWBURST;
|
|
wire [3:0]s00_couplers_to_xbar_AWCACHE;
|
|
wire [3:0]s00_couplers_to_xbar_AWID;
|
|
wire [7:0]s00_couplers_to_xbar_AWLEN;
|
|
wire [0:0]s00_couplers_to_xbar_AWLOCK;
|
|
wire [2:0]s00_couplers_to_xbar_AWPROT;
|
|
wire [0:0]s00_couplers_to_xbar_AWREADY;
|
|
wire [2:0]s00_couplers_to_xbar_AWSIZE;
|
|
wire [0:0]s00_couplers_to_xbar_AWVALID;
|
|
wire [3:0]s00_couplers_to_xbar_BID;
|
|
wire [0:0]s00_couplers_to_xbar_BREADY;
|
|
wire [1:0]s00_couplers_to_xbar_BRESP;
|
|
wire [0:0]s00_couplers_to_xbar_BVALID;
|
|
wire [63:0]s00_couplers_to_xbar_RDATA;
|
|
wire [3:0]s00_couplers_to_xbar_RID;
|
|
wire [0:0]s00_couplers_to_xbar_RLAST;
|
|
wire [0:0]s00_couplers_to_xbar_RREADY;
|
|
wire [1:0]s00_couplers_to_xbar_RRESP;
|
|
wire [0:0]s00_couplers_to_xbar_RVALID;
|
|
wire [63:0]s00_couplers_to_xbar_WDATA;
|
|
wire [0:0]s00_couplers_to_xbar_WLAST;
|
|
wire [0:0]s00_couplers_to_xbar_WREADY;
|
|
wire [7:0]s00_couplers_to_xbar_WSTRB;
|
|
wire [0:0]s00_couplers_to_xbar_WVALID;
|
|
wire [63:0]xbar_to_m00_couplers_ARADDR;
|
|
wire [1:0]xbar_to_m00_couplers_ARBURST;
|
|
wire [3:0]xbar_to_m00_couplers_ARCACHE;
|
|
wire [3:0]xbar_to_m00_couplers_ARID;
|
|
wire [7:0]xbar_to_m00_couplers_ARLEN;
|
|
wire [0:0]xbar_to_m00_couplers_ARLOCK;
|
|
wire [2:0]xbar_to_m00_couplers_ARPROT;
|
|
wire [3:0]xbar_to_m00_couplers_ARQOS;
|
|
wire xbar_to_m00_couplers_ARREADY;
|
|
wire [3:0]xbar_to_m00_couplers_ARREGION;
|
|
wire [2:0]xbar_to_m00_couplers_ARSIZE;
|
|
wire [0:0]xbar_to_m00_couplers_ARVALID;
|
|
wire [63:0]xbar_to_m00_couplers_AWADDR;
|
|
wire [1:0]xbar_to_m00_couplers_AWBURST;
|
|
wire [3:0]xbar_to_m00_couplers_AWCACHE;
|
|
wire [3:0]xbar_to_m00_couplers_AWID;
|
|
wire [7:0]xbar_to_m00_couplers_AWLEN;
|
|
wire [0:0]xbar_to_m00_couplers_AWLOCK;
|
|
wire [2:0]xbar_to_m00_couplers_AWPROT;
|
|
wire [3:0]xbar_to_m00_couplers_AWQOS;
|
|
wire xbar_to_m00_couplers_AWREADY;
|
|
wire [3:0]xbar_to_m00_couplers_AWREGION;
|
|
wire [2:0]xbar_to_m00_couplers_AWSIZE;
|
|
wire [0:0]xbar_to_m00_couplers_AWVALID;
|
|
wire [3:0]xbar_to_m00_couplers_BID;
|
|
wire [0:0]xbar_to_m00_couplers_BREADY;
|
|
wire [1:0]xbar_to_m00_couplers_BRESP;
|
|
wire xbar_to_m00_couplers_BVALID;
|
|
wire [63:0]xbar_to_m00_couplers_RDATA;
|
|
wire [3:0]xbar_to_m00_couplers_RID;
|
|
wire xbar_to_m00_couplers_RLAST;
|
|
wire [0:0]xbar_to_m00_couplers_RREADY;
|
|
wire [1:0]xbar_to_m00_couplers_RRESP;
|
|
wire xbar_to_m00_couplers_RVALID;
|
|
wire [63:0]xbar_to_m00_couplers_WDATA;
|
|
wire [0:0]xbar_to_m00_couplers_WLAST;
|
|
wire xbar_to_m00_couplers_WREADY;
|
|
wire [7:0]xbar_to_m00_couplers_WSTRB;
|
|
wire [0:0]xbar_to_m00_couplers_WVALID;
|
|
wire [127:64]xbar_to_m01_couplers_ARADDR;
|
|
wire [3:2]xbar_to_m01_couplers_ARBURST;
|
|
wire [7:4]xbar_to_m01_couplers_ARCACHE;
|
|
wire [7:4]xbar_to_m01_couplers_ARID;
|
|
wire [15:8]xbar_to_m01_couplers_ARLEN;
|
|
wire [1:1]xbar_to_m01_couplers_ARLOCK;
|
|
wire [5:3]xbar_to_m01_couplers_ARPROT;
|
|
wire [7:4]xbar_to_m01_couplers_ARQOS;
|
|
wire xbar_to_m01_couplers_ARREADY;
|
|
wire [7:4]xbar_to_m01_couplers_ARREGION;
|
|
wire [5:3]xbar_to_m01_couplers_ARSIZE;
|
|
wire [1:1]xbar_to_m01_couplers_ARVALID;
|
|
wire [127:64]xbar_to_m01_couplers_AWADDR;
|
|
wire [3:2]xbar_to_m01_couplers_AWBURST;
|
|
wire [7:4]xbar_to_m01_couplers_AWCACHE;
|
|
wire [7:4]xbar_to_m01_couplers_AWID;
|
|
wire [15:8]xbar_to_m01_couplers_AWLEN;
|
|
wire [1:1]xbar_to_m01_couplers_AWLOCK;
|
|
wire [5:3]xbar_to_m01_couplers_AWPROT;
|
|
wire [7:4]xbar_to_m01_couplers_AWQOS;
|
|
wire xbar_to_m01_couplers_AWREADY;
|
|
wire [7:4]xbar_to_m01_couplers_AWREGION;
|
|
wire [5:3]xbar_to_m01_couplers_AWSIZE;
|
|
wire [1:1]xbar_to_m01_couplers_AWVALID;
|
|
wire [3:0]xbar_to_m01_couplers_BID;
|
|
wire [1:1]xbar_to_m01_couplers_BREADY;
|
|
wire [1:0]xbar_to_m01_couplers_BRESP;
|
|
wire xbar_to_m01_couplers_BVALID;
|
|
wire [63:0]xbar_to_m01_couplers_RDATA;
|
|
wire [3:0]xbar_to_m01_couplers_RID;
|
|
wire xbar_to_m01_couplers_RLAST;
|
|
wire [1:1]xbar_to_m01_couplers_RREADY;
|
|
wire [1:0]xbar_to_m01_couplers_RRESP;
|
|
wire xbar_to_m01_couplers_RVALID;
|
|
wire [127:64]xbar_to_m01_couplers_WDATA;
|
|
wire [1:1]xbar_to_m01_couplers_WLAST;
|
|
wire xbar_to_m01_couplers_WREADY;
|
|
wire [15:8]xbar_to_m01_couplers_WSTRB;
|
|
wire [1:1]xbar_to_m01_couplers_WVALID;
|
|
wire [191:128]xbar_to_m02_couplers_ARADDR;
|
|
wire [5:4]xbar_to_m02_couplers_ARBURST;
|
|
wire [11:8]xbar_to_m02_couplers_ARCACHE;
|
|
wire [11:8]xbar_to_m02_couplers_ARID;
|
|
wire [23:16]xbar_to_m02_couplers_ARLEN;
|
|
wire [2:2]xbar_to_m02_couplers_ARLOCK;
|
|
wire [8:6]xbar_to_m02_couplers_ARPROT;
|
|
wire xbar_to_m02_couplers_ARREADY;
|
|
wire [8:6]xbar_to_m02_couplers_ARSIZE;
|
|
wire [2:2]xbar_to_m02_couplers_ARVALID;
|
|
wire [191:128]xbar_to_m02_couplers_AWADDR;
|
|
wire [5:4]xbar_to_m02_couplers_AWBURST;
|
|
wire [11:8]xbar_to_m02_couplers_AWCACHE;
|
|
wire [11:8]xbar_to_m02_couplers_AWID;
|
|
wire [23:16]xbar_to_m02_couplers_AWLEN;
|
|
wire [2:2]xbar_to_m02_couplers_AWLOCK;
|
|
wire [8:6]xbar_to_m02_couplers_AWPROT;
|
|
wire xbar_to_m02_couplers_AWREADY;
|
|
wire [8:6]xbar_to_m02_couplers_AWSIZE;
|
|
wire [2:2]xbar_to_m02_couplers_AWVALID;
|
|
wire [3:0]xbar_to_m02_couplers_BID;
|
|
wire [2:2]xbar_to_m02_couplers_BREADY;
|
|
wire [1:0]xbar_to_m02_couplers_BRESP;
|
|
wire xbar_to_m02_couplers_BVALID;
|
|
wire [63:0]xbar_to_m02_couplers_RDATA;
|
|
wire [3:0]xbar_to_m02_couplers_RID;
|
|
wire xbar_to_m02_couplers_RLAST;
|
|
wire [2:2]xbar_to_m02_couplers_RREADY;
|
|
wire [1:0]xbar_to_m02_couplers_RRESP;
|
|
wire xbar_to_m02_couplers_RVALID;
|
|
wire [191:128]xbar_to_m02_couplers_WDATA;
|
|
wire [2:2]xbar_to_m02_couplers_WLAST;
|
|
wire xbar_to_m02_couplers_WREADY;
|
|
wire [23:16]xbar_to_m02_couplers_WSTRB;
|
|
wire [2:2]xbar_to_m02_couplers_WVALID;
|
|
|
|
assign M00_ACLK_1 = M00_ACLK;
|
|
assign M00_ARESETN_1 = M00_ARESETN[7:0];
|
|
assign M00_AXI_araddr[30:0] = m00_couplers_to_axi_interconnect_0_ARADDR;
|
|
assign M00_AXI_arburst[1:0] = m00_couplers_to_axi_interconnect_0_ARBURST;
|
|
assign M00_AXI_arcache[3:0] = m00_couplers_to_axi_interconnect_0_ARCACHE;
|
|
assign M00_AXI_arid[3:0] = m00_couplers_to_axi_interconnect_0_ARID;
|
|
assign M00_AXI_arlen[7:0] = m00_couplers_to_axi_interconnect_0_ARLEN;
|
|
assign M00_AXI_arlock = m00_couplers_to_axi_interconnect_0_ARLOCK;
|
|
assign M00_AXI_arprot[2:0] = m00_couplers_to_axi_interconnect_0_ARPROT;
|
|
assign M00_AXI_arqos[3:0] = m00_couplers_to_axi_interconnect_0_ARQOS;
|
|
assign M00_AXI_arsize[2:0] = m00_couplers_to_axi_interconnect_0_ARSIZE;
|
|
assign M00_AXI_arvalid = m00_couplers_to_axi_interconnect_0_ARVALID;
|
|
assign M00_AXI_awaddr[30:0] = m00_couplers_to_axi_interconnect_0_AWADDR;
|
|
assign M00_AXI_awburst[1:0] = m00_couplers_to_axi_interconnect_0_AWBURST;
|
|
assign M00_AXI_awcache[3:0] = m00_couplers_to_axi_interconnect_0_AWCACHE;
|
|
assign M00_AXI_awid[3:0] = m00_couplers_to_axi_interconnect_0_AWID;
|
|
assign M00_AXI_awlen[7:0] = m00_couplers_to_axi_interconnect_0_AWLEN;
|
|
assign M00_AXI_awlock = m00_couplers_to_axi_interconnect_0_AWLOCK;
|
|
assign M00_AXI_awprot[2:0] = m00_couplers_to_axi_interconnect_0_AWPROT;
|
|
assign M00_AXI_awqos[3:0] = m00_couplers_to_axi_interconnect_0_AWQOS;
|
|
assign M00_AXI_awsize[2:0] = m00_couplers_to_axi_interconnect_0_AWSIZE;
|
|
assign M00_AXI_awvalid = m00_couplers_to_axi_interconnect_0_AWVALID;
|
|
assign M00_AXI_bready = m00_couplers_to_axi_interconnect_0_BREADY;
|
|
assign M00_AXI_rready = m00_couplers_to_axi_interconnect_0_RREADY;
|
|
assign M00_AXI_wdata[63:0] = m00_couplers_to_axi_interconnect_0_WDATA;
|
|
assign M00_AXI_wlast = m00_couplers_to_axi_interconnect_0_WLAST;
|
|
assign M00_AXI_wstrb[7:0] = m00_couplers_to_axi_interconnect_0_WSTRB;
|
|
assign M00_AXI_wvalid = m00_couplers_to_axi_interconnect_0_WVALID;
|
|
assign M01_ACLK_1 = M01_ACLK;
|
|
assign M01_ARESETN_1 = M01_ARESETN[7:0];
|
|
assign M01_AXI_araddr[30:0] = m01_couplers_to_axi_interconnect_0_ARADDR;
|
|
assign M01_AXI_arburst[1:0] = m01_couplers_to_axi_interconnect_0_ARBURST;
|
|
assign M01_AXI_arcache[3:0] = m01_couplers_to_axi_interconnect_0_ARCACHE;
|
|
assign M01_AXI_arid[3:0] = m01_couplers_to_axi_interconnect_0_ARID;
|
|
assign M01_AXI_arlen[7:0] = m01_couplers_to_axi_interconnect_0_ARLEN;
|
|
assign M01_AXI_arlock = m01_couplers_to_axi_interconnect_0_ARLOCK;
|
|
assign M01_AXI_arprot[2:0] = m01_couplers_to_axi_interconnect_0_ARPROT;
|
|
assign M01_AXI_arqos[3:0] = m01_couplers_to_axi_interconnect_0_ARQOS;
|
|
assign M01_AXI_arsize[2:0] = m01_couplers_to_axi_interconnect_0_ARSIZE;
|
|
assign M01_AXI_arvalid = m01_couplers_to_axi_interconnect_0_ARVALID;
|
|
assign M01_AXI_awaddr[30:0] = m01_couplers_to_axi_interconnect_0_AWADDR;
|
|
assign M01_AXI_awburst[1:0] = m01_couplers_to_axi_interconnect_0_AWBURST;
|
|
assign M01_AXI_awcache[3:0] = m01_couplers_to_axi_interconnect_0_AWCACHE;
|
|
assign M01_AXI_awid[3:0] = m01_couplers_to_axi_interconnect_0_AWID;
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|
assign M01_AXI_awlen[7:0] = m01_couplers_to_axi_interconnect_0_AWLEN;
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|
assign M01_AXI_awlock = m01_couplers_to_axi_interconnect_0_AWLOCK;
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|
assign M01_AXI_awprot[2:0] = m01_couplers_to_axi_interconnect_0_AWPROT;
|
|
assign M01_AXI_awqos[3:0] = m01_couplers_to_axi_interconnect_0_AWQOS;
|
|
assign M01_AXI_awsize[2:0] = m01_couplers_to_axi_interconnect_0_AWSIZE;
|
|
assign M01_AXI_awvalid = m01_couplers_to_axi_interconnect_0_AWVALID;
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|
assign M01_AXI_bready = m01_couplers_to_axi_interconnect_0_BREADY;
|
|
assign M01_AXI_rready = m01_couplers_to_axi_interconnect_0_RREADY;
|
|
assign M01_AXI_wdata[63:0] = m01_couplers_to_axi_interconnect_0_WDATA;
|
|
assign M01_AXI_wlast = m01_couplers_to_axi_interconnect_0_WLAST;
|
|
assign M01_AXI_wstrb[7:0] = m01_couplers_to_axi_interconnect_0_WSTRB;
|
|
assign M01_AXI_wvalid = m01_couplers_to_axi_interconnect_0_WVALID;
|
|
assign M02_ACLK_1 = M02_ACLK;
|
|
assign M02_ARESETN_1 = M02_ARESETN[7:0];
|
|
assign M02_AXI_araddr[63:0] = m02_couplers_to_axi_interconnect_0_ARADDR;
|
|
assign M02_AXI_arburst[1:0] = m02_couplers_to_axi_interconnect_0_ARBURST;
|
|
assign M02_AXI_arcache[3:0] = m02_couplers_to_axi_interconnect_0_ARCACHE;
|
|
assign M02_AXI_arid[3:0] = m02_couplers_to_axi_interconnect_0_ARID;
|
|
assign M02_AXI_arlen[7:0] = m02_couplers_to_axi_interconnect_0_ARLEN;
|
|
assign M02_AXI_arlock = m02_couplers_to_axi_interconnect_0_ARLOCK;
|
|
assign M02_AXI_arprot[2:0] = m02_couplers_to_axi_interconnect_0_ARPROT;
|
|
assign M02_AXI_arsize[2:0] = m02_couplers_to_axi_interconnect_0_ARSIZE;
|
|
assign M02_AXI_arvalid = m02_couplers_to_axi_interconnect_0_ARVALID;
|
|
assign M02_AXI_awaddr[63:0] = m02_couplers_to_axi_interconnect_0_AWADDR;
|
|
assign M02_AXI_awburst[1:0] = m02_couplers_to_axi_interconnect_0_AWBURST;
|
|
assign M02_AXI_awcache[3:0] = m02_couplers_to_axi_interconnect_0_AWCACHE;
|
|
assign M02_AXI_awid[3:0] = m02_couplers_to_axi_interconnect_0_AWID;
|
|
assign M02_AXI_awlen[7:0] = m02_couplers_to_axi_interconnect_0_AWLEN;
|
|
assign M02_AXI_awlock = m02_couplers_to_axi_interconnect_0_AWLOCK;
|
|
assign M02_AXI_awprot[2:0] = m02_couplers_to_axi_interconnect_0_AWPROT;
|
|
assign M02_AXI_awsize[2:0] = m02_couplers_to_axi_interconnect_0_AWSIZE;
|
|
assign M02_AXI_awvalid = m02_couplers_to_axi_interconnect_0_AWVALID;
|
|
assign M02_AXI_bready = m02_couplers_to_axi_interconnect_0_BREADY;
|
|
assign M02_AXI_rready = m02_couplers_to_axi_interconnect_0_RREADY;
|
|
assign M02_AXI_wdata[63:0] = m02_couplers_to_axi_interconnect_0_WDATA;
|
|
assign M02_AXI_wlast = m02_couplers_to_axi_interconnect_0_WLAST;
|
|
assign M02_AXI_wstrb[7:0] = m02_couplers_to_axi_interconnect_0_WSTRB;
|
|
assign M02_AXI_wvalid = m02_couplers_to_axi_interconnect_0_WVALID;
|
|
assign S00_ACLK_1 = S00_ACLK;
|
|
assign S00_ARESETN_1 = S00_ARESETN;
|
|
assign S00_AXI_arready[0] = axi_interconnect_0_to_s00_couplers_ARREADY;
|
|
assign S00_AXI_awready[0] = axi_interconnect_0_to_s00_couplers_AWREADY;
|
|
assign S00_AXI_bid[3:0] = axi_interconnect_0_to_s00_couplers_BID;
|
|
assign S00_AXI_bresp[1:0] = axi_interconnect_0_to_s00_couplers_BRESP;
|
|
assign S00_AXI_bvalid[0] = axi_interconnect_0_to_s00_couplers_BVALID;
|
|
assign S00_AXI_rdata[63:0] = axi_interconnect_0_to_s00_couplers_RDATA;
|
|
assign S00_AXI_rid[3:0] = axi_interconnect_0_to_s00_couplers_RID;
|
|
assign S00_AXI_rlast[0] = axi_interconnect_0_to_s00_couplers_RLAST;
|
|
assign S00_AXI_rresp[1:0] = axi_interconnect_0_to_s00_couplers_RRESP;
|
|
assign S00_AXI_rvalid[0] = axi_interconnect_0_to_s00_couplers_RVALID;
|
|
assign S00_AXI_wready[0] = axi_interconnect_0_to_s00_couplers_WREADY;
|
|
assign axi_interconnect_0_ACLK_net = ACLK;
|
|
assign axi_interconnect_0_ARESETN_net = ARESETN;
|
|
assign axi_interconnect_0_to_s00_couplers_ARADDR = S00_AXI_araddr[63:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARBURST = S00_AXI_arburst[1:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARCACHE = S00_AXI_arcache[3:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARID = S00_AXI_arid[3:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARLEN = S00_AXI_arlen[7:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARLOCK = S00_AXI_arlock[0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARPROT = S00_AXI_arprot[2:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARSIZE = S00_AXI_arsize[2:0];
|
|
assign axi_interconnect_0_to_s00_couplers_ARVALID = S00_AXI_arvalid[0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWADDR = S00_AXI_awaddr[63:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWBURST = S00_AXI_awburst[1:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWCACHE = S00_AXI_awcache[3:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWID = S00_AXI_awid[3:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWLEN = S00_AXI_awlen[7:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWLOCK = S00_AXI_awlock[0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWPROT = S00_AXI_awprot[2:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWSIZE = S00_AXI_awsize[2:0];
|
|
assign axi_interconnect_0_to_s00_couplers_AWVALID = S00_AXI_awvalid[0];
|
|
assign axi_interconnect_0_to_s00_couplers_BREADY = S00_AXI_bready[0];
|
|
assign axi_interconnect_0_to_s00_couplers_RREADY = S00_AXI_rready[0];
|
|
assign axi_interconnect_0_to_s00_couplers_WDATA = S00_AXI_wdata[63:0];
|
|
assign axi_interconnect_0_to_s00_couplers_WLAST = S00_AXI_wlast[0];
|
|
assign axi_interconnect_0_to_s00_couplers_WSTRB = S00_AXI_wstrb[7:0];
|
|
assign axi_interconnect_0_to_s00_couplers_WVALID = S00_AXI_wvalid[0];
|
|
assign m00_couplers_to_axi_interconnect_0_ARREADY = M00_AXI_arready;
|
|
assign m00_couplers_to_axi_interconnect_0_AWREADY = M00_AXI_awready;
|
|
assign m00_couplers_to_axi_interconnect_0_BID = M00_AXI_bid[3:0];
|
|
assign m00_couplers_to_axi_interconnect_0_BRESP = M00_AXI_bresp[1:0];
|
|
assign m00_couplers_to_axi_interconnect_0_BVALID = M00_AXI_bvalid;
|
|
assign m00_couplers_to_axi_interconnect_0_RDATA = M00_AXI_rdata[63:0];
|
|
assign m00_couplers_to_axi_interconnect_0_RID = M00_AXI_rid[3:0];
|
|
assign m00_couplers_to_axi_interconnect_0_RLAST = M00_AXI_rlast;
|
|
assign m00_couplers_to_axi_interconnect_0_RRESP = M00_AXI_rresp[1:0];
|
|
assign m00_couplers_to_axi_interconnect_0_RVALID = M00_AXI_rvalid;
|
|
assign m00_couplers_to_axi_interconnect_0_WREADY = M00_AXI_wready;
|
|
assign m01_couplers_to_axi_interconnect_0_ARREADY = M01_AXI_arready;
|
|
assign m01_couplers_to_axi_interconnect_0_AWREADY = M01_AXI_awready;
|
|
assign m01_couplers_to_axi_interconnect_0_BID = M01_AXI_bid[3:0];
|
|
assign m01_couplers_to_axi_interconnect_0_BRESP = M01_AXI_bresp[1:0];
|
|
assign m01_couplers_to_axi_interconnect_0_BVALID = M01_AXI_bvalid;
|
|
assign m01_couplers_to_axi_interconnect_0_RDATA = M01_AXI_rdata[63:0];
|
|
assign m01_couplers_to_axi_interconnect_0_RID = M01_AXI_rid[3:0];
|
|
assign m01_couplers_to_axi_interconnect_0_RLAST = M01_AXI_rlast;
|
|
assign m01_couplers_to_axi_interconnect_0_RRESP = M01_AXI_rresp[1:0];
|
|
assign m01_couplers_to_axi_interconnect_0_RVALID = M01_AXI_rvalid;
|
|
assign m01_couplers_to_axi_interconnect_0_WREADY = M01_AXI_wready;
|
|
assign m02_couplers_to_axi_interconnect_0_ARREADY = M02_AXI_arready;
|
|
assign m02_couplers_to_axi_interconnect_0_AWREADY = M02_AXI_awready;
|
|
assign m02_couplers_to_axi_interconnect_0_BID = M02_AXI_bid[3:0];
|
|
assign m02_couplers_to_axi_interconnect_0_BRESP = M02_AXI_bresp[1:0];
|
|
assign m02_couplers_to_axi_interconnect_0_BVALID = M02_AXI_bvalid;
|
|
assign m02_couplers_to_axi_interconnect_0_RDATA = M02_AXI_rdata[63:0];
|
|
assign m02_couplers_to_axi_interconnect_0_RID = M02_AXI_rid[3:0];
|
|
assign m02_couplers_to_axi_interconnect_0_RLAST = M02_AXI_rlast;
|
|
assign m02_couplers_to_axi_interconnect_0_RRESP = M02_AXI_rresp[1:0];
|
|
assign m02_couplers_to_axi_interconnect_0_RVALID = M02_AXI_rvalid;
|
|
assign m02_couplers_to_axi_interconnect_0_WREADY = M02_AXI_wready;
|
|
m00_couplers_imp_JY9FDQ m00_couplers
|
|
(.M_ACLK(M00_ACLK_1),
|
|
.M_ARESETN(M00_ARESETN_1),
|
|
.M_AXI_araddr(m00_couplers_to_axi_interconnect_0_ARADDR),
|
|
.M_AXI_arburst(m00_couplers_to_axi_interconnect_0_ARBURST),
|
|
.M_AXI_arcache(m00_couplers_to_axi_interconnect_0_ARCACHE),
|
|
.M_AXI_arid(m00_couplers_to_axi_interconnect_0_ARID),
|
|
.M_AXI_arlen(m00_couplers_to_axi_interconnect_0_ARLEN),
|
|
.M_AXI_arlock(m00_couplers_to_axi_interconnect_0_ARLOCK),
|
|
.M_AXI_arprot(m00_couplers_to_axi_interconnect_0_ARPROT),
|
|
.M_AXI_arqos(m00_couplers_to_axi_interconnect_0_ARQOS),
|
|
.M_AXI_arready(m00_couplers_to_axi_interconnect_0_ARREADY),
|
|
.M_AXI_arsize(m00_couplers_to_axi_interconnect_0_ARSIZE),
|
|
.M_AXI_arvalid(m00_couplers_to_axi_interconnect_0_ARVALID),
|
|
.M_AXI_awaddr(m00_couplers_to_axi_interconnect_0_AWADDR),
|
|
.M_AXI_awburst(m00_couplers_to_axi_interconnect_0_AWBURST),
|
|
.M_AXI_awcache(m00_couplers_to_axi_interconnect_0_AWCACHE),
|
|
.M_AXI_awid(m00_couplers_to_axi_interconnect_0_AWID),
|
|
.M_AXI_awlen(m00_couplers_to_axi_interconnect_0_AWLEN),
|
|
.M_AXI_awlock(m00_couplers_to_axi_interconnect_0_AWLOCK),
|
|
.M_AXI_awprot(m00_couplers_to_axi_interconnect_0_AWPROT),
|
|
.M_AXI_awqos(m00_couplers_to_axi_interconnect_0_AWQOS),
|
|
.M_AXI_awready(m00_couplers_to_axi_interconnect_0_AWREADY),
|
|
.M_AXI_awsize(m00_couplers_to_axi_interconnect_0_AWSIZE),
|
|
.M_AXI_awvalid(m00_couplers_to_axi_interconnect_0_AWVALID),
|
|
.M_AXI_bid(m00_couplers_to_axi_interconnect_0_BID),
|
|
.M_AXI_bready(m00_couplers_to_axi_interconnect_0_BREADY),
|
|
.M_AXI_bresp(m00_couplers_to_axi_interconnect_0_BRESP),
|
|
.M_AXI_bvalid(m00_couplers_to_axi_interconnect_0_BVALID),
|
|
.M_AXI_rdata(m00_couplers_to_axi_interconnect_0_RDATA),
|
|
.M_AXI_rid(m00_couplers_to_axi_interconnect_0_RID),
|
|
.M_AXI_rlast(m00_couplers_to_axi_interconnect_0_RLAST),
|
|
.M_AXI_rready(m00_couplers_to_axi_interconnect_0_RREADY),
|
|
.M_AXI_rresp(m00_couplers_to_axi_interconnect_0_RRESP),
|
|
.M_AXI_rvalid(m00_couplers_to_axi_interconnect_0_RVALID),
|
|
.M_AXI_wdata(m00_couplers_to_axi_interconnect_0_WDATA),
|
|
.M_AXI_wlast(m00_couplers_to_axi_interconnect_0_WLAST),
|
|
.M_AXI_wready(m00_couplers_to_axi_interconnect_0_WREADY),
|
|
.M_AXI_wstrb(m00_couplers_to_axi_interconnect_0_WSTRB),
|
|
.M_AXI_wvalid(m00_couplers_to_axi_interconnect_0_WVALID),
|
|
.S_ACLK(axi_interconnect_0_ACLK_net),
|
|
.S_ARESETN(axi_interconnect_0_ARESETN_net),
|
|
.S_AXI_araddr(xbar_to_m00_couplers_ARADDR),
|
|
.S_AXI_arburst(xbar_to_m00_couplers_ARBURST),
|
|
.S_AXI_arcache(xbar_to_m00_couplers_ARCACHE),
|
|
.S_AXI_arid(xbar_to_m00_couplers_ARID),
|
|
.S_AXI_arlen(xbar_to_m00_couplers_ARLEN),
|
|
.S_AXI_arlock(xbar_to_m00_couplers_ARLOCK),
|
|
.S_AXI_arprot(xbar_to_m00_couplers_ARPROT),
|
|
.S_AXI_arqos(xbar_to_m00_couplers_ARQOS),
|
|
.S_AXI_arready(xbar_to_m00_couplers_ARREADY),
|
|
.S_AXI_arregion(xbar_to_m00_couplers_ARREGION),
|
|
.S_AXI_arsize(xbar_to_m00_couplers_ARSIZE),
|
|
.S_AXI_arvalid(xbar_to_m00_couplers_ARVALID),
|
|
.S_AXI_awaddr(xbar_to_m00_couplers_AWADDR),
|
|
.S_AXI_awburst(xbar_to_m00_couplers_AWBURST),
|
|
.S_AXI_awcache(xbar_to_m00_couplers_AWCACHE),
|
|
.S_AXI_awid(xbar_to_m00_couplers_AWID),
|
|
.S_AXI_awlen(xbar_to_m00_couplers_AWLEN),
|
|
.S_AXI_awlock(xbar_to_m00_couplers_AWLOCK),
|
|
.S_AXI_awprot(xbar_to_m00_couplers_AWPROT),
|
|
.S_AXI_awqos(xbar_to_m00_couplers_AWQOS),
|
|
.S_AXI_awready(xbar_to_m00_couplers_AWREADY),
|
|
.S_AXI_awregion(xbar_to_m00_couplers_AWREGION),
|
|
.S_AXI_awsize(xbar_to_m00_couplers_AWSIZE),
|
|
.S_AXI_awvalid(xbar_to_m00_couplers_AWVALID),
|
|
.S_AXI_bid(xbar_to_m00_couplers_BID),
|
|
.S_AXI_bready(xbar_to_m00_couplers_BREADY),
|
|
.S_AXI_bresp(xbar_to_m00_couplers_BRESP),
|
|
.S_AXI_bvalid(xbar_to_m00_couplers_BVALID),
|
|
.S_AXI_rdata(xbar_to_m00_couplers_RDATA),
|
|
.S_AXI_rid(xbar_to_m00_couplers_RID),
|
|
.S_AXI_rlast(xbar_to_m00_couplers_RLAST),
|
|
.S_AXI_rready(xbar_to_m00_couplers_RREADY),
|
|
.S_AXI_rresp(xbar_to_m00_couplers_RRESP),
|
|
.S_AXI_rvalid(xbar_to_m00_couplers_RVALID),
|
|
.S_AXI_wdata(xbar_to_m00_couplers_WDATA),
|
|
.S_AXI_wlast(xbar_to_m00_couplers_WLAST),
|
|
.S_AXI_wready(xbar_to_m00_couplers_WREADY),
|
|
.S_AXI_wstrb(xbar_to_m00_couplers_WSTRB),
|
|
.S_AXI_wvalid(xbar_to_m00_couplers_WVALID));
|
|
m01_couplers_imp_16V7BMJ m01_couplers
|
|
(.M_ACLK(M01_ACLK_1),
|
|
.M_ARESETN(M01_ARESETN_1),
|
|
.M_AXI_araddr(m01_couplers_to_axi_interconnect_0_ARADDR),
|
|
.M_AXI_arburst(m01_couplers_to_axi_interconnect_0_ARBURST),
|
|
.M_AXI_arcache(m01_couplers_to_axi_interconnect_0_ARCACHE),
|
|
.M_AXI_arid(m01_couplers_to_axi_interconnect_0_ARID),
|
|
.M_AXI_arlen(m01_couplers_to_axi_interconnect_0_ARLEN),
|
|
.M_AXI_arlock(m01_couplers_to_axi_interconnect_0_ARLOCK),
|
|
.M_AXI_arprot(m01_couplers_to_axi_interconnect_0_ARPROT),
|
|
.M_AXI_arqos(m01_couplers_to_axi_interconnect_0_ARQOS),
|
|
.M_AXI_arready(m01_couplers_to_axi_interconnect_0_ARREADY),
|
|
.M_AXI_arsize(m01_couplers_to_axi_interconnect_0_ARSIZE),
|
|
.M_AXI_arvalid(m01_couplers_to_axi_interconnect_0_ARVALID),
|
|
.M_AXI_awaddr(m01_couplers_to_axi_interconnect_0_AWADDR),
|
|
.M_AXI_awburst(m01_couplers_to_axi_interconnect_0_AWBURST),
|
|
.M_AXI_awcache(m01_couplers_to_axi_interconnect_0_AWCACHE),
|
|
.M_AXI_awid(m01_couplers_to_axi_interconnect_0_AWID),
|
|
.M_AXI_awlen(m01_couplers_to_axi_interconnect_0_AWLEN),
|
|
.M_AXI_awlock(m01_couplers_to_axi_interconnect_0_AWLOCK),
|
|
.M_AXI_awprot(m01_couplers_to_axi_interconnect_0_AWPROT),
|
|
.M_AXI_awqos(m01_couplers_to_axi_interconnect_0_AWQOS),
|
|
.M_AXI_awready(m01_couplers_to_axi_interconnect_0_AWREADY),
|
|
.M_AXI_awsize(m01_couplers_to_axi_interconnect_0_AWSIZE),
|
|
.M_AXI_awvalid(m01_couplers_to_axi_interconnect_0_AWVALID),
|
|
.M_AXI_bid(m01_couplers_to_axi_interconnect_0_BID),
|
|
.M_AXI_bready(m01_couplers_to_axi_interconnect_0_BREADY),
|
|
.M_AXI_bresp(m01_couplers_to_axi_interconnect_0_BRESP),
|
|
.M_AXI_bvalid(m01_couplers_to_axi_interconnect_0_BVALID),
|
|
.M_AXI_rdata(m01_couplers_to_axi_interconnect_0_RDATA),
|
|
.M_AXI_rid(m01_couplers_to_axi_interconnect_0_RID),
|
|
.M_AXI_rlast(m01_couplers_to_axi_interconnect_0_RLAST),
|
|
.M_AXI_rready(m01_couplers_to_axi_interconnect_0_RREADY),
|
|
.M_AXI_rresp(m01_couplers_to_axi_interconnect_0_RRESP),
|
|
.M_AXI_rvalid(m01_couplers_to_axi_interconnect_0_RVALID),
|
|
.M_AXI_wdata(m01_couplers_to_axi_interconnect_0_WDATA),
|
|
.M_AXI_wlast(m01_couplers_to_axi_interconnect_0_WLAST),
|
|
.M_AXI_wready(m01_couplers_to_axi_interconnect_0_WREADY),
|
|
.M_AXI_wstrb(m01_couplers_to_axi_interconnect_0_WSTRB),
|
|
.M_AXI_wvalid(m01_couplers_to_axi_interconnect_0_WVALID),
|
|
.S_ACLK(axi_interconnect_0_ACLK_net),
|
|
.S_ARESETN(axi_interconnect_0_ARESETN_net),
|
|
.S_AXI_araddr(xbar_to_m01_couplers_ARADDR),
|
|
.S_AXI_arburst(xbar_to_m01_couplers_ARBURST),
|
|
.S_AXI_arcache(xbar_to_m01_couplers_ARCACHE),
|
|
.S_AXI_arid(xbar_to_m01_couplers_ARID),
|
|
.S_AXI_arlen(xbar_to_m01_couplers_ARLEN),
|
|
.S_AXI_arlock(xbar_to_m01_couplers_ARLOCK),
|
|
.S_AXI_arprot(xbar_to_m01_couplers_ARPROT),
|
|
.S_AXI_arqos(xbar_to_m01_couplers_ARQOS),
|
|
.S_AXI_arready(xbar_to_m01_couplers_ARREADY),
|
|
.S_AXI_arregion(xbar_to_m01_couplers_ARREGION),
|
|
.S_AXI_arsize(xbar_to_m01_couplers_ARSIZE),
|
|
.S_AXI_arvalid(xbar_to_m01_couplers_ARVALID),
|
|
.S_AXI_awaddr(xbar_to_m01_couplers_AWADDR),
|
|
.S_AXI_awburst(xbar_to_m01_couplers_AWBURST),
|
|
.S_AXI_awcache(xbar_to_m01_couplers_AWCACHE),
|
|
.S_AXI_awid(xbar_to_m01_couplers_AWID),
|
|
.S_AXI_awlen(xbar_to_m01_couplers_AWLEN),
|
|
.S_AXI_awlock(xbar_to_m01_couplers_AWLOCK),
|
|
.S_AXI_awprot(xbar_to_m01_couplers_AWPROT),
|
|
.S_AXI_awqos(xbar_to_m01_couplers_AWQOS),
|
|
.S_AXI_awready(xbar_to_m01_couplers_AWREADY),
|
|
.S_AXI_awregion(xbar_to_m01_couplers_AWREGION),
|
|
.S_AXI_awsize(xbar_to_m01_couplers_AWSIZE),
|
|
.S_AXI_awvalid(xbar_to_m01_couplers_AWVALID),
|
|
.S_AXI_bid(xbar_to_m01_couplers_BID),
|
|
.S_AXI_bready(xbar_to_m01_couplers_BREADY),
|
|
.S_AXI_bresp(xbar_to_m01_couplers_BRESP),
|
|
.S_AXI_bvalid(xbar_to_m01_couplers_BVALID),
|
|
.S_AXI_rdata(xbar_to_m01_couplers_RDATA),
|
|
.S_AXI_rid(xbar_to_m01_couplers_RID),
|
|
.S_AXI_rlast(xbar_to_m01_couplers_RLAST),
|
|
.S_AXI_rready(xbar_to_m01_couplers_RREADY),
|
|
.S_AXI_rresp(xbar_to_m01_couplers_RRESP),
|
|
.S_AXI_rvalid(xbar_to_m01_couplers_RVALID),
|
|
.S_AXI_wdata(xbar_to_m01_couplers_WDATA),
|
|
.S_AXI_wlast(xbar_to_m01_couplers_WLAST),
|
|
.S_AXI_wready(xbar_to_m01_couplers_WREADY),
|
|
.S_AXI_wstrb(xbar_to_m01_couplers_WSTRB),
|
|
.S_AXI_wvalid(xbar_to_m01_couplers_WVALID));
|
|
m02_couplers_imp_B0MBTH m02_couplers
|
|
(.M_ACLK(M02_ACLK_1),
|
|
.M_ARESETN(M02_ARESETN_1[0]),
|
|
.M_AXI_araddr(m02_couplers_to_axi_interconnect_0_ARADDR),
|
|
.M_AXI_arburst(m02_couplers_to_axi_interconnect_0_ARBURST),
|
|
.M_AXI_arcache(m02_couplers_to_axi_interconnect_0_ARCACHE),
|
|
.M_AXI_arid(m02_couplers_to_axi_interconnect_0_ARID),
|
|
.M_AXI_arlen(m02_couplers_to_axi_interconnect_0_ARLEN),
|
|
.M_AXI_arlock(m02_couplers_to_axi_interconnect_0_ARLOCK),
|
|
.M_AXI_arprot(m02_couplers_to_axi_interconnect_0_ARPROT),
|
|
.M_AXI_arready(m02_couplers_to_axi_interconnect_0_ARREADY),
|
|
.M_AXI_arsize(m02_couplers_to_axi_interconnect_0_ARSIZE),
|
|
.M_AXI_arvalid(m02_couplers_to_axi_interconnect_0_ARVALID),
|
|
.M_AXI_awaddr(m02_couplers_to_axi_interconnect_0_AWADDR),
|
|
.M_AXI_awburst(m02_couplers_to_axi_interconnect_0_AWBURST),
|
|
.M_AXI_awcache(m02_couplers_to_axi_interconnect_0_AWCACHE),
|
|
.M_AXI_awid(m02_couplers_to_axi_interconnect_0_AWID),
|
|
.M_AXI_awlen(m02_couplers_to_axi_interconnect_0_AWLEN),
|
|
.M_AXI_awlock(m02_couplers_to_axi_interconnect_0_AWLOCK),
|
|
.M_AXI_awprot(m02_couplers_to_axi_interconnect_0_AWPROT),
|
|
.M_AXI_awready(m02_couplers_to_axi_interconnect_0_AWREADY),
|
|
.M_AXI_awsize(m02_couplers_to_axi_interconnect_0_AWSIZE),
|
|
.M_AXI_awvalid(m02_couplers_to_axi_interconnect_0_AWVALID),
|
|
.M_AXI_bid(m02_couplers_to_axi_interconnect_0_BID),
|
|
.M_AXI_bready(m02_couplers_to_axi_interconnect_0_BREADY),
|
|
.M_AXI_bresp(m02_couplers_to_axi_interconnect_0_BRESP),
|
|
.M_AXI_bvalid(m02_couplers_to_axi_interconnect_0_BVALID),
|
|
.M_AXI_rdata(m02_couplers_to_axi_interconnect_0_RDATA),
|
|
.M_AXI_rid(m02_couplers_to_axi_interconnect_0_RID),
|
|
.M_AXI_rlast(m02_couplers_to_axi_interconnect_0_RLAST),
|
|
.M_AXI_rready(m02_couplers_to_axi_interconnect_0_RREADY),
|
|
.M_AXI_rresp(m02_couplers_to_axi_interconnect_0_RRESP),
|
|
.M_AXI_rvalid(m02_couplers_to_axi_interconnect_0_RVALID),
|
|
.M_AXI_wdata(m02_couplers_to_axi_interconnect_0_WDATA),
|
|
.M_AXI_wlast(m02_couplers_to_axi_interconnect_0_WLAST),
|
|
.M_AXI_wready(m02_couplers_to_axi_interconnect_0_WREADY),
|
|
.M_AXI_wstrb(m02_couplers_to_axi_interconnect_0_WSTRB),
|
|
.M_AXI_wvalid(m02_couplers_to_axi_interconnect_0_WVALID),
|
|
.S_ACLK(axi_interconnect_0_ACLK_net),
|
|
.S_ARESETN(axi_interconnect_0_ARESETN_net),
|
|
.S_AXI_araddr(xbar_to_m02_couplers_ARADDR),
|
|
.S_AXI_arburst(xbar_to_m02_couplers_ARBURST),
|
|
.S_AXI_arcache(xbar_to_m02_couplers_ARCACHE),
|
|
.S_AXI_arid(xbar_to_m02_couplers_ARID),
|
|
.S_AXI_arlen(xbar_to_m02_couplers_ARLEN),
|
|
.S_AXI_arlock(xbar_to_m02_couplers_ARLOCK),
|
|
.S_AXI_arprot(xbar_to_m02_couplers_ARPROT),
|
|
.S_AXI_arready(xbar_to_m02_couplers_ARREADY),
|
|
.S_AXI_arsize(xbar_to_m02_couplers_ARSIZE),
|
|
.S_AXI_arvalid(xbar_to_m02_couplers_ARVALID),
|
|
.S_AXI_awaddr(xbar_to_m02_couplers_AWADDR),
|
|
.S_AXI_awburst(xbar_to_m02_couplers_AWBURST),
|
|
.S_AXI_awcache(xbar_to_m02_couplers_AWCACHE),
|
|
.S_AXI_awid(xbar_to_m02_couplers_AWID),
|
|
.S_AXI_awlen(xbar_to_m02_couplers_AWLEN),
|
|
.S_AXI_awlock(xbar_to_m02_couplers_AWLOCK),
|
|
.S_AXI_awprot(xbar_to_m02_couplers_AWPROT),
|
|
.S_AXI_awready(xbar_to_m02_couplers_AWREADY),
|
|
.S_AXI_awsize(xbar_to_m02_couplers_AWSIZE),
|
|
.S_AXI_awvalid(xbar_to_m02_couplers_AWVALID),
|
|
.S_AXI_bid(xbar_to_m02_couplers_BID),
|
|
.S_AXI_bready(xbar_to_m02_couplers_BREADY),
|
|
.S_AXI_bresp(xbar_to_m02_couplers_BRESP),
|
|
.S_AXI_bvalid(xbar_to_m02_couplers_BVALID),
|
|
.S_AXI_rdata(xbar_to_m02_couplers_RDATA),
|
|
.S_AXI_rid(xbar_to_m02_couplers_RID),
|
|
.S_AXI_rlast(xbar_to_m02_couplers_RLAST),
|
|
.S_AXI_rready(xbar_to_m02_couplers_RREADY),
|
|
.S_AXI_rresp(xbar_to_m02_couplers_RRESP),
|
|
.S_AXI_rvalid(xbar_to_m02_couplers_RVALID),
|
|
.S_AXI_wdata(xbar_to_m02_couplers_WDATA),
|
|
.S_AXI_wlast(xbar_to_m02_couplers_WLAST),
|
|
.S_AXI_wready(xbar_to_m02_couplers_WREADY),
|
|
.S_AXI_wstrb(xbar_to_m02_couplers_WSTRB),
|
|
.S_AXI_wvalid(xbar_to_m02_couplers_WVALID));
|
|
s00_couplers_imp_1UB271G s00_couplers
|
|
(.M_ACLK(axi_interconnect_0_ACLK_net),
|
|
.M_ARESETN(axi_interconnect_0_ARESETN_net),
|
|
.M_AXI_araddr(s00_couplers_to_xbar_ARADDR),
|
|
.M_AXI_arburst(s00_couplers_to_xbar_ARBURST),
|
|
.M_AXI_arcache(s00_couplers_to_xbar_ARCACHE),
|
|
.M_AXI_arid(s00_couplers_to_xbar_ARID),
|
|
.M_AXI_arlen(s00_couplers_to_xbar_ARLEN),
|
|
.M_AXI_arlock(s00_couplers_to_xbar_ARLOCK),
|
|
.M_AXI_arprot(s00_couplers_to_xbar_ARPROT),
|
|
.M_AXI_arready(s00_couplers_to_xbar_ARREADY),
|
|
.M_AXI_arsize(s00_couplers_to_xbar_ARSIZE),
|
|
.M_AXI_arvalid(s00_couplers_to_xbar_ARVALID),
|
|
.M_AXI_awaddr(s00_couplers_to_xbar_AWADDR),
|
|
.M_AXI_awburst(s00_couplers_to_xbar_AWBURST),
|
|
.M_AXI_awcache(s00_couplers_to_xbar_AWCACHE),
|
|
.M_AXI_awid(s00_couplers_to_xbar_AWID),
|
|
.M_AXI_awlen(s00_couplers_to_xbar_AWLEN),
|
|
.M_AXI_awlock(s00_couplers_to_xbar_AWLOCK),
|
|
.M_AXI_awprot(s00_couplers_to_xbar_AWPROT),
|
|
.M_AXI_awready(s00_couplers_to_xbar_AWREADY),
|
|
.M_AXI_awsize(s00_couplers_to_xbar_AWSIZE),
|
|
.M_AXI_awvalid(s00_couplers_to_xbar_AWVALID),
|
|
.M_AXI_bid(s00_couplers_to_xbar_BID),
|
|
.M_AXI_bready(s00_couplers_to_xbar_BREADY),
|
|
.M_AXI_bresp(s00_couplers_to_xbar_BRESP),
|
|
.M_AXI_bvalid(s00_couplers_to_xbar_BVALID),
|
|
.M_AXI_rdata(s00_couplers_to_xbar_RDATA),
|
|
.M_AXI_rid(s00_couplers_to_xbar_RID),
|
|
.M_AXI_rlast(s00_couplers_to_xbar_RLAST),
|
|
.M_AXI_rready(s00_couplers_to_xbar_RREADY),
|
|
.M_AXI_rresp(s00_couplers_to_xbar_RRESP),
|
|
.M_AXI_rvalid(s00_couplers_to_xbar_RVALID),
|
|
.M_AXI_wdata(s00_couplers_to_xbar_WDATA),
|
|
.M_AXI_wlast(s00_couplers_to_xbar_WLAST),
|
|
.M_AXI_wready(s00_couplers_to_xbar_WREADY),
|
|
.M_AXI_wstrb(s00_couplers_to_xbar_WSTRB),
|
|
.M_AXI_wvalid(s00_couplers_to_xbar_WVALID),
|
|
.S_ACLK(S00_ACLK_1),
|
|
.S_ARESETN(S00_ARESETN_1),
|
|
.S_AXI_araddr(axi_interconnect_0_to_s00_couplers_ARADDR),
|
|
.S_AXI_arburst(axi_interconnect_0_to_s00_couplers_ARBURST),
|
|
.S_AXI_arcache(axi_interconnect_0_to_s00_couplers_ARCACHE),
|
|
.S_AXI_arid(axi_interconnect_0_to_s00_couplers_ARID),
|
|
.S_AXI_arlen(axi_interconnect_0_to_s00_couplers_ARLEN),
|
|
.S_AXI_arlock(axi_interconnect_0_to_s00_couplers_ARLOCK),
|
|
.S_AXI_arprot(axi_interconnect_0_to_s00_couplers_ARPROT),
|
|
.S_AXI_arready(axi_interconnect_0_to_s00_couplers_ARREADY),
|
|
.S_AXI_arsize(axi_interconnect_0_to_s00_couplers_ARSIZE),
|
|
.S_AXI_arvalid(axi_interconnect_0_to_s00_couplers_ARVALID),
|
|
.S_AXI_awaddr(axi_interconnect_0_to_s00_couplers_AWADDR),
|
|
.S_AXI_awburst(axi_interconnect_0_to_s00_couplers_AWBURST),
|
|
.S_AXI_awcache(axi_interconnect_0_to_s00_couplers_AWCACHE),
|
|
.S_AXI_awid(axi_interconnect_0_to_s00_couplers_AWID),
|
|
.S_AXI_awlen(axi_interconnect_0_to_s00_couplers_AWLEN),
|
|
.S_AXI_awlock(axi_interconnect_0_to_s00_couplers_AWLOCK),
|
|
.S_AXI_awprot(axi_interconnect_0_to_s00_couplers_AWPROT),
|
|
.S_AXI_awready(axi_interconnect_0_to_s00_couplers_AWREADY),
|
|
.S_AXI_awsize(axi_interconnect_0_to_s00_couplers_AWSIZE),
|
|
.S_AXI_awvalid(axi_interconnect_0_to_s00_couplers_AWVALID),
|
|
.S_AXI_bid(axi_interconnect_0_to_s00_couplers_BID),
|
|
.S_AXI_bready(axi_interconnect_0_to_s00_couplers_BREADY),
|
|
.S_AXI_bresp(axi_interconnect_0_to_s00_couplers_BRESP),
|
|
.S_AXI_bvalid(axi_interconnect_0_to_s00_couplers_BVALID),
|
|
.S_AXI_rdata(axi_interconnect_0_to_s00_couplers_RDATA),
|
|
.S_AXI_rid(axi_interconnect_0_to_s00_couplers_RID),
|
|
.S_AXI_rlast(axi_interconnect_0_to_s00_couplers_RLAST),
|
|
.S_AXI_rready(axi_interconnect_0_to_s00_couplers_RREADY),
|
|
.S_AXI_rresp(axi_interconnect_0_to_s00_couplers_RRESP),
|
|
.S_AXI_rvalid(axi_interconnect_0_to_s00_couplers_RVALID),
|
|
.S_AXI_wdata(axi_interconnect_0_to_s00_couplers_WDATA),
|
|
.S_AXI_wlast(axi_interconnect_0_to_s00_couplers_WLAST),
|
|
.S_AXI_wready(axi_interconnect_0_to_s00_couplers_WREADY),
|
|
.S_AXI_wstrb(axi_interconnect_0_to_s00_couplers_WSTRB),
|
|
.S_AXI_wvalid(axi_interconnect_0_to_s00_couplers_WVALID));
|
|
Top_xbar_0 xbar
|
|
(.aclk(axi_interconnect_0_ACLK_net),
|
|
.aresetn(axi_interconnect_0_ARESETN_net),
|
|
.m_axi_araddr({xbar_to_m02_couplers_ARADDR,xbar_to_m01_couplers_ARADDR,xbar_to_m00_couplers_ARADDR}),
|
|
.m_axi_arburst({xbar_to_m02_couplers_ARBURST,xbar_to_m01_couplers_ARBURST,xbar_to_m00_couplers_ARBURST}),
|
|
.m_axi_arcache({xbar_to_m02_couplers_ARCACHE,xbar_to_m01_couplers_ARCACHE,xbar_to_m00_couplers_ARCACHE}),
|
|
.m_axi_arid({xbar_to_m02_couplers_ARID,xbar_to_m01_couplers_ARID,xbar_to_m00_couplers_ARID}),
|
|
.m_axi_arlen({xbar_to_m02_couplers_ARLEN,xbar_to_m01_couplers_ARLEN,xbar_to_m00_couplers_ARLEN}),
|
|
.m_axi_arlock({xbar_to_m02_couplers_ARLOCK,xbar_to_m01_couplers_ARLOCK,xbar_to_m00_couplers_ARLOCK}),
|
|
.m_axi_arprot({xbar_to_m02_couplers_ARPROT,xbar_to_m01_couplers_ARPROT,xbar_to_m00_couplers_ARPROT}),
|
|
.m_axi_arqos({xbar_to_m01_couplers_ARQOS,xbar_to_m00_couplers_ARQOS}),
|
|
.m_axi_arready({xbar_to_m02_couplers_ARREADY,xbar_to_m01_couplers_ARREADY,xbar_to_m00_couplers_ARREADY}),
|
|
.m_axi_arregion({xbar_to_m01_couplers_ARREGION,xbar_to_m00_couplers_ARREGION}),
|
|
.m_axi_arsize({xbar_to_m02_couplers_ARSIZE,xbar_to_m01_couplers_ARSIZE,xbar_to_m00_couplers_ARSIZE}),
|
|
.m_axi_arvalid({xbar_to_m02_couplers_ARVALID,xbar_to_m01_couplers_ARVALID,xbar_to_m00_couplers_ARVALID}),
|
|
.m_axi_awaddr({xbar_to_m02_couplers_AWADDR,xbar_to_m01_couplers_AWADDR,xbar_to_m00_couplers_AWADDR}),
|
|
.m_axi_awburst({xbar_to_m02_couplers_AWBURST,xbar_to_m01_couplers_AWBURST,xbar_to_m00_couplers_AWBURST}),
|
|
.m_axi_awcache({xbar_to_m02_couplers_AWCACHE,xbar_to_m01_couplers_AWCACHE,xbar_to_m00_couplers_AWCACHE}),
|
|
.m_axi_awid({xbar_to_m02_couplers_AWID,xbar_to_m01_couplers_AWID,xbar_to_m00_couplers_AWID}),
|
|
.m_axi_awlen({xbar_to_m02_couplers_AWLEN,xbar_to_m01_couplers_AWLEN,xbar_to_m00_couplers_AWLEN}),
|
|
.m_axi_awlock({xbar_to_m02_couplers_AWLOCK,xbar_to_m01_couplers_AWLOCK,xbar_to_m00_couplers_AWLOCK}),
|
|
.m_axi_awprot({xbar_to_m02_couplers_AWPROT,xbar_to_m01_couplers_AWPROT,xbar_to_m00_couplers_AWPROT}),
|
|
.m_axi_awqos({xbar_to_m01_couplers_AWQOS,xbar_to_m00_couplers_AWQOS}),
|
|
.m_axi_awready({xbar_to_m02_couplers_AWREADY,xbar_to_m01_couplers_AWREADY,xbar_to_m00_couplers_AWREADY}),
|
|
.m_axi_awregion({xbar_to_m01_couplers_AWREGION,xbar_to_m00_couplers_AWREGION}),
|
|
.m_axi_awsize({xbar_to_m02_couplers_AWSIZE,xbar_to_m01_couplers_AWSIZE,xbar_to_m00_couplers_AWSIZE}),
|
|
.m_axi_awvalid({xbar_to_m02_couplers_AWVALID,xbar_to_m01_couplers_AWVALID,xbar_to_m00_couplers_AWVALID}),
|
|
.m_axi_bid({xbar_to_m02_couplers_BID,xbar_to_m01_couplers_BID,xbar_to_m00_couplers_BID}),
|
|
.m_axi_bready({xbar_to_m02_couplers_BREADY,xbar_to_m01_couplers_BREADY,xbar_to_m00_couplers_BREADY}),
|
|
.m_axi_bresp({xbar_to_m02_couplers_BRESP,xbar_to_m01_couplers_BRESP,xbar_to_m00_couplers_BRESP}),
|
|
.m_axi_bvalid({xbar_to_m02_couplers_BVALID,xbar_to_m01_couplers_BVALID,xbar_to_m00_couplers_BVALID}),
|
|
.m_axi_rdata({xbar_to_m02_couplers_RDATA,xbar_to_m01_couplers_RDATA,xbar_to_m00_couplers_RDATA}),
|
|
.m_axi_rid({xbar_to_m02_couplers_RID,xbar_to_m01_couplers_RID,xbar_to_m00_couplers_RID}),
|
|
.m_axi_rlast({xbar_to_m02_couplers_RLAST,xbar_to_m01_couplers_RLAST,xbar_to_m00_couplers_RLAST}),
|
|
.m_axi_rready({xbar_to_m02_couplers_RREADY,xbar_to_m01_couplers_RREADY,xbar_to_m00_couplers_RREADY}),
|
|
.m_axi_rresp({xbar_to_m02_couplers_RRESP,xbar_to_m01_couplers_RRESP,xbar_to_m00_couplers_RRESP}),
|
|
.m_axi_rvalid({xbar_to_m02_couplers_RVALID,xbar_to_m01_couplers_RVALID,xbar_to_m00_couplers_RVALID}),
|
|
.m_axi_wdata({xbar_to_m02_couplers_WDATA,xbar_to_m01_couplers_WDATA,xbar_to_m00_couplers_WDATA}),
|
|
.m_axi_wlast({xbar_to_m02_couplers_WLAST,xbar_to_m01_couplers_WLAST,xbar_to_m00_couplers_WLAST}),
|
|
.m_axi_wready({xbar_to_m02_couplers_WREADY,xbar_to_m01_couplers_WREADY,xbar_to_m00_couplers_WREADY}),
|
|
.m_axi_wstrb({xbar_to_m02_couplers_WSTRB,xbar_to_m01_couplers_WSTRB,xbar_to_m00_couplers_WSTRB}),
|
|
.m_axi_wvalid({xbar_to_m02_couplers_WVALID,xbar_to_m01_couplers_WVALID,xbar_to_m00_couplers_WVALID}),
|
|
.s_axi_araddr(s00_couplers_to_xbar_ARADDR),
|
|
.s_axi_arburst(s00_couplers_to_xbar_ARBURST),
|
|
.s_axi_arcache(s00_couplers_to_xbar_ARCACHE),
|
|
.s_axi_arid(s00_couplers_to_xbar_ARID),
|
|
.s_axi_arlen(s00_couplers_to_xbar_ARLEN),
|
|
.s_axi_arlock(s00_couplers_to_xbar_ARLOCK),
|
|
.s_axi_arprot(s00_couplers_to_xbar_ARPROT),
|
|
.s_axi_arqos({1'b0,1'b0,1'b0,1'b0}),
|
|
.s_axi_arready(s00_couplers_to_xbar_ARREADY),
|
|
.s_axi_arsize(s00_couplers_to_xbar_ARSIZE),
|
|
.s_axi_arvalid(s00_couplers_to_xbar_ARVALID),
|
|
.s_axi_awaddr(s00_couplers_to_xbar_AWADDR),
|
|
.s_axi_awburst(s00_couplers_to_xbar_AWBURST),
|
|
.s_axi_awcache(s00_couplers_to_xbar_AWCACHE),
|
|
.s_axi_awid(s00_couplers_to_xbar_AWID),
|
|
.s_axi_awlen(s00_couplers_to_xbar_AWLEN),
|
|
.s_axi_awlock(s00_couplers_to_xbar_AWLOCK),
|
|
.s_axi_awprot(s00_couplers_to_xbar_AWPROT),
|
|
.s_axi_awqos({1'b0,1'b0,1'b0,1'b0}),
|
|
.s_axi_awready(s00_couplers_to_xbar_AWREADY),
|
|
.s_axi_awsize(s00_couplers_to_xbar_AWSIZE),
|
|
.s_axi_awvalid(s00_couplers_to_xbar_AWVALID),
|
|
.s_axi_bid(s00_couplers_to_xbar_BID),
|
|
.s_axi_bready(s00_couplers_to_xbar_BREADY),
|
|
.s_axi_bresp(s00_couplers_to_xbar_BRESP),
|
|
.s_axi_bvalid(s00_couplers_to_xbar_BVALID),
|
|
.s_axi_rdata(s00_couplers_to_xbar_RDATA),
|
|
.s_axi_rid(s00_couplers_to_xbar_RID),
|
|
.s_axi_rlast(s00_couplers_to_xbar_RLAST),
|
|
.s_axi_rready(s00_couplers_to_xbar_RREADY),
|
|
.s_axi_rresp(s00_couplers_to_xbar_RRESP),
|
|
.s_axi_rvalid(s00_couplers_to_xbar_RVALID),
|
|
.s_axi_wdata(s00_couplers_to_xbar_WDATA),
|
|
.s_axi_wlast(s00_couplers_to_xbar_WLAST),
|
|
.s_axi_wready(s00_couplers_to_xbar_WREADY),
|
|
.s_axi_wstrb(s00_couplers_to_xbar_WSTRB),
|
|
.s_axi_wvalid(s00_couplers_to_xbar_WVALID));
|
|
endmodule
|
|
|
|
module m00_couplers_imp_JY9FDQ
|
|
(M_ACLK,
|
|
M_ARESETN,
|
|
M_AXI_araddr,
|
|
M_AXI_arburst,
|
|
M_AXI_arcache,
|
|
M_AXI_arid,
|
|
M_AXI_arlen,
|
|
M_AXI_arlock,
|
|
M_AXI_arprot,
|
|
M_AXI_arqos,
|
|
M_AXI_arready,
|
|
M_AXI_arsize,
|
|
M_AXI_arvalid,
|
|
M_AXI_awaddr,
|
|
M_AXI_awburst,
|
|
M_AXI_awcache,
|
|
M_AXI_awid,
|
|
M_AXI_awlen,
|
|
M_AXI_awlock,
|
|
M_AXI_awprot,
|
|
M_AXI_awqos,
|
|
M_AXI_awready,
|
|
M_AXI_awsize,
|
|
M_AXI_awvalid,
|
|
M_AXI_bid,
|
|
M_AXI_bready,
|
|
M_AXI_bresp,
|
|
M_AXI_bvalid,
|
|
M_AXI_rdata,
|
|
M_AXI_rid,
|
|
M_AXI_rlast,
|
|
M_AXI_rready,
|
|
M_AXI_rresp,
|
|
M_AXI_rvalid,
|
|
M_AXI_wdata,
|
|
M_AXI_wlast,
|
|
M_AXI_wready,
|
|
M_AXI_wstrb,
|
|
M_AXI_wvalid,
|
|
S_ACLK,
|
|
S_ARESETN,
|
|
S_AXI_araddr,
|
|
S_AXI_arburst,
|
|
S_AXI_arcache,
|
|
S_AXI_arid,
|
|
S_AXI_arlen,
|
|
S_AXI_arlock,
|
|
S_AXI_arprot,
|
|
S_AXI_arqos,
|
|
S_AXI_arready,
|
|
S_AXI_arregion,
|
|
S_AXI_arsize,
|
|
S_AXI_arvalid,
|
|
S_AXI_awaddr,
|
|
S_AXI_awburst,
|
|
S_AXI_awcache,
|
|
S_AXI_awid,
|
|
S_AXI_awlen,
|
|
S_AXI_awlock,
|
|
S_AXI_awprot,
|
|
S_AXI_awqos,
|
|
S_AXI_awready,
|
|
S_AXI_awregion,
|
|
S_AXI_awsize,
|
|
S_AXI_awvalid,
|
|
S_AXI_bid,
|
|
S_AXI_bready,
|
|
S_AXI_bresp,
|
|
S_AXI_bvalid,
|
|
S_AXI_rdata,
|
|
S_AXI_rid,
|
|
S_AXI_rlast,
|
|
S_AXI_rready,
|
|
S_AXI_rresp,
|
|
S_AXI_rvalid,
|
|
S_AXI_wdata,
|
|
S_AXI_wlast,
|
|
S_AXI_wready,
|
|
S_AXI_wstrb,
|
|
S_AXI_wvalid);
|
|
input M_ACLK;
|
|
input [7:0]M_ARESETN;
|
|
output [30:0]M_AXI_araddr;
|
|
output [1:0]M_AXI_arburst;
|
|
output [3:0]M_AXI_arcache;
|
|
output [3:0]M_AXI_arid;
|
|
output [7:0]M_AXI_arlen;
|
|
output M_AXI_arlock;
|
|
output [2:0]M_AXI_arprot;
|
|
output [3:0]M_AXI_arqos;
|
|
input M_AXI_arready;
|
|
output [2:0]M_AXI_arsize;
|
|
output M_AXI_arvalid;
|
|
output [30:0]M_AXI_awaddr;
|
|
output [1:0]M_AXI_awburst;
|
|
output [3:0]M_AXI_awcache;
|
|
output [3:0]M_AXI_awid;
|
|
output [7:0]M_AXI_awlen;
|
|
output M_AXI_awlock;
|
|
output [2:0]M_AXI_awprot;
|
|
output [3:0]M_AXI_awqos;
|
|
input M_AXI_awready;
|
|
output [2:0]M_AXI_awsize;
|
|
output M_AXI_awvalid;
|
|
input [3:0]M_AXI_bid;
|
|
output M_AXI_bready;
|
|
input [1:0]M_AXI_bresp;
|
|
input M_AXI_bvalid;
|
|
input [63:0]M_AXI_rdata;
|
|
input [3:0]M_AXI_rid;
|
|
input M_AXI_rlast;
|
|
output M_AXI_rready;
|
|
input [1:0]M_AXI_rresp;
|
|
input M_AXI_rvalid;
|
|
output [63:0]M_AXI_wdata;
|
|
output M_AXI_wlast;
|
|
input M_AXI_wready;
|
|
output [7:0]M_AXI_wstrb;
|
|
output M_AXI_wvalid;
|
|
input S_ACLK;
|
|
input S_ARESETN;
|
|
input [63:0]S_AXI_araddr;
|
|
input [1:0]S_AXI_arburst;
|
|
input [3:0]S_AXI_arcache;
|
|
input [3:0]S_AXI_arid;
|
|
input [7:0]S_AXI_arlen;
|
|
input [0:0]S_AXI_arlock;
|
|
input [2:0]S_AXI_arprot;
|
|
input [3:0]S_AXI_arqos;
|
|
output S_AXI_arready;
|
|
input [3:0]S_AXI_arregion;
|
|
input [2:0]S_AXI_arsize;
|
|
input S_AXI_arvalid;
|
|
input [63:0]S_AXI_awaddr;
|
|
input [1:0]S_AXI_awburst;
|
|
input [3:0]S_AXI_awcache;
|
|
input [3:0]S_AXI_awid;
|
|
input [7:0]S_AXI_awlen;
|
|
input [0:0]S_AXI_awlock;
|
|
input [2:0]S_AXI_awprot;
|
|
input [3:0]S_AXI_awqos;
|
|
output S_AXI_awready;
|
|
input [3:0]S_AXI_awregion;
|
|
input [2:0]S_AXI_awsize;
|
|
input S_AXI_awvalid;
|
|
output [3:0]S_AXI_bid;
|
|
input S_AXI_bready;
|
|
output [1:0]S_AXI_bresp;
|
|
output S_AXI_bvalid;
|
|
output [63:0]S_AXI_rdata;
|
|
output [3:0]S_AXI_rid;
|
|
output S_AXI_rlast;
|
|
input S_AXI_rready;
|
|
output [1:0]S_AXI_rresp;
|
|
output S_AXI_rvalid;
|
|
input [63:0]S_AXI_wdata;
|
|
input S_AXI_wlast;
|
|
output S_AXI_wready;
|
|
input [7:0]S_AXI_wstrb;
|
|
input S_AXI_wvalid;
|
|
|
|
wire M_ACLK_1;
|
|
wire [7:0]M_ARESETN_1;
|
|
wire S_ACLK_1;
|
|
wire S_ARESETN_1;
|
|
wire [30:0]auto_cc_to_m00_couplers_ARADDR;
|
|
wire [1:0]auto_cc_to_m00_couplers_ARBURST;
|
|
wire [3:0]auto_cc_to_m00_couplers_ARCACHE;
|
|
wire [3:0]auto_cc_to_m00_couplers_ARID;
|
|
wire [7:0]auto_cc_to_m00_couplers_ARLEN;
|
|
wire [0:0]auto_cc_to_m00_couplers_ARLOCK;
|
|
wire [2:0]auto_cc_to_m00_couplers_ARPROT;
|
|
wire [3:0]auto_cc_to_m00_couplers_ARQOS;
|
|
wire auto_cc_to_m00_couplers_ARREADY;
|
|
wire [2:0]auto_cc_to_m00_couplers_ARSIZE;
|
|
wire auto_cc_to_m00_couplers_ARVALID;
|
|
wire [30:0]auto_cc_to_m00_couplers_AWADDR;
|
|
wire [1:0]auto_cc_to_m00_couplers_AWBURST;
|
|
wire [3:0]auto_cc_to_m00_couplers_AWCACHE;
|
|
wire [3:0]auto_cc_to_m00_couplers_AWID;
|
|
wire [7:0]auto_cc_to_m00_couplers_AWLEN;
|
|
wire [0:0]auto_cc_to_m00_couplers_AWLOCK;
|
|
wire [2:0]auto_cc_to_m00_couplers_AWPROT;
|
|
wire [3:0]auto_cc_to_m00_couplers_AWQOS;
|
|
wire auto_cc_to_m00_couplers_AWREADY;
|
|
wire [2:0]auto_cc_to_m00_couplers_AWSIZE;
|
|
wire auto_cc_to_m00_couplers_AWVALID;
|
|
wire [3:0]auto_cc_to_m00_couplers_BID;
|
|
wire auto_cc_to_m00_couplers_BREADY;
|
|
wire [1:0]auto_cc_to_m00_couplers_BRESP;
|
|
wire auto_cc_to_m00_couplers_BVALID;
|
|
wire [63:0]auto_cc_to_m00_couplers_RDATA;
|
|
wire [3:0]auto_cc_to_m00_couplers_RID;
|
|
wire auto_cc_to_m00_couplers_RLAST;
|
|
wire auto_cc_to_m00_couplers_RREADY;
|
|
wire [1:0]auto_cc_to_m00_couplers_RRESP;
|
|
wire auto_cc_to_m00_couplers_RVALID;
|
|
wire [63:0]auto_cc_to_m00_couplers_WDATA;
|
|
wire auto_cc_to_m00_couplers_WLAST;
|
|
wire auto_cc_to_m00_couplers_WREADY;
|
|
wire [7:0]auto_cc_to_m00_couplers_WSTRB;
|
|
wire auto_cc_to_m00_couplers_WVALID;
|
|
wire [63:0]m00_couplers_to_auto_cc_ARADDR;
|
|
wire [1:0]m00_couplers_to_auto_cc_ARBURST;
|
|
wire [3:0]m00_couplers_to_auto_cc_ARCACHE;
|
|
wire [3:0]m00_couplers_to_auto_cc_ARID;
|
|
wire [7:0]m00_couplers_to_auto_cc_ARLEN;
|
|
wire [0:0]m00_couplers_to_auto_cc_ARLOCK;
|
|
wire [2:0]m00_couplers_to_auto_cc_ARPROT;
|
|
wire [3:0]m00_couplers_to_auto_cc_ARQOS;
|
|
wire m00_couplers_to_auto_cc_ARREADY;
|
|
wire [3:0]m00_couplers_to_auto_cc_ARREGION;
|
|
wire [2:0]m00_couplers_to_auto_cc_ARSIZE;
|
|
wire m00_couplers_to_auto_cc_ARVALID;
|
|
wire [63:0]m00_couplers_to_auto_cc_AWADDR;
|
|
wire [1:0]m00_couplers_to_auto_cc_AWBURST;
|
|
wire [3:0]m00_couplers_to_auto_cc_AWCACHE;
|
|
wire [3:0]m00_couplers_to_auto_cc_AWID;
|
|
wire [7:0]m00_couplers_to_auto_cc_AWLEN;
|
|
wire [0:0]m00_couplers_to_auto_cc_AWLOCK;
|
|
wire [2:0]m00_couplers_to_auto_cc_AWPROT;
|
|
wire [3:0]m00_couplers_to_auto_cc_AWQOS;
|
|
wire m00_couplers_to_auto_cc_AWREADY;
|
|
wire [3:0]m00_couplers_to_auto_cc_AWREGION;
|
|
wire [2:0]m00_couplers_to_auto_cc_AWSIZE;
|
|
wire m00_couplers_to_auto_cc_AWVALID;
|
|
wire [3:0]m00_couplers_to_auto_cc_BID;
|
|
wire m00_couplers_to_auto_cc_BREADY;
|
|
wire [1:0]m00_couplers_to_auto_cc_BRESP;
|
|
wire m00_couplers_to_auto_cc_BVALID;
|
|
wire [63:0]m00_couplers_to_auto_cc_RDATA;
|
|
wire [3:0]m00_couplers_to_auto_cc_RID;
|
|
wire m00_couplers_to_auto_cc_RLAST;
|
|
wire m00_couplers_to_auto_cc_RREADY;
|
|
wire [1:0]m00_couplers_to_auto_cc_RRESP;
|
|
wire m00_couplers_to_auto_cc_RVALID;
|
|
wire [63:0]m00_couplers_to_auto_cc_WDATA;
|
|
wire m00_couplers_to_auto_cc_WLAST;
|
|
wire m00_couplers_to_auto_cc_WREADY;
|
|
wire [7:0]m00_couplers_to_auto_cc_WSTRB;
|
|
wire m00_couplers_to_auto_cc_WVALID;
|
|
|
|
assign M_ACLK_1 = M_ACLK;
|
|
assign M_ARESETN_1 = M_ARESETN[7:0];
|
|
assign M_AXI_araddr[30:0] = auto_cc_to_m00_couplers_ARADDR;
|
|
assign M_AXI_arburst[1:0] = auto_cc_to_m00_couplers_ARBURST;
|
|
assign M_AXI_arcache[3:0] = auto_cc_to_m00_couplers_ARCACHE;
|
|
assign M_AXI_arid[3:0] = auto_cc_to_m00_couplers_ARID;
|
|
assign M_AXI_arlen[7:0] = auto_cc_to_m00_couplers_ARLEN;
|
|
assign M_AXI_arlock = auto_cc_to_m00_couplers_ARLOCK;
|
|
assign M_AXI_arprot[2:0] = auto_cc_to_m00_couplers_ARPROT;
|
|
assign M_AXI_arqos[3:0] = auto_cc_to_m00_couplers_ARQOS;
|
|
assign M_AXI_arsize[2:0] = auto_cc_to_m00_couplers_ARSIZE;
|
|
assign M_AXI_arvalid = auto_cc_to_m00_couplers_ARVALID;
|
|
assign M_AXI_awaddr[30:0] = auto_cc_to_m00_couplers_AWADDR;
|
|
assign M_AXI_awburst[1:0] = auto_cc_to_m00_couplers_AWBURST;
|
|
assign M_AXI_awcache[3:0] = auto_cc_to_m00_couplers_AWCACHE;
|
|
assign M_AXI_awid[3:0] = auto_cc_to_m00_couplers_AWID;
|
|
assign M_AXI_awlen[7:0] = auto_cc_to_m00_couplers_AWLEN;
|
|
assign M_AXI_awlock = auto_cc_to_m00_couplers_AWLOCK;
|
|
assign M_AXI_awprot[2:0] = auto_cc_to_m00_couplers_AWPROT;
|
|
assign M_AXI_awqos[3:0] = auto_cc_to_m00_couplers_AWQOS;
|
|
assign M_AXI_awsize[2:0] = auto_cc_to_m00_couplers_AWSIZE;
|
|
assign M_AXI_awvalid = auto_cc_to_m00_couplers_AWVALID;
|
|
assign M_AXI_bready = auto_cc_to_m00_couplers_BREADY;
|
|
assign M_AXI_rready = auto_cc_to_m00_couplers_RREADY;
|
|
assign M_AXI_wdata[63:0] = auto_cc_to_m00_couplers_WDATA;
|
|
assign M_AXI_wlast = auto_cc_to_m00_couplers_WLAST;
|
|
assign M_AXI_wstrb[7:0] = auto_cc_to_m00_couplers_WSTRB;
|
|
assign M_AXI_wvalid = auto_cc_to_m00_couplers_WVALID;
|
|
assign S_ACLK_1 = S_ACLK;
|
|
assign S_ARESETN_1 = S_ARESETN;
|
|
assign S_AXI_arready = m00_couplers_to_auto_cc_ARREADY;
|
|
assign S_AXI_awready = m00_couplers_to_auto_cc_AWREADY;
|
|
assign S_AXI_bid[3:0] = m00_couplers_to_auto_cc_BID;
|
|
assign S_AXI_bresp[1:0] = m00_couplers_to_auto_cc_BRESP;
|
|
assign S_AXI_bvalid = m00_couplers_to_auto_cc_BVALID;
|
|
assign S_AXI_rdata[63:0] = m00_couplers_to_auto_cc_RDATA;
|
|
assign S_AXI_rid[3:0] = m00_couplers_to_auto_cc_RID;
|
|
assign S_AXI_rlast = m00_couplers_to_auto_cc_RLAST;
|
|
assign S_AXI_rresp[1:0] = m00_couplers_to_auto_cc_RRESP;
|
|
assign S_AXI_rvalid = m00_couplers_to_auto_cc_RVALID;
|
|
assign S_AXI_wready = m00_couplers_to_auto_cc_WREADY;
|
|
assign auto_cc_to_m00_couplers_ARREADY = M_AXI_arready;
|
|
assign auto_cc_to_m00_couplers_AWREADY = M_AXI_awready;
|
|
assign auto_cc_to_m00_couplers_BID = M_AXI_bid[3:0];
|
|
assign auto_cc_to_m00_couplers_BRESP = M_AXI_bresp[1:0];
|
|
assign auto_cc_to_m00_couplers_BVALID = M_AXI_bvalid;
|
|
assign auto_cc_to_m00_couplers_RDATA = M_AXI_rdata[63:0];
|
|
assign auto_cc_to_m00_couplers_RID = M_AXI_rid[3:0];
|
|
assign auto_cc_to_m00_couplers_RLAST = M_AXI_rlast;
|
|
assign auto_cc_to_m00_couplers_RRESP = M_AXI_rresp[1:0];
|
|
assign auto_cc_to_m00_couplers_RVALID = M_AXI_rvalid;
|
|
assign auto_cc_to_m00_couplers_WREADY = M_AXI_wready;
|
|
assign m00_couplers_to_auto_cc_ARADDR = S_AXI_araddr[63:0];
|
|
assign m00_couplers_to_auto_cc_ARBURST = S_AXI_arburst[1:0];
|
|
assign m00_couplers_to_auto_cc_ARCACHE = S_AXI_arcache[3:0];
|
|
assign m00_couplers_to_auto_cc_ARID = S_AXI_arid[3:0];
|
|
assign m00_couplers_to_auto_cc_ARLEN = S_AXI_arlen[7:0];
|
|
assign m00_couplers_to_auto_cc_ARLOCK = S_AXI_arlock[0];
|
|
assign m00_couplers_to_auto_cc_ARPROT = S_AXI_arprot[2:0];
|
|
assign m00_couplers_to_auto_cc_ARQOS = S_AXI_arqos[3:0];
|
|
assign m00_couplers_to_auto_cc_ARREGION = S_AXI_arregion[3:0];
|
|
assign m00_couplers_to_auto_cc_ARSIZE = S_AXI_arsize[2:0];
|
|
assign m00_couplers_to_auto_cc_ARVALID = S_AXI_arvalid;
|
|
assign m00_couplers_to_auto_cc_AWADDR = S_AXI_awaddr[63:0];
|
|
assign m00_couplers_to_auto_cc_AWBURST = S_AXI_awburst[1:0];
|
|
assign m00_couplers_to_auto_cc_AWCACHE = S_AXI_awcache[3:0];
|
|
assign m00_couplers_to_auto_cc_AWID = S_AXI_awid[3:0];
|
|
assign m00_couplers_to_auto_cc_AWLEN = S_AXI_awlen[7:0];
|
|
assign m00_couplers_to_auto_cc_AWLOCK = S_AXI_awlock[0];
|
|
assign m00_couplers_to_auto_cc_AWPROT = S_AXI_awprot[2:0];
|
|
assign m00_couplers_to_auto_cc_AWQOS = S_AXI_awqos[3:0];
|
|
assign m00_couplers_to_auto_cc_AWREGION = S_AXI_awregion[3:0];
|
|
assign m00_couplers_to_auto_cc_AWSIZE = S_AXI_awsize[2:0];
|
|
assign m00_couplers_to_auto_cc_AWVALID = S_AXI_awvalid;
|
|
assign m00_couplers_to_auto_cc_BREADY = S_AXI_bready;
|
|
assign m00_couplers_to_auto_cc_RREADY = S_AXI_rready;
|
|
assign m00_couplers_to_auto_cc_WDATA = S_AXI_wdata[63:0];
|
|
assign m00_couplers_to_auto_cc_WLAST = S_AXI_wlast;
|
|
assign m00_couplers_to_auto_cc_WSTRB = S_AXI_wstrb[7:0];
|
|
assign m00_couplers_to_auto_cc_WVALID = S_AXI_wvalid;
|
|
Top_auto_cc_0 auto_cc
|
|
(.m_axi_aclk(M_ACLK_1),
|
|
.m_axi_araddr(auto_cc_to_m00_couplers_ARADDR),
|
|
.m_axi_arburst(auto_cc_to_m00_couplers_ARBURST),
|
|
.m_axi_arcache(auto_cc_to_m00_couplers_ARCACHE),
|
|
.m_axi_aresetn(M_ARESETN_1[0]),
|
|
.m_axi_arid(auto_cc_to_m00_couplers_ARID),
|
|
.m_axi_arlen(auto_cc_to_m00_couplers_ARLEN),
|
|
.m_axi_arlock(auto_cc_to_m00_couplers_ARLOCK),
|
|
.m_axi_arprot(auto_cc_to_m00_couplers_ARPROT),
|
|
.m_axi_arqos(auto_cc_to_m00_couplers_ARQOS),
|
|
.m_axi_arready(auto_cc_to_m00_couplers_ARREADY),
|
|
.m_axi_arsize(auto_cc_to_m00_couplers_ARSIZE),
|
|
.m_axi_arvalid(auto_cc_to_m00_couplers_ARVALID),
|
|
.m_axi_awaddr(auto_cc_to_m00_couplers_AWADDR),
|
|
.m_axi_awburst(auto_cc_to_m00_couplers_AWBURST),
|
|
.m_axi_awcache(auto_cc_to_m00_couplers_AWCACHE),
|
|
.m_axi_awid(auto_cc_to_m00_couplers_AWID),
|
|
.m_axi_awlen(auto_cc_to_m00_couplers_AWLEN),
|
|
.m_axi_awlock(auto_cc_to_m00_couplers_AWLOCK),
|
|
.m_axi_awprot(auto_cc_to_m00_couplers_AWPROT),
|
|
.m_axi_awqos(auto_cc_to_m00_couplers_AWQOS),
|
|
.m_axi_awready(auto_cc_to_m00_couplers_AWREADY),
|
|
.m_axi_awsize(auto_cc_to_m00_couplers_AWSIZE),
|
|
.m_axi_awvalid(auto_cc_to_m00_couplers_AWVALID),
|
|
.m_axi_bid(auto_cc_to_m00_couplers_BID),
|
|
.m_axi_bready(auto_cc_to_m00_couplers_BREADY),
|
|
.m_axi_bresp(auto_cc_to_m00_couplers_BRESP),
|
|
.m_axi_bvalid(auto_cc_to_m00_couplers_BVALID),
|
|
.m_axi_rdata(auto_cc_to_m00_couplers_RDATA),
|
|
.m_axi_rid(auto_cc_to_m00_couplers_RID),
|
|
.m_axi_rlast(auto_cc_to_m00_couplers_RLAST),
|
|
.m_axi_rready(auto_cc_to_m00_couplers_RREADY),
|
|
.m_axi_rresp(auto_cc_to_m00_couplers_RRESP),
|
|
.m_axi_rvalid(auto_cc_to_m00_couplers_RVALID),
|
|
.m_axi_wdata(auto_cc_to_m00_couplers_WDATA),
|
|
.m_axi_wlast(auto_cc_to_m00_couplers_WLAST),
|
|
.m_axi_wready(auto_cc_to_m00_couplers_WREADY),
|
|
.m_axi_wstrb(auto_cc_to_m00_couplers_WSTRB),
|
|
.m_axi_wvalid(auto_cc_to_m00_couplers_WVALID),
|
|
.s_axi_aclk(S_ACLK_1),
|
|
.s_axi_araddr(m00_couplers_to_auto_cc_ARADDR[30:0]),
|
|
.s_axi_arburst(m00_couplers_to_auto_cc_ARBURST),
|
|
.s_axi_arcache(m00_couplers_to_auto_cc_ARCACHE),
|
|
.s_axi_aresetn(S_ARESETN_1),
|
|
.s_axi_arid(m00_couplers_to_auto_cc_ARID),
|
|
.s_axi_arlen(m00_couplers_to_auto_cc_ARLEN),
|
|
.s_axi_arlock(m00_couplers_to_auto_cc_ARLOCK),
|
|
.s_axi_arprot(m00_couplers_to_auto_cc_ARPROT),
|
|
.s_axi_arqos(m00_couplers_to_auto_cc_ARQOS),
|
|
.s_axi_arready(m00_couplers_to_auto_cc_ARREADY),
|
|
.s_axi_arregion(m00_couplers_to_auto_cc_ARREGION),
|
|
.s_axi_arsize(m00_couplers_to_auto_cc_ARSIZE),
|
|
.s_axi_arvalid(m00_couplers_to_auto_cc_ARVALID),
|
|
.s_axi_awaddr(m00_couplers_to_auto_cc_AWADDR[30:0]),
|
|
.s_axi_awburst(m00_couplers_to_auto_cc_AWBURST),
|
|
.s_axi_awcache(m00_couplers_to_auto_cc_AWCACHE),
|
|
.s_axi_awid(m00_couplers_to_auto_cc_AWID),
|
|
.s_axi_awlen(m00_couplers_to_auto_cc_AWLEN),
|
|
.s_axi_awlock(m00_couplers_to_auto_cc_AWLOCK),
|
|
.s_axi_awprot(m00_couplers_to_auto_cc_AWPROT),
|
|
.s_axi_awqos(m00_couplers_to_auto_cc_AWQOS),
|
|
.s_axi_awready(m00_couplers_to_auto_cc_AWREADY),
|
|
.s_axi_awregion(m00_couplers_to_auto_cc_AWREGION),
|
|
.s_axi_awsize(m00_couplers_to_auto_cc_AWSIZE),
|
|
.s_axi_awvalid(m00_couplers_to_auto_cc_AWVALID),
|
|
.s_axi_bid(m00_couplers_to_auto_cc_BID),
|
|
.s_axi_bready(m00_couplers_to_auto_cc_BREADY),
|
|
.s_axi_bresp(m00_couplers_to_auto_cc_BRESP),
|
|
.s_axi_bvalid(m00_couplers_to_auto_cc_BVALID),
|
|
.s_axi_rdata(m00_couplers_to_auto_cc_RDATA),
|
|
.s_axi_rid(m00_couplers_to_auto_cc_RID),
|
|
.s_axi_rlast(m00_couplers_to_auto_cc_RLAST),
|
|
.s_axi_rready(m00_couplers_to_auto_cc_RREADY),
|
|
.s_axi_rresp(m00_couplers_to_auto_cc_RRESP),
|
|
.s_axi_rvalid(m00_couplers_to_auto_cc_RVALID),
|
|
.s_axi_wdata(m00_couplers_to_auto_cc_WDATA),
|
|
.s_axi_wlast(m00_couplers_to_auto_cc_WLAST),
|
|
.s_axi_wready(m00_couplers_to_auto_cc_WREADY),
|
|
.s_axi_wstrb(m00_couplers_to_auto_cc_WSTRB),
|
|
.s_axi_wvalid(m00_couplers_to_auto_cc_WVALID));
|
|
endmodule
|
|
|
|
module m01_couplers_imp_16V7BMJ
|
|
(M_ACLK,
|
|
M_ARESETN,
|
|
M_AXI_araddr,
|
|
M_AXI_arburst,
|
|
M_AXI_arcache,
|
|
M_AXI_arid,
|
|
M_AXI_arlen,
|
|
M_AXI_arlock,
|
|
M_AXI_arprot,
|
|
M_AXI_arqos,
|
|
M_AXI_arready,
|
|
M_AXI_arsize,
|
|
M_AXI_arvalid,
|
|
M_AXI_awaddr,
|
|
M_AXI_awburst,
|
|
M_AXI_awcache,
|
|
M_AXI_awid,
|
|
M_AXI_awlen,
|
|
M_AXI_awlock,
|
|
M_AXI_awprot,
|
|
M_AXI_awqos,
|
|
M_AXI_awready,
|
|
M_AXI_awsize,
|
|
M_AXI_awvalid,
|
|
M_AXI_bid,
|
|
M_AXI_bready,
|
|
M_AXI_bresp,
|
|
M_AXI_bvalid,
|
|
M_AXI_rdata,
|
|
M_AXI_rid,
|
|
M_AXI_rlast,
|
|
M_AXI_rready,
|
|
M_AXI_rresp,
|
|
M_AXI_rvalid,
|
|
M_AXI_wdata,
|
|
M_AXI_wlast,
|
|
M_AXI_wready,
|
|
M_AXI_wstrb,
|
|
M_AXI_wvalid,
|
|
S_ACLK,
|
|
S_ARESETN,
|
|
S_AXI_araddr,
|
|
S_AXI_arburst,
|
|
S_AXI_arcache,
|
|
S_AXI_arid,
|
|
S_AXI_arlen,
|
|
S_AXI_arlock,
|
|
S_AXI_arprot,
|
|
S_AXI_arqos,
|
|
S_AXI_arready,
|
|
S_AXI_arregion,
|
|
S_AXI_arsize,
|
|
S_AXI_arvalid,
|
|
S_AXI_awaddr,
|
|
S_AXI_awburst,
|
|
S_AXI_awcache,
|
|
S_AXI_awid,
|
|
S_AXI_awlen,
|
|
S_AXI_awlock,
|
|
S_AXI_awprot,
|
|
S_AXI_awqos,
|
|
S_AXI_awready,
|
|
S_AXI_awregion,
|
|
S_AXI_awsize,
|
|
S_AXI_awvalid,
|
|
S_AXI_bid,
|
|
S_AXI_bready,
|
|
S_AXI_bresp,
|
|
S_AXI_bvalid,
|
|
S_AXI_rdata,
|
|
S_AXI_rid,
|
|
S_AXI_rlast,
|
|
S_AXI_rready,
|
|
S_AXI_rresp,
|
|
S_AXI_rvalid,
|
|
S_AXI_wdata,
|
|
S_AXI_wlast,
|
|
S_AXI_wready,
|
|
S_AXI_wstrb,
|
|
S_AXI_wvalid);
|
|
input M_ACLK;
|
|
input [7:0]M_ARESETN;
|
|
output [30:0]M_AXI_araddr;
|
|
output [1:0]M_AXI_arburst;
|
|
output [3:0]M_AXI_arcache;
|
|
output [3:0]M_AXI_arid;
|
|
output [7:0]M_AXI_arlen;
|
|
output M_AXI_arlock;
|
|
output [2:0]M_AXI_arprot;
|
|
output [3:0]M_AXI_arqos;
|
|
input M_AXI_arready;
|
|
output [2:0]M_AXI_arsize;
|
|
output M_AXI_arvalid;
|
|
output [30:0]M_AXI_awaddr;
|
|
output [1:0]M_AXI_awburst;
|
|
output [3:0]M_AXI_awcache;
|
|
output [3:0]M_AXI_awid;
|
|
output [7:0]M_AXI_awlen;
|
|
output M_AXI_awlock;
|
|
output [2:0]M_AXI_awprot;
|
|
output [3:0]M_AXI_awqos;
|
|
input M_AXI_awready;
|
|
output [2:0]M_AXI_awsize;
|
|
output M_AXI_awvalid;
|
|
input [3:0]M_AXI_bid;
|
|
output M_AXI_bready;
|
|
input [1:0]M_AXI_bresp;
|
|
input M_AXI_bvalid;
|
|
input [63:0]M_AXI_rdata;
|
|
input [3:0]M_AXI_rid;
|
|
input M_AXI_rlast;
|
|
output M_AXI_rready;
|
|
input [1:0]M_AXI_rresp;
|
|
input M_AXI_rvalid;
|
|
output [63:0]M_AXI_wdata;
|
|
output M_AXI_wlast;
|
|
input M_AXI_wready;
|
|
output [7:0]M_AXI_wstrb;
|
|
output M_AXI_wvalid;
|
|
input S_ACLK;
|
|
input S_ARESETN;
|
|
input [63:0]S_AXI_araddr;
|
|
input [1:0]S_AXI_arburst;
|
|
input [3:0]S_AXI_arcache;
|
|
input [3:0]S_AXI_arid;
|
|
input [7:0]S_AXI_arlen;
|
|
input [0:0]S_AXI_arlock;
|
|
input [2:0]S_AXI_arprot;
|
|
input [3:0]S_AXI_arqos;
|
|
output S_AXI_arready;
|
|
input [3:0]S_AXI_arregion;
|
|
input [2:0]S_AXI_arsize;
|
|
input S_AXI_arvalid;
|
|
input [63:0]S_AXI_awaddr;
|
|
input [1:0]S_AXI_awburst;
|
|
input [3:0]S_AXI_awcache;
|
|
input [3:0]S_AXI_awid;
|
|
input [7:0]S_AXI_awlen;
|
|
input [0:0]S_AXI_awlock;
|
|
input [2:0]S_AXI_awprot;
|
|
input [3:0]S_AXI_awqos;
|
|
output S_AXI_awready;
|
|
input [3:0]S_AXI_awregion;
|
|
input [2:0]S_AXI_awsize;
|
|
input S_AXI_awvalid;
|
|
output [3:0]S_AXI_bid;
|
|
input S_AXI_bready;
|
|
output [1:0]S_AXI_bresp;
|
|
output S_AXI_bvalid;
|
|
output [63:0]S_AXI_rdata;
|
|
output [3:0]S_AXI_rid;
|
|
output S_AXI_rlast;
|
|
input S_AXI_rready;
|
|
output [1:0]S_AXI_rresp;
|
|
output S_AXI_rvalid;
|
|
input [63:0]S_AXI_wdata;
|
|
input S_AXI_wlast;
|
|
output S_AXI_wready;
|
|
input [7:0]S_AXI_wstrb;
|
|
input S_AXI_wvalid;
|
|
|
|
wire M_ACLK_1;
|
|
wire [7:0]M_ARESETN_1;
|
|
wire S_ACLK_1;
|
|
wire S_ARESETN_1;
|
|
wire [30:0]auto_cc_to_m01_couplers_ARADDR;
|
|
wire [1:0]auto_cc_to_m01_couplers_ARBURST;
|
|
wire [3:0]auto_cc_to_m01_couplers_ARCACHE;
|
|
wire [3:0]auto_cc_to_m01_couplers_ARID;
|
|
wire [7:0]auto_cc_to_m01_couplers_ARLEN;
|
|
wire [0:0]auto_cc_to_m01_couplers_ARLOCK;
|
|
wire [2:0]auto_cc_to_m01_couplers_ARPROT;
|
|
wire [3:0]auto_cc_to_m01_couplers_ARQOS;
|
|
wire auto_cc_to_m01_couplers_ARREADY;
|
|
wire [2:0]auto_cc_to_m01_couplers_ARSIZE;
|
|
wire auto_cc_to_m01_couplers_ARVALID;
|
|
wire [30:0]auto_cc_to_m01_couplers_AWADDR;
|
|
wire [1:0]auto_cc_to_m01_couplers_AWBURST;
|
|
wire [3:0]auto_cc_to_m01_couplers_AWCACHE;
|
|
wire [3:0]auto_cc_to_m01_couplers_AWID;
|
|
wire [7:0]auto_cc_to_m01_couplers_AWLEN;
|
|
wire [0:0]auto_cc_to_m01_couplers_AWLOCK;
|
|
wire [2:0]auto_cc_to_m01_couplers_AWPROT;
|
|
wire [3:0]auto_cc_to_m01_couplers_AWQOS;
|
|
wire auto_cc_to_m01_couplers_AWREADY;
|
|
wire [2:0]auto_cc_to_m01_couplers_AWSIZE;
|
|
wire auto_cc_to_m01_couplers_AWVALID;
|
|
wire [3:0]auto_cc_to_m01_couplers_BID;
|
|
wire auto_cc_to_m01_couplers_BREADY;
|
|
wire [1:0]auto_cc_to_m01_couplers_BRESP;
|
|
wire auto_cc_to_m01_couplers_BVALID;
|
|
wire [63:0]auto_cc_to_m01_couplers_RDATA;
|
|
wire [3:0]auto_cc_to_m01_couplers_RID;
|
|
wire auto_cc_to_m01_couplers_RLAST;
|
|
wire auto_cc_to_m01_couplers_RREADY;
|
|
wire [1:0]auto_cc_to_m01_couplers_RRESP;
|
|
wire auto_cc_to_m01_couplers_RVALID;
|
|
wire [63:0]auto_cc_to_m01_couplers_WDATA;
|
|
wire auto_cc_to_m01_couplers_WLAST;
|
|
wire auto_cc_to_m01_couplers_WREADY;
|
|
wire [7:0]auto_cc_to_m01_couplers_WSTRB;
|
|
wire auto_cc_to_m01_couplers_WVALID;
|
|
wire [63:0]m01_couplers_to_auto_cc_ARADDR;
|
|
wire [1:0]m01_couplers_to_auto_cc_ARBURST;
|
|
wire [3:0]m01_couplers_to_auto_cc_ARCACHE;
|
|
wire [3:0]m01_couplers_to_auto_cc_ARID;
|
|
wire [7:0]m01_couplers_to_auto_cc_ARLEN;
|
|
wire [0:0]m01_couplers_to_auto_cc_ARLOCK;
|
|
wire [2:0]m01_couplers_to_auto_cc_ARPROT;
|
|
wire [3:0]m01_couplers_to_auto_cc_ARQOS;
|
|
wire m01_couplers_to_auto_cc_ARREADY;
|
|
wire [3:0]m01_couplers_to_auto_cc_ARREGION;
|
|
wire [2:0]m01_couplers_to_auto_cc_ARSIZE;
|
|
wire m01_couplers_to_auto_cc_ARVALID;
|
|
wire [63:0]m01_couplers_to_auto_cc_AWADDR;
|
|
wire [1:0]m01_couplers_to_auto_cc_AWBURST;
|
|
wire [3:0]m01_couplers_to_auto_cc_AWCACHE;
|
|
wire [3:0]m01_couplers_to_auto_cc_AWID;
|
|
wire [7:0]m01_couplers_to_auto_cc_AWLEN;
|
|
wire [0:0]m01_couplers_to_auto_cc_AWLOCK;
|
|
wire [2:0]m01_couplers_to_auto_cc_AWPROT;
|
|
wire [3:0]m01_couplers_to_auto_cc_AWQOS;
|
|
wire m01_couplers_to_auto_cc_AWREADY;
|
|
wire [3:0]m01_couplers_to_auto_cc_AWREGION;
|
|
wire [2:0]m01_couplers_to_auto_cc_AWSIZE;
|
|
wire m01_couplers_to_auto_cc_AWVALID;
|
|
wire [3:0]m01_couplers_to_auto_cc_BID;
|
|
wire m01_couplers_to_auto_cc_BREADY;
|
|
wire [1:0]m01_couplers_to_auto_cc_BRESP;
|
|
wire m01_couplers_to_auto_cc_BVALID;
|
|
wire [63:0]m01_couplers_to_auto_cc_RDATA;
|
|
wire [3:0]m01_couplers_to_auto_cc_RID;
|
|
wire m01_couplers_to_auto_cc_RLAST;
|
|
wire m01_couplers_to_auto_cc_RREADY;
|
|
wire [1:0]m01_couplers_to_auto_cc_RRESP;
|
|
wire m01_couplers_to_auto_cc_RVALID;
|
|
wire [63:0]m01_couplers_to_auto_cc_WDATA;
|
|
wire m01_couplers_to_auto_cc_WLAST;
|
|
wire m01_couplers_to_auto_cc_WREADY;
|
|
wire [7:0]m01_couplers_to_auto_cc_WSTRB;
|
|
wire m01_couplers_to_auto_cc_WVALID;
|
|
|
|
assign M_ACLK_1 = M_ACLK;
|
|
assign M_ARESETN_1 = M_ARESETN[7:0];
|
|
assign M_AXI_araddr[30:0] = auto_cc_to_m01_couplers_ARADDR;
|
|
assign M_AXI_arburst[1:0] = auto_cc_to_m01_couplers_ARBURST;
|
|
assign M_AXI_arcache[3:0] = auto_cc_to_m01_couplers_ARCACHE;
|
|
assign M_AXI_arid[3:0] = auto_cc_to_m01_couplers_ARID;
|
|
assign M_AXI_arlen[7:0] = auto_cc_to_m01_couplers_ARLEN;
|
|
assign M_AXI_arlock = auto_cc_to_m01_couplers_ARLOCK;
|
|
assign M_AXI_arprot[2:0] = auto_cc_to_m01_couplers_ARPROT;
|
|
assign M_AXI_arqos[3:0] = auto_cc_to_m01_couplers_ARQOS;
|
|
assign M_AXI_arsize[2:0] = auto_cc_to_m01_couplers_ARSIZE;
|
|
assign M_AXI_arvalid = auto_cc_to_m01_couplers_ARVALID;
|
|
assign M_AXI_awaddr[30:0] = auto_cc_to_m01_couplers_AWADDR;
|
|
assign M_AXI_awburst[1:0] = auto_cc_to_m01_couplers_AWBURST;
|
|
assign M_AXI_awcache[3:0] = auto_cc_to_m01_couplers_AWCACHE;
|
|
assign M_AXI_awid[3:0] = auto_cc_to_m01_couplers_AWID;
|
|
assign M_AXI_awlen[7:0] = auto_cc_to_m01_couplers_AWLEN;
|
|
assign M_AXI_awlock = auto_cc_to_m01_couplers_AWLOCK;
|
|
assign M_AXI_awprot[2:0] = auto_cc_to_m01_couplers_AWPROT;
|
|
assign M_AXI_awqos[3:0] = auto_cc_to_m01_couplers_AWQOS;
|
|
assign M_AXI_awsize[2:0] = auto_cc_to_m01_couplers_AWSIZE;
|
|
assign M_AXI_awvalid = auto_cc_to_m01_couplers_AWVALID;
|
|
assign M_AXI_bready = auto_cc_to_m01_couplers_BREADY;
|
|
assign M_AXI_rready = auto_cc_to_m01_couplers_RREADY;
|
|
assign M_AXI_wdata[63:0] = auto_cc_to_m01_couplers_WDATA;
|
|
assign M_AXI_wlast = auto_cc_to_m01_couplers_WLAST;
|
|
assign M_AXI_wstrb[7:0] = auto_cc_to_m01_couplers_WSTRB;
|
|
assign M_AXI_wvalid = auto_cc_to_m01_couplers_WVALID;
|
|
assign S_ACLK_1 = S_ACLK;
|
|
assign S_ARESETN_1 = S_ARESETN;
|
|
assign S_AXI_arready = m01_couplers_to_auto_cc_ARREADY;
|
|
assign S_AXI_awready = m01_couplers_to_auto_cc_AWREADY;
|
|
assign S_AXI_bid[3:0] = m01_couplers_to_auto_cc_BID;
|
|
assign S_AXI_bresp[1:0] = m01_couplers_to_auto_cc_BRESP;
|
|
assign S_AXI_bvalid = m01_couplers_to_auto_cc_BVALID;
|
|
assign S_AXI_rdata[63:0] = m01_couplers_to_auto_cc_RDATA;
|
|
assign S_AXI_rid[3:0] = m01_couplers_to_auto_cc_RID;
|
|
assign S_AXI_rlast = m01_couplers_to_auto_cc_RLAST;
|
|
assign S_AXI_rresp[1:0] = m01_couplers_to_auto_cc_RRESP;
|
|
assign S_AXI_rvalid = m01_couplers_to_auto_cc_RVALID;
|
|
assign S_AXI_wready = m01_couplers_to_auto_cc_WREADY;
|
|
assign auto_cc_to_m01_couplers_ARREADY = M_AXI_arready;
|
|
assign auto_cc_to_m01_couplers_AWREADY = M_AXI_awready;
|
|
assign auto_cc_to_m01_couplers_BID = M_AXI_bid[3:0];
|
|
assign auto_cc_to_m01_couplers_BRESP = M_AXI_bresp[1:0];
|
|
assign auto_cc_to_m01_couplers_BVALID = M_AXI_bvalid;
|
|
assign auto_cc_to_m01_couplers_RDATA = M_AXI_rdata[63:0];
|
|
assign auto_cc_to_m01_couplers_RID = M_AXI_rid[3:0];
|
|
assign auto_cc_to_m01_couplers_RLAST = M_AXI_rlast;
|
|
assign auto_cc_to_m01_couplers_RRESP = M_AXI_rresp[1:0];
|
|
assign auto_cc_to_m01_couplers_RVALID = M_AXI_rvalid;
|
|
assign auto_cc_to_m01_couplers_WREADY = M_AXI_wready;
|
|
assign m01_couplers_to_auto_cc_ARADDR = S_AXI_araddr[63:0];
|
|
assign m01_couplers_to_auto_cc_ARBURST = S_AXI_arburst[1:0];
|
|
assign m01_couplers_to_auto_cc_ARCACHE = S_AXI_arcache[3:0];
|
|
assign m01_couplers_to_auto_cc_ARID = S_AXI_arid[3:0];
|
|
assign m01_couplers_to_auto_cc_ARLEN = S_AXI_arlen[7:0];
|
|
assign m01_couplers_to_auto_cc_ARLOCK = S_AXI_arlock[0];
|
|
assign m01_couplers_to_auto_cc_ARPROT = S_AXI_arprot[2:0];
|
|
assign m01_couplers_to_auto_cc_ARQOS = S_AXI_arqos[3:0];
|
|
assign m01_couplers_to_auto_cc_ARREGION = S_AXI_arregion[3:0];
|
|
assign m01_couplers_to_auto_cc_ARSIZE = S_AXI_arsize[2:0];
|
|
assign m01_couplers_to_auto_cc_ARVALID = S_AXI_arvalid;
|
|
assign m01_couplers_to_auto_cc_AWADDR = S_AXI_awaddr[63:0];
|
|
assign m01_couplers_to_auto_cc_AWBURST = S_AXI_awburst[1:0];
|
|
assign m01_couplers_to_auto_cc_AWCACHE = S_AXI_awcache[3:0];
|
|
assign m01_couplers_to_auto_cc_AWID = S_AXI_awid[3:0];
|
|
assign m01_couplers_to_auto_cc_AWLEN = S_AXI_awlen[7:0];
|
|
assign m01_couplers_to_auto_cc_AWLOCK = S_AXI_awlock[0];
|
|
assign m01_couplers_to_auto_cc_AWPROT = S_AXI_awprot[2:0];
|
|
assign m01_couplers_to_auto_cc_AWQOS = S_AXI_awqos[3:0];
|
|
assign m01_couplers_to_auto_cc_AWREGION = S_AXI_awregion[3:0];
|
|
assign m01_couplers_to_auto_cc_AWSIZE = S_AXI_awsize[2:0];
|
|
assign m01_couplers_to_auto_cc_AWVALID = S_AXI_awvalid;
|
|
assign m01_couplers_to_auto_cc_BREADY = S_AXI_bready;
|
|
assign m01_couplers_to_auto_cc_RREADY = S_AXI_rready;
|
|
assign m01_couplers_to_auto_cc_WDATA = S_AXI_wdata[63:0];
|
|
assign m01_couplers_to_auto_cc_WLAST = S_AXI_wlast;
|
|
assign m01_couplers_to_auto_cc_WSTRB = S_AXI_wstrb[7:0];
|
|
assign m01_couplers_to_auto_cc_WVALID = S_AXI_wvalid;
|
|
Top_auto_cc_1 auto_cc
|
|
(.m_axi_aclk(M_ACLK_1),
|
|
.m_axi_araddr(auto_cc_to_m01_couplers_ARADDR),
|
|
.m_axi_arburst(auto_cc_to_m01_couplers_ARBURST),
|
|
.m_axi_arcache(auto_cc_to_m01_couplers_ARCACHE),
|
|
.m_axi_aresetn(M_ARESETN_1[0]),
|
|
.m_axi_arid(auto_cc_to_m01_couplers_ARID),
|
|
.m_axi_arlen(auto_cc_to_m01_couplers_ARLEN),
|
|
.m_axi_arlock(auto_cc_to_m01_couplers_ARLOCK),
|
|
.m_axi_arprot(auto_cc_to_m01_couplers_ARPROT),
|
|
.m_axi_arqos(auto_cc_to_m01_couplers_ARQOS),
|
|
.m_axi_arready(auto_cc_to_m01_couplers_ARREADY),
|
|
.m_axi_arsize(auto_cc_to_m01_couplers_ARSIZE),
|
|
.m_axi_arvalid(auto_cc_to_m01_couplers_ARVALID),
|
|
.m_axi_awaddr(auto_cc_to_m01_couplers_AWADDR),
|
|
.m_axi_awburst(auto_cc_to_m01_couplers_AWBURST),
|
|
.m_axi_awcache(auto_cc_to_m01_couplers_AWCACHE),
|
|
.m_axi_awid(auto_cc_to_m01_couplers_AWID),
|
|
.m_axi_awlen(auto_cc_to_m01_couplers_AWLEN),
|
|
.m_axi_awlock(auto_cc_to_m01_couplers_AWLOCK),
|
|
.m_axi_awprot(auto_cc_to_m01_couplers_AWPROT),
|
|
.m_axi_awqos(auto_cc_to_m01_couplers_AWQOS),
|
|
.m_axi_awready(auto_cc_to_m01_couplers_AWREADY),
|
|
.m_axi_awsize(auto_cc_to_m01_couplers_AWSIZE),
|
|
.m_axi_awvalid(auto_cc_to_m01_couplers_AWVALID),
|
|
.m_axi_bid(auto_cc_to_m01_couplers_BID),
|
|
.m_axi_bready(auto_cc_to_m01_couplers_BREADY),
|
|
.m_axi_bresp(auto_cc_to_m01_couplers_BRESP),
|
|
.m_axi_bvalid(auto_cc_to_m01_couplers_BVALID),
|
|
.m_axi_rdata(auto_cc_to_m01_couplers_RDATA),
|
|
.m_axi_rid(auto_cc_to_m01_couplers_RID),
|
|
.m_axi_rlast(auto_cc_to_m01_couplers_RLAST),
|
|
.m_axi_rready(auto_cc_to_m01_couplers_RREADY),
|
|
.m_axi_rresp(auto_cc_to_m01_couplers_RRESP),
|
|
.m_axi_rvalid(auto_cc_to_m01_couplers_RVALID),
|
|
.m_axi_wdata(auto_cc_to_m01_couplers_WDATA),
|
|
.m_axi_wlast(auto_cc_to_m01_couplers_WLAST),
|
|
.m_axi_wready(auto_cc_to_m01_couplers_WREADY),
|
|
.m_axi_wstrb(auto_cc_to_m01_couplers_WSTRB),
|
|
.m_axi_wvalid(auto_cc_to_m01_couplers_WVALID),
|
|
.s_axi_aclk(S_ACLK_1),
|
|
.s_axi_araddr(m01_couplers_to_auto_cc_ARADDR[30:0]),
|
|
.s_axi_arburst(m01_couplers_to_auto_cc_ARBURST),
|
|
.s_axi_arcache(m01_couplers_to_auto_cc_ARCACHE),
|
|
.s_axi_aresetn(S_ARESETN_1),
|
|
.s_axi_arid(m01_couplers_to_auto_cc_ARID),
|
|
.s_axi_arlen(m01_couplers_to_auto_cc_ARLEN),
|
|
.s_axi_arlock(m01_couplers_to_auto_cc_ARLOCK),
|
|
.s_axi_arprot(m01_couplers_to_auto_cc_ARPROT),
|
|
.s_axi_arqos(m01_couplers_to_auto_cc_ARQOS),
|
|
.s_axi_arready(m01_couplers_to_auto_cc_ARREADY),
|
|
.s_axi_arregion(m01_couplers_to_auto_cc_ARREGION),
|
|
.s_axi_arsize(m01_couplers_to_auto_cc_ARSIZE),
|
|
.s_axi_arvalid(m01_couplers_to_auto_cc_ARVALID),
|
|
.s_axi_awaddr(m01_couplers_to_auto_cc_AWADDR[30:0]),
|
|
.s_axi_awburst(m01_couplers_to_auto_cc_AWBURST),
|
|
.s_axi_awcache(m01_couplers_to_auto_cc_AWCACHE),
|
|
.s_axi_awid(m01_couplers_to_auto_cc_AWID),
|
|
.s_axi_awlen(m01_couplers_to_auto_cc_AWLEN),
|
|
.s_axi_awlock(m01_couplers_to_auto_cc_AWLOCK),
|
|
.s_axi_awprot(m01_couplers_to_auto_cc_AWPROT),
|
|
.s_axi_awqos(m01_couplers_to_auto_cc_AWQOS),
|
|
.s_axi_awready(m01_couplers_to_auto_cc_AWREADY),
|
|
.s_axi_awregion(m01_couplers_to_auto_cc_AWREGION),
|
|
.s_axi_awsize(m01_couplers_to_auto_cc_AWSIZE),
|
|
.s_axi_awvalid(m01_couplers_to_auto_cc_AWVALID),
|
|
.s_axi_bid(m01_couplers_to_auto_cc_BID),
|
|
.s_axi_bready(m01_couplers_to_auto_cc_BREADY),
|
|
.s_axi_bresp(m01_couplers_to_auto_cc_BRESP),
|
|
.s_axi_bvalid(m01_couplers_to_auto_cc_BVALID),
|
|
.s_axi_rdata(m01_couplers_to_auto_cc_RDATA),
|
|
.s_axi_rid(m01_couplers_to_auto_cc_RID),
|
|
.s_axi_rlast(m01_couplers_to_auto_cc_RLAST),
|
|
.s_axi_rready(m01_couplers_to_auto_cc_RREADY),
|
|
.s_axi_rresp(m01_couplers_to_auto_cc_RRESP),
|
|
.s_axi_rvalid(m01_couplers_to_auto_cc_RVALID),
|
|
.s_axi_wdata(m01_couplers_to_auto_cc_WDATA),
|
|
.s_axi_wlast(m01_couplers_to_auto_cc_WLAST),
|
|
.s_axi_wready(m01_couplers_to_auto_cc_WREADY),
|
|
.s_axi_wstrb(m01_couplers_to_auto_cc_WSTRB),
|
|
.s_axi_wvalid(m01_couplers_to_auto_cc_WVALID));
|
|
endmodule
|
|
|
|
module m02_couplers_imp_B0MBTH
|
|
(M_ACLK,
|
|
M_ARESETN,
|
|
M_AXI_araddr,
|
|
M_AXI_arburst,
|
|
M_AXI_arcache,
|
|
M_AXI_arid,
|
|
M_AXI_arlen,
|
|
M_AXI_arlock,
|
|
M_AXI_arprot,
|
|
M_AXI_arready,
|
|
M_AXI_arsize,
|
|
M_AXI_arvalid,
|
|
M_AXI_awaddr,
|
|
M_AXI_awburst,
|
|
M_AXI_awcache,
|
|
M_AXI_awid,
|
|
M_AXI_awlen,
|
|
M_AXI_awlock,
|
|
M_AXI_awprot,
|
|
M_AXI_awready,
|
|
M_AXI_awsize,
|
|
M_AXI_awvalid,
|
|
M_AXI_bid,
|
|
M_AXI_bready,
|
|
M_AXI_bresp,
|
|
M_AXI_bvalid,
|
|
M_AXI_rdata,
|
|
M_AXI_rid,
|
|
M_AXI_rlast,
|
|
M_AXI_rready,
|
|
M_AXI_rresp,
|
|
M_AXI_rvalid,
|
|
M_AXI_wdata,
|
|
M_AXI_wlast,
|
|
M_AXI_wready,
|
|
M_AXI_wstrb,
|
|
M_AXI_wvalid,
|
|
S_ACLK,
|
|
S_ARESETN,
|
|
S_AXI_araddr,
|
|
S_AXI_arburst,
|
|
S_AXI_arcache,
|
|
S_AXI_arid,
|
|
S_AXI_arlen,
|
|
S_AXI_arlock,
|
|
S_AXI_arprot,
|
|
S_AXI_arready,
|
|
S_AXI_arsize,
|
|
S_AXI_arvalid,
|
|
S_AXI_awaddr,
|
|
S_AXI_awburst,
|
|
S_AXI_awcache,
|
|
S_AXI_awid,
|
|
S_AXI_awlen,
|
|
S_AXI_awlock,
|
|
S_AXI_awprot,
|
|
S_AXI_awready,
|
|
S_AXI_awsize,
|
|
S_AXI_awvalid,
|
|
S_AXI_bid,
|
|
S_AXI_bready,
|
|
S_AXI_bresp,
|
|
S_AXI_bvalid,
|
|
S_AXI_rdata,
|
|
S_AXI_rid,
|
|
S_AXI_rlast,
|
|
S_AXI_rready,
|
|
S_AXI_rresp,
|
|
S_AXI_rvalid,
|
|
S_AXI_wdata,
|
|
S_AXI_wlast,
|
|
S_AXI_wready,
|
|
S_AXI_wstrb,
|
|
S_AXI_wvalid);
|
|
input M_ACLK;
|
|
input M_ARESETN;
|
|
output [63:0]M_AXI_araddr;
|
|
output [1:0]M_AXI_arburst;
|
|
output [3:0]M_AXI_arcache;
|
|
output [3:0]M_AXI_arid;
|
|
output [7:0]M_AXI_arlen;
|
|
output M_AXI_arlock;
|
|
output [2:0]M_AXI_arprot;
|
|
input M_AXI_arready;
|
|
output [2:0]M_AXI_arsize;
|
|
output M_AXI_arvalid;
|
|
output [63:0]M_AXI_awaddr;
|
|
output [1:0]M_AXI_awburst;
|
|
output [3:0]M_AXI_awcache;
|
|
output [3:0]M_AXI_awid;
|
|
output [7:0]M_AXI_awlen;
|
|
output M_AXI_awlock;
|
|
output [2:0]M_AXI_awprot;
|
|
input M_AXI_awready;
|
|
output [2:0]M_AXI_awsize;
|
|
output M_AXI_awvalid;
|
|
input [3:0]M_AXI_bid;
|
|
output M_AXI_bready;
|
|
input [1:0]M_AXI_bresp;
|
|
input M_AXI_bvalid;
|
|
input [63:0]M_AXI_rdata;
|
|
input [3:0]M_AXI_rid;
|
|
input M_AXI_rlast;
|
|
output M_AXI_rready;
|
|
input [1:0]M_AXI_rresp;
|
|
input M_AXI_rvalid;
|
|
output [63:0]M_AXI_wdata;
|
|
output M_AXI_wlast;
|
|
input M_AXI_wready;
|
|
output [7:0]M_AXI_wstrb;
|
|
output M_AXI_wvalid;
|
|
input S_ACLK;
|
|
input S_ARESETN;
|
|
input [63:0]S_AXI_araddr;
|
|
input [1:0]S_AXI_arburst;
|
|
input [3:0]S_AXI_arcache;
|
|
input [3:0]S_AXI_arid;
|
|
input [7:0]S_AXI_arlen;
|
|
input S_AXI_arlock;
|
|
input [2:0]S_AXI_arprot;
|
|
output S_AXI_arready;
|
|
input [2:0]S_AXI_arsize;
|
|
input S_AXI_arvalid;
|
|
input [63:0]S_AXI_awaddr;
|
|
input [1:0]S_AXI_awburst;
|
|
input [3:0]S_AXI_awcache;
|
|
input [3:0]S_AXI_awid;
|
|
input [7:0]S_AXI_awlen;
|
|
input S_AXI_awlock;
|
|
input [2:0]S_AXI_awprot;
|
|
output S_AXI_awready;
|
|
input [2:0]S_AXI_awsize;
|
|
input S_AXI_awvalid;
|
|
output [3:0]S_AXI_bid;
|
|
input S_AXI_bready;
|
|
output [1:0]S_AXI_bresp;
|
|
output S_AXI_bvalid;
|
|
output [63:0]S_AXI_rdata;
|
|
output [3:0]S_AXI_rid;
|
|
output S_AXI_rlast;
|
|
input S_AXI_rready;
|
|
output [1:0]S_AXI_rresp;
|
|
output S_AXI_rvalid;
|
|
input [63:0]S_AXI_wdata;
|
|
input S_AXI_wlast;
|
|
output S_AXI_wready;
|
|
input [7:0]S_AXI_wstrb;
|
|
input S_AXI_wvalid;
|
|
|
|
wire [63:0]m02_couplers_to_m02_couplers_ARADDR;
|
|
wire [1:0]m02_couplers_to_m02_couplers_ARBURST;
|
|
wire [3:0]m02_couplers_to_m02_couplers_ARCACHE;
|
|
wire [3:0]m02_couplers_to_m02_couplers_ARID;
|
|
wire [7:0]m02_couplers_to_m02_couplers_ARLEN;
|
|
wire m02_couplers_to_m02_couplers_ARLOCK;
|
|
wire [2:0]m02_couplers_to_m02_couplers_ARPROT;
|
|
wire m02_couplers_to_m02_couplers_ARREADY;
|
|
wire [2:0]m02_couplers_to_m02_couplers_ARSIZE;
|
|
wire m02_couplers_to_m02_couplers_ARVALID;
|
|
wire [63:0]m02_couplers_to_m02_couplers_AWADDR;
|
|
wire [1:0]m02_couplers_to_m02_couplers_AWBURST;
|
|
wire [3:0]m02_couplers_to_m02_couplers_AWCACHE;
|
|
wire [3:0]m02_couplers_to_m02_couplers_AWID;
|
|
wire [7:0]m02_couplers_to_m02_couplers_AWLEN;
|
|
wire m02_couplers_to_m02_couplers_AWLOCK;
|
|
wire [2:0]m02_couplers_to_m02_couplers_AWPROT;
|
|
wire m02_couplers_to_m02_couplers_AWREADY;
|
|
wire [2:0]m02_couplers_to_m02_couplers_AWSIZE;
|
|
wire m02_couplers_to_m02_couplers_AWVALID;
|
|
wire [3:0]m02_couplers_to_m02_couplers_BID;
|
|
wire m02_couplers_to_m02_couplers_BREADY;
|
|
wire [1:0]m02_couplers_to_m02_couplers_BRESP;
|
|
wire m02_couplers_to_m02_couplers_BVALID;
|
|
wire [63:0]m02_couplers_to_m02_couplers_RDATA;
|
|
wire [3:0]m02_couplers_to_m02_couplers_RID;
|
|
wire m02_couplers_to_m02_couplers_RLAST;
|
|
wire m02_couplers_to_m02_couplers_RREADY;
|
|
wire [1:0]m02_couplers_to_m02_couplers_RRESP;
|
|
wire m02_couplers_to_m02_couplers_RVALID;
|
|
wire [63:0]m02_couplers_to_m02_couplers_WDATA;
|
|
wire m02_couplers_to_m02_couplers_WLAST;
|
|
wire m02_couplers_to_m02_couplers_WREADY;
|
|
wire [7:0]m02_couplers_to_m02_couplers_WSTRB;
|
|
wire m02_couplers_to_m02_couplers_WVALID;
|
|
|
|
assign M_AXI_araddr[63:0] = m02_couplers_to_m02_couplers_ARADDR;
|
|
assign M_AXI_arburst[1:0] = m02_couplers_to_m02_couplers_ARBURST;
|
|
assign M_AXI_arcache[3:0] = m02_couplers_to_m02_couplers_ARCACHE;
|
|
assign M_AXI_arid[3:0] = m02_couplers_to_m02_couplers_ARID;
|
|
assign M_AXI_arlen[7:0] = m02_couplers_to_m02_couplers_ARLEN;
|
|
assign M_AXI_arlock = m02_couplers_to_m02_couplers_ARLOCK;
|
|
assign M_AXI_arprot[2:0] = m02_couplers_to_m02_couplers_ARPROT;
|
|
assign M_AXI_arsize[2:0] = m02_couplers_to_m02_couplers_ARSIZE;
|
|
assign M_AXI_arvalid = m02_couplers_to_m02_couplers_ARVALID;
|
|
assign M_AXI_awaddr[63:0] = m02_couplers_to_m02_couplers_AWADDR;
|
|
assign M_AXI_awburst[1:0] = m02_couplers_to_m02_couplers_AWBURST;
|
|
assign M_AXI_awcache[3:0] = m02_couplers_to_m02_couplers_AWCACHE;
|
|
assign M_AXI_awid[3:0] = m02_couplers_to_m02_couplers_AWID;
|
|
assign M_AXI_awlen[7:0] = m02_couplers_to_m02_couplers_AWLEN;
|
|
assign M_AXI_awlock = m02_couplers_to_m02_couplers_AWLOCK;
|
|
assign M_AXI_awprot[2:0] = m02_couplers_to_m02_couplers_AWPROT;
|
|
assign M_AXI_awsize[2:0] = m02_couplers_to_m02_couplers_AWSIZE;
|
|
assign M_AXI_awvalid = m02_couplers_to_m02_couplers_AWVALID;
|
|
assign M_AXI_bready = m02_couplers_to_m02_couplers_BREADY;
|
|
assign M_AXI_rready = m02_couplers_to_m02_couplers_RREADY;
|
|
assign M_AXI_wdata[63:0] = m02_couplers_to_m02_couplers_WDATA;
|
|
assign M_AXI_wlast = m02_couplers_to_m02_couplers_WLAST;
|
|
assign M_AXI_wstrb[7:0] = m02_couplers_to_m02_couplers_WSTRB;
|
|
assign M_AXI_wvalid = m02_couplers_to_m02_couplers_WVALID;
|
|
assign S_AXI_arready = m02_couplers_to_m02_couplers_ARREADY;
|
|
assign S_AXI_awready = m02_couplers_to_m02_couplers_AWREADY;
|
|
assign S_AXI_bid[3:0] = m02_couplers_to_m02_couplers_BID;
|
|
assign S_AXI_bresp[1:0] = m02_couplers_to_m02_couplers_BRESP;
|
|
assign S_AXI_bvalid = m02_couplers_to_m02_couplers_BVALID;
|
|
assign S_AXI_rdata[63:0] = m02_couplers_to_m02_couplers_RDATA;
|
|
assign S_AXI_rid[3:0] = m02_couplers_to_m02_couplers_RID;
|
|
assign S_AXI_rlast = m02_couplers_to_m02_couplers_RLAST;
|
|
assign S_AXI_rresp[1:0] = m02_couplers_to_m02_couplers_RRESP;
|
|
assign S_AXI_rvalid = m02_couplers_to_m02_couplers_RVALID;
|
|
assign S_AXI_wready = m02_couplers_to_m02_couplers_WREADY;
|
|
assign m02_couplers_to_m02_couplers_ARADDR = S_AXI_araddr[63:0];
|
|
assign m02_couplers_to_m02_couplers_ARBURST = S_AXI_arburst[1:0];
|
|
assign m02_couplers_to_m02_couplers_ARCACHE = S_AXI_arcache[3:0];
|
|
assign m02_couplers_to_m02_couplers_ARID = S_AXI_arid[3:0];
|
|
assign m02_couplers_to_m02_couplers_ARLEN = S_AXI_arlen[7:0];
|
|
assign m02_couplers_to_m02_couplers_ARLOCK = S_AXI_arlock;
|
|
assign m02_couplers_to_m02_couplers_ARPROT = S_AXI_arprot[2:0];
|
|
assign m02_couplers_to_m02_couplers_ARREADY = M_AXI_arready;
|
|
assign m02_couplers_to_m02_couplers_ARSIZE = S_AXI_arsize[2:0];
|
|
assign m02_couplers_to_m02_couplers_ARVALID = S_AXI_arvalid;
|
|
assign m02_couplers_to_m02_couplers_AWADDR = S_AXI_awaddr[63:0];
|
|
assign m02_couplers_to_m02_couplers_AWBURST = S_AXI_awburst[1:0];
|
|
assign m02_couplers_to_m02_couplers_AWCACHE = S_AXI_awcache[3:0];
|
|
assign m02_couplers_to_m02_couplers_AWID = S_AXI_awid[3:0];
|
|
assign m02_couplers_to_m02_couplers_AWLEN = S_AXI_awlen[7:0];
|
|
assign m02_couplers_to_m02_couplers_AWLOCK = S_AXI_awlock;
|
|
assign m02_couplers_to_m02_couplers_AWPROT = S_AXI_awprot[2:0];
|
|
assign m02_couplers_to_m02_couplers_AWREADY = M_AXI_awready;
|
|
assign m02_couplers_to_m02_couplers_AWSIZE = S_AXI_awsize[2:0];
|
|
assign m02_couplers_to_m02_couplers_AWVALID = S_AXI_awvalid;
|
|
assign m02_couplers_to_m02_couplers_BID = M_AXI_bid[3:0];
|
|
assign m02_couplers_to_m02_couplers_BREADY = S_AXI_bready;
|
|
assign m02_couplers_to_m02_couplers_BRESP = M_AXI_bresp[1:0];
|
|
assign m02_couplers_to_m02_couplers_BVALID = M_AXI_bvalid;
|
|
assign m02_couplers_to_m02_couplers_RDATA = M_AXI_rdata[63:0];
|
|
assign m02_couplers_to_m02_couplers_RID = M_AXI_rid[3:0];
|
|
assign m02_couplers_to_m02_couplers_RLAST = M_AXI_rlast;
|
|
assign m02_couplers_to_m02_couplers_RREADY = S_AXI_rready;
|
|
assign m02_couplers_to_m02_couplers_RRESP = M_AXI_rresp[1:0];
|
|
assign m02_couplers_to_m02_couplers_RVALID = M_AXI_rvalid;
|
|
assign m02_couplers_to_m02_couplers_WDATA = S_AXI_wdata[63:0];
|
|
assign m02_couplers_to_m02_couplers_WLAST = S_AXI_wlast;
|
|
assign m02_couplers_to_m02_couplers_WREADY = M_AXI_wready;
|
|
assign m02_couplers_to_m02_couplers_WSTRB = S_AXI_wstrb[7:0];
|
|
assign m02_couplers_to_m02_couplers_WVALID = S_AXI_wvalid;
|
|
endmodule
|
|
|
|
module s00_couplers_imp_1UB271G
|
|
(M_ACLK,
|
|
M_ARESETN,
|
|
M_AXI_araddr,
|
|
M_AXI_arburst,
|
|
M_AXI_arcache,
|
|
M_AXI_arid,
|
|
M_AXI_arlen,
|
|
M_AXI_arlock,
|
|
M_AXI_arprot,
|
|
M_AXI_arready,
|
|
M_AXI_arsize,
|
|
M_AXI_arvalid,
|
|
M_AXI_awaddr,
|
|
M_AXI_awburst,
|
|
M_AXI_awcache,
|
|
M_AXI_awid,
|
|
M_AXI_awlen,
|
|
M_AXI_awlock,
|
|
M_AXI_awprot,
|
|
M_AXI_awready,
|
|
M_AXI_awsize,
|
|
M_AXI_awvalid,
|
|
M_AXI_bid,
|
|
M_AXI_bready,
|
|
M_AXI_bresp,
|
|
M_AXI_bvalid,
|
|
M_AXI_rdata,
|
|
M_AXI_rid,
|
|
M_AXI_rlast,
|
|
M_AXI_rready,
|
|
M_AXI_rresp,
|
|
M_AXI_rvalid,
|
|
M_AXI_wdata,
|
|
M_AXI_wlast,
|
|
M_AXI_wready,
|
|
M_AXI_wstrb,
|
|
M_AXI_wvalid,
|
|
S_ACLK,
|
|
S_ARESETN,
|
|
S_AXI_araddr,
|
|
S_AXI_arburst,
|
|
S_AXI_arcache,
|
|
S_AXI_arid,
|
|
S_AXI_arlen,
|
|
S_AXI_arlock,
|
|
S_AXI_arprot,
|
|
S_AXI_arready,
|
|
S_AXI_arsize,
|
|
S_AXI_arvalid,
|
|
S_AXI_awaddr,
|
|
S_AXI_awburst,
|
|
S_AXI_awcache,
|
|
S_AXI_awid,
|
|
S_AXI_awlen,
|
|
S_AXI_awlock,
|
|
S_AXI_awprot,
|
|
S_AXI_awready,
|
|
S_AXI_awsize,
|
|
S_AXI_awvalid,
|
|
S_AXI_bid,
|
|
S_AXI_bready,
|
|
S_AXI_bresp,
|
|
S_AXI_bvalid,
|
|
S_AXI_rdata,
|
|
S_AXI_rid,
|
|
S_AXI_rlast,
|
|
S_AXI_rready,
|
|
S_AXI_rresp,
|
|
S_AXI_rvalid,
|
|
S_AXI_wdata,
|
|
S_AXI_wlast,
|
|
S_AXI_wready,
|
|
S_AXI_wstrb,
|
|
S_AXI_wvalid);
|
|
input M_ACLK;
|
|
input M_ARESETN;
|
|
output [63:0]M_AXI_araddr;
|
|
output [1:0]M_AXI_arburst;
|
|
output [3:0]M_AXI_arcache;
|
|
output [3:0]M_AXI_arid;
|
|
output [7:0]M_AXI_arlen;
|
|
output [0:0]M_AXI_arlock;
|
|
output [2:0]M_AXI_arprot;
|
|
input [0:0]M_AXI_arready;
|
|
output [2:0]M_AXI_arsize;
|
|
output [0:0]M_AXI_arvalid;
|
|
output [63:0]M_AXI_awaddr;
|
|
output [1:0]M_AXI_awburst;
|
|
output [3:0]M_AXI_awcache;
|
|
output [3:0]M_AXI_awid;
|
|
output [7:0]M_AXI_awlen;
|
|
output [0:0]M_AXI_awlock;
|
|
output [2:0]M_AXI_awprot;
|
|
input [0:0]M_AXI_awready;
|
|
output [2:0]M_AXI_awsize;
|
|
output [0:0]M_AXI_awvalid;
|
|
input [3:0]M_AXI_bid;
|
|
output [0:0]M_AXI_bready;
|
|
input [1:0]M_AXI_bresp;
|
|
input [0:0]M_AXI_bvalid;
|
|
input [63:0]M_AXI_rdata;
|
|
input [3:0]M_AXI_rid;
|
|
input [0:0]M_AXI_rlast;
|
|
output [0:0]M_AXI_rready;
|
|
input [1:0]M_AXI_rresp;
|
|
input [0:0]M_AXI_rvalid;
|
|
output [63:0]M_AXI_wdata;
|
|
output [0:0]M_AXI_wlast;
|
|
input [0:0]M_AXI_wready;
|
|
output [7:0]M_AXI_wstrb;
|
|
output [0:0]M_AXI_wvalid;
|
|
input S_ACLK;
|
|
input S_ARESETN;
|
|
input [63:0]S_AXI_araddr;
|
|
input [1:0]S_AXI_arburst;
|
|
input [3:0]S_AXI_arcache;
|
|
input [3:0]S_AXI_arid;
|
|
input [7:0]S_AXI_arlen;
|
|
input [0:0]S_AXI_arlock;
|
|
input [2:0]S_AXI_arprot;
|
|
output [0:0]S_AXI_arready;
|
|
input [2:0]S_AXI_arsize;
|
|
input [0:0]S_AXI_arvalid;
|
|
input [63:0]S_AXI_awaddr;
|
|
input [1:0]S_AXI_awburst;
|
|
input [3:0]S_AXI_awcache;
|
|
input [3:0]S_AXI_awid;
|
|
input [7:0]S_AXI_awlen;
|
|
input [0:0]S_AXI_awlock;
|
|
input [2:0]S_AXI_awprot;
|
|
output [0:0]S_AXI_awready;
|
|
input [2:0]S_AXI_awsize;
|
|
input [0:0]S_AXI_awvalid;
|
|
output [3:0]S_AXI_bid;
|
|
input [0:0]S_AXI_bready;
|
|
output [1:0]S_AXI_bresp;
|
|
output [0:0]S_AXI_bvalid;
|
|
output [63:0]S_AXI_rdata;
|
|
output [3:0]S_AXI_rid;
|
|
output [0:0]S_AXI_rlast;
|
|
input [0:0]S_AXI_rready;
|
|
output [1:0]S_AXI_rresp;
|
|
output [0:0]S_AXI_rvalid;
|
|
input [63:0]S_AXI_wdata;
|
|
input [0:0]S_AXI_wlast;
|
|
output [0:0]S_AXI_wready;
|
|
input [7:0]S_AXI_wstrb;
|
|
input [0:0]S_AXI_wvalid;
|
|
|
|
wire [63:0]s00_couplers_to_s00_couplers_ARADDR;
|
|
wire [1:0]s00_couplers_to_s00_couplers_ARBURST;
|
|
wire [3:0]s00_couplers_to_s00_couplers_ARCACHE;
|
|
wire [3:0]s00_couplers_to_s00_couplers_ARID;
|
|
wire [7:0]s00_couplers_to_s00_couplers_ARLEN;
|
|
wire [0:0]s00_couplers_to_s00_couplers_ARLOCK;
|
|
wire [2:0]s00_couplers_to_s00_couplers_ARPROT;
|
|
wire [0:0]s00_couplers_to_s00_couplers_ARREADY;
|
|
wire [2:0]s00_couplers_to_s00_couplers_ARSIZE;
|
|
wire [0:0]s00_couplers_to_s00_couplers_ARVALID;
|
|
wire [63:0]s00_couplers_to_s00_couplers_AWADDR;
|
|
wire [1:0]s00_couplers_to_s00_couplers_AWBURST;
|
|
wire [3:0]s00_couplers_to_s00_couplers_AWCACHE;
|
|
wire [3:0]s00_couplers_to_s00_couplers_AWID;
|
|
wire [7:0]s00_couplers_to_s00_couplers_AWLEN;
|
|
wire [0:0]s00_couplers_to_s00_couplers_AWLOCK;
|
|
wire [2:0]s00_couplers_to_s00_couplers_AWPROT;
|
|
wire [0:0]s00_couplers_to_s00_couplers_AWREADY;
|
|
wire [2:0]s00_couplers_to_s00_couplers_AWSIZE;
|
|
wire [0:0]s00_couplers_to_s00_couplers_AWVALID;
|
|
wire [3:0]s00_couplers_to_s00_couplers_BID;
|
|
wire [0:0]s00_couplers_to_s00_couplers_BREADY;
|
|
wire [1:0]s00_couplers_to_s00_couplers_BRESP;
|
|
wire [0:0]s00_couplers_to_s00_couplers_BVALID;
|
|
wire [63:0]s00_couplers_to_s00_couplers_RDATA;
|
|
wire [3:0]s00_couplers_to_s00_couplers_RID;
|
|
wire [0:0]s00_couplers_to_s00_couplers_RLAST;
|
|
wire [0:0]s00_couplers_to_s00_couplers_RREADY;
|
|
wire [1:0]s00_couplers_to_s00_couplers_RRESP;
|
|
wire [0:0]s00_couplers_to_s00_couplers_RVALID;
|
|
wire [63:0]s00_couplers_to_s00_couplers_WDATA;
|
|
wire [0:0]s00_couplers_to_s00_couplers_WLAST;
|
|
wire [0:0]s00_couplers_to_s00_couplers_WREADY;
|
|
wire [7:0]s00_couplers_to_s00_couplers_WSTRB;
|
|
wire [0:0]s00_couplers_to_s00_couplers_WVALID;
|
|
|
|
assign M_AXI_araddr[63:0] = s00_couplers_to_s00_couplers_ARADDR;
|
|
assign M_AXI_arburst[1:0] = s00_couplers_to_s00_couplers_ARBURST;
|
|
assign M_AXI_arcache[3:0] = s00_couplers_to_s00_couplers_ARCACHE;
|
|
assign M_AXI_arid[3:0] = s00_couplers_to_s00_couplers_ARID;
|
|
assign M_AXI_arlen[7:0] = s00_couplers_to_s00_couplers_ARLEN;
|
|
assign M_AXI_arlock[0] = s00_couplers_to_s00_couplers_ARLOCK;
|
|
assign M_AXI_arprot[2:0] = s00_couplers_to_s00_couplers_ARPROT;
|
|
assign M_AXI_arsize[2:0] = s00_couplers_to_s00_couplers_ARSIZE;
|
|
assign M_AXI_arvalid[0] = s00_couplers_to_s00_couplers_ARVALID;
|
|
assign M_AXI_awaddr[63:0] = s00_couplers_to_s00_couplers_AWADDR;
|
|
assign M_AXI_awburst[1:0] = s00_couplers_to_s00_couplers_AWBURST;
|
|
assign M_AXI_awcache[3:0] = s00_couplers_to_s00_couplers_AWCACHE;
|
|
assign M_AXI_awid[3:0] = s00_couplers_to_s00_couplers_AWID;
|
|
assign M_AXI_awlen[7:0] = s00_couplers_to_s00_couplers_AWLEN;
|
|
assign M_AXI_awlock[0] = s00_couplers_to_s00_couplers_AWLOCK;
|
|
assign M_AXI_awprot[2:0] = s00_couplers_to_s00_couplers_AWPROT;
|
|
assign M_AXI_awsize[2:0] = s00_couplers_to_s00_couplers_AWSIZE;
|
|
assign M_AXI_awvalid[0] = s00_couplers_to_s00_couplers_AWVALID;
|
|
assign M_AXI_bready[0] = s00_couplers_to_s00_couplers_BREADY;
|
|
assign M_AXI_rready[0] = s00_couplers_to_s00_couplers_RREADY;
|
|
assign M_AXI_wdata[63:0] = s00_couplers_to_s00_couplers_WDATA;
|
|
assign M_AXI_wlast[0] = s00_couplers_to_s00_couplers_WLAST;
|
|
assign M_AXI_wstrb[7:0] = s00_couplers_to_s00_couplers_WSTRB;
|
|
assign M_AXI_wvalid[0] = s00_couplers_to_s00_couplers_WVALID;
|
|
assign S_AXI_arready[0] = s00_couplers_to_s00_couplers_ARREADY;
|
|
assign S_AXI_awready[0] = s00_couplers_to_s00_couplers_AWREADY;
|
|
assign S_AXI_bid[3:0] = s00_couplers_to_s00_couplers_BID;
|
|
assign S_AXI_bresp[1:0] = s00_couplers_to_s00_couplers_BRESP;
|
|
assign S_AXI_bvalid[0] = s00_couplers_to_s00_couplers_BVALID;
|
|
assign S_AXI_rdata[63:0] = s00_couplers_to_s00_couplers_RDATA;
|
|
assign S_AXI_rid[3:0] = s00_couplers_to_s00_couplers_RID;
|
|
assign S_AXI_rlast[0] = s00_couplers_to_s00_couplers_RLAST;
|
|
assign S_AXI_rresp[1:0] = s00_couplers_to_s00_couplers_RRESP;
|
|
assign S_AXI_rvalid[0] = s00_couplers_to_s00_couplers_RVALID;
|
|
assign S_AXI_wready[0] = s00_couplers_to_s00_couplers_WREADY;
|
|
assign s00_couplers_to_s00_couplers_ARADDR = S_AXI_araddr[63:0];
|
|
assign s00_couplers_to_s00_couplers_ARBURST = S_AXI_arburst[1:0];
|
|
assign s00_couplers_to_s00_couplers_ARCACHE = S_AXI_arcache[3:0];
|
|
assign s00_couplers_to_s00_couplers_ARID = S_AXI_arid[3:0];
|
|
assign s00_couplers_to_s00_couplers_ARLEN = S_AXI_arlen[7:0];
|
|
assign s00_couplers_to_s00_couplers_ARLOCK = S_AXI_arlock[0];
|
|
assign s00_couplers_to_s00_couplers_ARPROT = S_AXI_arprot[2:0];
|
|
assign s00_couplers_to_s00_couplers_ARREADY = M_AXI_arready[0];
|
|
assign s00_couplers_to_s00_couplers_ARSIZE = S_AXI_arsize[2:0];
|
|
assign s00_couplers_to_s00_couplers_ARVALID = S_AXI_arvalid[0];
|
|
assign s00_couplers_to_s00_couplers_AWADDR = S_AXI_awaddr[63:0];
|
|
assign s00_couplers_to_s00_couplers_AWBURST = S_AXI_awburst[1:0];
|
|
assign s00_couplers_to_s00_couplers_AWCACHE = S_AXI_awcache[3:0];
|
|
assign s00_couplers_to_s00_couplers_AWID = S_AXI_awid[3:0];
|
|
assign s00_couplers_to_s00_couplers_AWLEN = S_AXI_awlen[7:0];
|
|
assign s00_couplers_to_s00_couplers_AWLOCK = S_AXI_awlock[0];
|
|
assign s00_couplers_to_s00_couplers_AWPROT = S_AXI_awprot[2:0];
|
|
assign s00_couplers_to_s00_couplers_AWREADY = M_AXI_awready[0];
|
|
assign s00_couplers_to_s00_couplers_AWSIZE = S_AXI_awsize[2:0];
|
|
assign s00_couplers_to_s00_couplers_AWVALID = S_AXI_awvalid[0];
|
|
assign s00_couplers_to_s00_couplers_BID = M_AXI_bid[3:0];
|
|
assign s00_couplers_to_s00_couplers_BREADY = S_AXI_bready[0];
|
|
assign s00_couplers_to_s00_couplers_BRESP = M_AXI_bresp[1:0];
|
|
assign s00_couplers_to_s00_couplers_BVALID = M_AXI_bvalid[0];
|
|
assign s00_couplers_to_s00_couplers_RDATA = M_AXI_rdata[63:0];
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assign s00_couplers_to_s00_couplers_RID = M_AXI_rid[3:0];
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assign s00_couplers_to_s00_couplers_RLAST = M_AXI_rlast[0];
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assign s00_couplers_to_s00_couplers_RREADY = S_AXI_rready[0];
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assign s00_couplers_to_s00_couplers_RRESP = M_AXI_rresp[1:0];
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assign s00_couplers_to_s00_couplers_RVALID = M_AXI_rvalid[0];
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assign s00_couplers_to_s00_couplers_WDATA = S_AXI_wdata[63:0];
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assign s00_couplers_to_s00_couplers_WLAST = S_AXI_wlast[0];
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assign s00_couplers_to_s00_couplers_WREADY = M_AXI_wready[0];
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assign s00_couplers_to_s00_couplers_WSTRB = S_AXI_wstrb[7:0];
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assign s00_couplers_to_s00_couplers_WVALID = S_AXI_wvalid[0];
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endmodule
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