2021-07-24 01:32:47 +08:00
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file fpga_ulx3s.v
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2021-07-24 06:08:23 +08:00
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file pll_25_50.v
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2021-07-25 20:29:41 +08:00
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file pll_25_40.v
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2021-07-24 06:08:23 +08:00
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file ../libfpga/common/reset_sync.v
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file ../libfpga/common/fpga_reset.v
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2021-07-24 01:32:47 +08:00
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list ../soc/soc.f
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2021-07-24 06:08:23 +08:00
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# ECP5 DTM is not in main SoC list because the JTAGG primitive doesn't exist
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# on most platforms
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2021-07-24 01:32:47 +08:00
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list ../../hdl/debug/dtm/hazard3_ecp5_jtag_dtm.f
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