Hazard3/example_soc/fpga
Scott Shawcroft 4c12f163bd
Add OrangeCrab 25F support (#7)
* Add OrangeCrab 25F support

* Fix whitespace

Co-authored-by: Luke Wren <wren6991@gmail.com>
2022-12-17 11:49:41 +00:00
..
fpga_icebreaker.f Add activity LED to iCEBreaker 2021-07-25 13:13:41 +01:00
fpga_icebreaker.v Add RISC-V timer to example soc, and tweak ULX3S config 2022-10-07 03:11:36 +01:00
fpga_orangecrab_25f.f Add OrangeCrab 25F support (#7) 2022-12-17 11:49:41 +00:00
fpga_orangecrab_25f.v Add OrangeCrab 25F support (#7) 2022-12-17 11:49:41 +00:00
fpga_ulx3s.f Back off ULX3S frequency to 40 MHz -- 50 works fine but fails to close after increasing RAM from 4k to 128k 2021-07-25 13:41:04 +01:00
fpga_ulx3s.v Add RISC-V timer to example soc, and tweak ULX3S config 2022-10-07 03:11:36 +01:00
pll_25_40.v Back off ULX3S frequency to 40 MHz -- 50 works fine but fails to close after increasing RAM from 4k to 128k 2021-07-25 13:41:04 +01:00
pll_25_50.v Tweaks to example soc configuration 2021-07-23 23:08:23 +01:00