colin
/
Hazard3
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Rename confusingly named power control signal for allowing clock gate to shut during WFI/block sleep.

This commit is contained in:
Luke Wren 2022-11-05 18:26:56 +00:00
parent c81666177e
commit 05cb6e7ee8
3 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hdl/hazard3_core.v
View File

@ -947,7 +947,7 @@ wire m_dphase_in_flight = xm_memop != MEMOP_NONE && xm_memop != MEMOP_AMO;
wire m_delay_irq_entry = xm_delay_irq_entry_on_ls_stagex || wire m_delay_irq_entry = xm_delay_irq_entry_on_ls_stagex ||
((xm_sleep_wfi || xm_sleep_block) && !m_sleep_stall_release); ((xm_sleep_wfi || xm_sleep_block) && !m_sleep_stall_release);
wire m_pwr_allow_sleep; wire m_pwr_allow_clkgate;
wire m_pwr_allow_power_down; wire m_pwr_allow_power_down;
wire m_pwr_allow_sleep_on_block; wire m_pwr_allow_sleep_on_block;
wire m_wfi_wakeup_req; wire m_wfi_wakeup_req;
@ -1002,7 +1002,7 @@ hazard3_csr #(
.delay_irq_entry (m_delay_irq_entry), .delay_irq_entry (m_delay_irq_entry),
.mepc_in (m_exception_return_addr), .mepc_in (m_exception_return_addr),
.pwr_allow_sleep (m_pwr_allow_sleep), .pwr_allow_clkgate (m_pwr_allow_clkgate),
.pwr_allow_power_down (m_pwr_allow_power_down), .pwr_allow_power_down (m_pwr_allow_power_down),
.pwr_allow_sleep_on_block (m_pwr_allow_sleep_on_block), .pwr_allow_sleep_on_block (m_pwr_allow_sleep_on_block),
.pwr_wfi_wakeup_req (m_wfi_wakeup_req), .pwr_wfi_wakeup_req (m_wfi_wakeup_req),
@ -1172,7 +1172,7 @@ hazard3_power_ctrl power_ctrl (
.pwrup_ack (pwrup_ack), .pwrup_ack (pwrup_ack),
.clk_en (clk_en), .clk_en (clk_en),
.allow_sleep (m_pwr_allow_sleep), .allow_clkgate (m_pwr_allow_clkgate),
.allow_power_down (m_pwr_allow_power_down), .allow_power_down (m_pwr_allow_power_down),
.allow_sleep_on_block (m_pwr_allow_sleep_on_block), .allow_sleep_on_block (m_pwr_allow_sleep_on_block),

4
hdl/hazard3_csr.v
View File

@ -88,7 +88,7 @@ module hazard3_csr #(
input wire [XLEN-1:0] mepc_in, input wire [XLEN-1:0] mepc_in,
// Power control signalling // Power control signalling
output wire pwr_allow_sleep, output wire pwr_allow_clkgate,
output wire pwr_allow_power_down, output wire pwr_allow_power_down,
output wire pwr_allow_sleep_on_block, output wire pwr_allow_sleep_on_block,
output wire pwr_wfi_wakeup_req, output wire pwr_wfi_wakeup_req,
@ -404,7 +404,7 @@ end
assign pwr_allow_sleep_on_block = msleep_sleeponblock; assign pwr_allow_sleep_on_block = msleep_sleeponblock;
assign pwr_allow_power_down = msleep_powerdown; assign pwr_allow_power_down = msleep_powerdown;
assign pwr_allow_sleep = msleep_deepsleep; assign pwr_allow_clkgate = msleep_deepsleep;
// ---------------------------------------------------------------------------- // ----------------------------------------------------------------------------
// Counters // Counters

8
hdl/hazard3_power_ctrl.v
View File

@ -28,7 +28,7 @@ module hazard3_power_ctrl #(
output reg clk_en, output reg clk_en,
// Power state controls from CSRs // Power state controls from CSRs
input wire allow_sleep, input wire allow_clkgate,
input wire allow_power_down, input wire allow_power_down,
input wire allow_sleep_on_block, input wire allow_sleep_on_block,
@ -82,10 +82,10 @@ always @ (posedge clk_always_on or negedge rst_n) begin
end else if (active_wake_req) begin end else if (active_wake_req) begin
// Skip deep sleep if it would immediately fall through. // Skip deep sleep if it would immediately fall through.
stall_release <= 1'b1; stall_release <= 1'b1;
end else if ((allow_power_down || allow_sleep) && (sleeping_on_wfi || allow_sleep_on_block)) begin end else if ((allow_power_down || allow_clkgate) && (sleeping_on_wfi || allow_sleep_on_block)) begin
if (frontend_pwrdown_ok) begin if (frontend_pwrdown_ok) begin
pwrup_req <= !allow_power_down; pwrup_req <= !allow_power_down;
clk_en <= !allow_sleep; clk_en <= !allow_clkgate;
state <= allow_power_down ? S_ENTER_ASLEEP : S_ASLEEP; state <= allow_power_down ? S_ENTER_ASLEEP : S_ASLEEP;
end else begin end else begin
// Stay awake until it is safe to power down (i.e. until our // Stay awake until it is safe to power down (i.e. until our
@ -142,7 +142,7 @@ always @ (posedge clk_always_on or negedge rst_n) begin
assert(!past_stall_release); assert(!past_stall_release);
end end
if (state == S_ASLEEP) begin if (state == S_ASLEEP) begin
assert(allow_power_down || allow_sleep); assert(allow_power_down || allow_clkgate);
end end
end end
end end