Add IALIGN exception to non-RVC implementations
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@ -708,12 +708,13 @@ end
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wire [W_ADDR-1:0] m_exception_return_addr;
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wire [W_ADDR-1:0] m_exception_return_addr;
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wire [W_EXCEPT-1:0] x_except =
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wire [W_EXCEPT-1:0] x_except =
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x_csr_illegal_access ? EXCEPT_INSTR_ILLEGAL :
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~|EXTENSION_C && d_pc[1] ? EXCEPT_INSTR_MISALIGN :
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|EXTENSION_A && x_unaligned_addr && d_memop_is_amo ? EXCEPT_STORE_ALIGN :
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x_csr_illegal_access ? EXCEPT_INSTR_ILLEGAL :
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|EXTENSION_A && x_amo_phase == 3'h4 && x_unaligned_addr? EXCEPT_STORE_ALIGN :
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|EXTENSION_A && x_unaligned_addr && d_memop_is_amo ? EXCEPT_STORE_ALIGN :
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|EXTENSION_A && x_amo_phase == 3'h4 ? EXCEPT_STORE_FAULT :
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|EXTENSION_A && x_amo_phase == 3'h4 && x_unaligned_addr? EXCEPT_STORE_ALIGN :
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x_unaligned_addr && x_memop_write ? EXCEPT_STORE_ALIGN :
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|EXTENSION_A && x_amo_phase == 3'h4 ? EXCEPT_STORE_FAULT :
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x_unaligned_addr && !x_memop_write ? EXCEPT_LOAD_ALIGN : d_except;
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x_unaligned_addr && x_memop_write ? EXCEPT_STORE_ALIGN :
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x_unaligned_addr && !x_memop_write ? EXCEPT_LOAD_ALIGN : d_except;
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// If an instruction causes an exceptional condition we do not consider it to have retired.
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// If an instruction causes an exceptional condition we do not consider it to have retired.
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wire x_except_counts_as_retire = x_except == EXCEPT_EBREAK || x_except == EXCEPT_MRET || x_except == EXCEPT_ECALL;
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wire x_except_counts_as_retire = x_except == EXCEPT_EBREAK || x_except == EXCEPT_MRET || x_except == EXCEPT_ECALL;
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