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Add IALIGN exception to non-RVC implementations

This commit is contained in:
Luke Wren 2022-05-23 12:47:48 +01:00
parent c4e81922da
commit 96a9ee18e1
1 changed files with 7 additions and 6 deletions
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hdl/hazard3_core.v
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@ -708,6 +708,7 @@ end
wire [W_ADDR-1:0] m_exception_return_addr;
wire [W_EXCEPT-1:0] x_except =
~|EXTENSION_C && d_pc[1] ? EXCEPT_INSTR_MISALIGN :
x_csr_illegal_access ? EXCEPT_INSTR_ILLEGAL :
|EXTENSION_A && x_unaligned_addr && d_memop_is_amo ? EXCEPT_STORE_ALIGN :
|EXTENSION_A && x_amo_phase == 3'h4 && x_unaligned_addr? EXCEPT_STORE_ALIGN :