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Add RISC-V opcodes and memory operation codes for atomics

This commit is contained in:
Luke Wren 2021-12-04 11:16:24 +00:00
parent 52ba930638
commit a988adfec8
4 changed files with 38 additions and 13 deletions
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6
hdl/hazard3_core.v
View File

@ -561,7 +561,7 @@ hazard3_csr #(
.trap_enter_soon (m_trap_enter_soon),
.trap_enter_vld (m_trap_enter_vld),
.trap_enter_rdy (m_trap_enter_rdy),
.loadstore_dphase_pending (!xm_memop[3]),
.loadstore_dphase_pending (xm_memop != MEMOP_NONE),
.mepc_in (m_exception_return_addr),
.wfi_stall_clear (m_wfi_stall_clear),
@ -603,7 +603,7 @@ always @ (posedge clk or negedge rst_n) begin
// this cycle, and on the next cycle the trap entry will be asserted,
// suppressing any load/store that may currently be in stage X.
`ifdef FORMAL
assert(!xm_memop[3]); // Not NONE
assert(xm_memop != MEMOP_NONE);
`endif
xm_except <= xm_memop <= MEMOP_LBU ? EXCEPT_LOAD_FAULT : EXCEPT_STORE_FAULT;
xm_wfi <= 1'b0;
@ -644,7 +644,7 @@ assign f_jump_req = x_jump_req || m_trap_enter_vld;
assign f_jump_target = m_trap_enter_vld ? m_trap_addr : x_jump_target;
assign x_jump_not_except = !m_trap_enter_vld;
wire m_bus_stall = !xm_memop[3] && !bus_dph_ready_d;
wire m_bus_stall = xm_memop != MEMOP_NONE && !bus_dph_ready_d;
assign m_stall = m_bus_stall ||
(m_trap_enter_vld && !m_trap_enter_rdy && !m_trap_is_irq) ||
(xm_wfi && !m_wfi_stall_clear);

30
hdl/hazard3_ops.vh
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@ -52,15 +52,27 @@ localparam ALUSRCA_PC = 1'h1;
localparam ALUSRCB_RS2 = 1'h0;
localparam ALUSRCB_IMM = 1'h1;
localparam MEMOP_LW = 4'h0;
localparam MEMOP_LH = 4'h1;
localparam MEMOP_LB = 4'h2;
localparam MEMOP_LHU = 4'h3;
localparam MEMOP_LBU = 4'h4;
localparam MEMOP_SW = 4'h5;
localparam MEMOP_SH = 4'h6;
localparam MEMOP_SB = 4'h7;
localparam MEMOP_NONE = 4'h8;
localparam MEMOP_LW = 5'h00;
localparam MEMOP_LH = 5'h01;
localparam MEMOP_LB = 5'h02;
localparam MEMOP_LHU = 5'h03;
localparam MEMOP_LBU = 5'h04;
localparam MEMOP_SW = 5'h05;
localparam MEMOP_SH = 5'h06;
localparam MEMOP_SB = 5'h07;
localparam MEMOP_LR_W = 5'h08;
localparam MEMOP_SC_W = 5'h09;
localparam MEMOP_AMOSWAP_W = 5'h0a;
localparam MEMOP_AMOADD_W = 5'h0b;
localparam MEMOP_AMOXOR_W = 5'h0c;
localparam MEMOP_AMOAND_W = 5'h0d;
localparam MEMOP_AMOOR_W = 5'h0e;
localparam MEMOP_AMOMIN_W = 5'h0f;
localparam MEMOP_AMOMAX_W = 5'h10;
localparam MEMOP_AMOMINU_W = 5'h11;
localparam MEMOP_AMOMAXU_W = 5'h12;
localparam MEMOP_NONE = 5'h1f;
localparam BCOND_NEVER = 2'h0;
localparam BCOND_ALWAYS = 2'h1;

2
hdl/hazard3_width_const.vh
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@ -7,7 +7,7 @@ parameter W_REGADDR = 5,
parameter W_ALUOP = 6,
parameter W_ALUSRC = 1,
parameter W_MEMOP = 4,
parameter W_MEMOP = 5,
parameter W_BCOND = 2,
parameter W_SHAMT = 5,

13
hdl/rv_opcodes.vh
View File

@ -67,6 +67,19 @@ localparam RV_DIVU = 32'b0000001??????????101?????0110011;
localparam RV_REM = 32'b0000001??????????110?????0110011;
localparam RV_REMU = 32'b0000001??????????111?????0110011;
// A extension
localparam RV_LR_W = 32'b00010??00000?????010?????0101111;
localparam RV_SC_W = 32'b00011????????????010?????0101111;
localparam RV_AMOSWAP_W = 32'b00001????????????010?????0101111;
localparam RV_AMOADD_W = 32'b00000????????????010?????0101111;
localparam RV_AMOXOR_W = 32'b00100????????????010?????0101111;
localparam RV_AMOAND_W = 32'b01100????????????010?????0101111;
localparam RV_AMOOR_W = 32'b01000????????????010?????0101111;
localparam RV_AMOMIN_W = 32'b10000????????????010?????0101111;
localparam RV_AMOMAX_W = 32'b10100????????????010?????0101111;
localparam RV_AMOMINU_W = 32'b11000????????????010?????0101111;
localparam RV_AMOMAXU_W = 32'b11100????????????010?????0101111;
// Zba (address generation)
localparam RV_SH1ADD = 32'b0010000??????????010?????0110011;
localparam RV_SH2ADD = 32'b0010000??????????100?????0110011;