Add Zcb/Zcmp instruction timings to docs

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Luke Wren 2023-03-23 01:12:38 +00:00
parent 56586def8d
commit b074d370a6
2 changed files with 25029 additions and 21891 deletions

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@ -165,6 +165,30 @@ A consequence of the C extension is that 32-bit instructions can be non-naturall
|`unzip rd, rs1` | 1 |
|===
=== Zcb Extension
Similarly to the C extension, this extension contains 16-bit variants of common 32-bit instructions:
* RV32I base ISA: `lbu`, `lh`, `lhu`, `sb`, `sh`, `zext.b` (alias of `andi`), `not` (alias of `xori`)
* Zbb extension: `sext.b`, `zext.h`, `sext.h`
* M extension: `mul`
They perform identically to their 32-bit counterparts.
=== Zcmp Extension
[%autowidth.stretch, options="header"]
|===
| Instruction | Cycles | Note
|`cm.push {rlist}, -imm` | 1 + _n_ | _n_ is number of registers in rlist
|`cm.pop {rlist}, imm` | 1 + _n_ | _n_ is number of registers in rlist
|`cm.popret {rlist}, imm` | 3 + _n_ footnote:unaligned_branch[] | _n_ is number of registers in rlist
|`cm.popretz {rlist}, imm` | 4 + _n_ footnote:unaligned_branch[] | _n_ is number of registers in rlist
|`cm.mva01s r1s', r2s'` | 2 |
|`cm.mvsa01 r1s', r2s'` | 2 |
|===
=== Branch Predictor
Hazard3 includes a minimal branch predictor, to accelerate tight loops: