Luke Wren
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43130a16e4
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Fix readback of tdata2 and tinfo CSRs
(Found due to latest riscv-openocd failing to enumerate triggers,
as it now scans tinfo before going for tdata1/mcontrol)
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2023-03-23 23:33:39 +00:00 |
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Luke Wren
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0915cc2834
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Doh
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2022-09-08 15:11:24 +01:00 |
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Luke Wren
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9eb8590858
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Add generate to avoid elaborating internals of PMP/triggers with 0 PMP regions or triggers.
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2022-09-05 00:36:41 +01:00 |
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Luke Wren
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9a60f06c43
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Fix trigger enable condition
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2022-08-23 01:05:46 +01:00 |
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Luke Wren
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9e11c0e5a8
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Fix tdata1.dmode being writable from M-mode
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2022-08-23 00:08:17 +01:00 |
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Luke Wren
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04f138ae0e
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Fix mcontrol.execute not being writable. Enable hardware breakpoint debug tests: Hwpb1/2, JumpHBreak, TriggerExecuteInstant
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2022-08-23 00:05:30 +01:00 |
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Luke Wren
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49c2edeff8
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Avoid reserved keyword
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2022-08-22 10:26:20 +01:00 |
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Luke Wren
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53902a901b
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Fix bad rdata width for tdata1 (which also caused the trigger type to appear as legacy SiFive, oops)
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2022-08-22 09:47:19 +01:00 |
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Luke Wren
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6e3799eed0
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First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested.
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2022-08-22 08:47:03 +01:00 |