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arith
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Fix partial case overlap lint for shared A/Zbb ALU ops
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2024-06-06 06:58:59 +01:00 |
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debug
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Delete unused ecp5_jtag
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2025-04-06 17:42:01 +08:00 |
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hazard3.f
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Make custom IRQ and PMP functionality optional. Factor out IRQ controller into separate module.
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2022-10-05 23:53:04 +01:00 |
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hazard3_config.vh
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Avoid zero-total-width concatenations for parameters parameterised
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2024-05-26 16:47:20 +01:00 |
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hazard3_config_inst.vh
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First attempt at Zcmp
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2023-03-20 00:19:23 +00:00 |
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hazard3_core.v
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PPA: predecode stage 2 bypass mux controls at end of stage 1
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2024-06-06 08:36:55 +01:00 |
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hazard3_cpu_1port.v
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Fix use of non-always-on clock for arbitration of load/store vs SBA,
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2024-03-17 05:46:01 +00:00 |
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hazard3_cpu_2port.v
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Fix use of non-always-on clock for arbitration of load/store vs SBA,
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2024-03-17 05:46:01 +00:00 |
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hazard3_csr.v
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Set misa.b when all of Zba, Zbb and Zbs are enabled.
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2024-05-11 12:13:35 +01:00 |
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hazard3_csr_addr.vh
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First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested.
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2022-08-22 08:47:03 +01:00 |
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hazard3_decode.v
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Fix fence.i being marked invalid in debug mode.
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2024-06-01 15:38:33 +01:00 |
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hazard3_frontend.v
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Coding style change for Verilator compatibility (fixes #21)
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2024-12-09 05:35:34 +00:00 |
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hazard3_instr_decompress.v
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Fix case overlap lint in instr_decompress. Now verilator lint clean
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2024-06-06 07:18:52 +01:00 |
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hazard3_irq_ctrl.v
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Remove redundant masking of meinext_irq field
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2024-08-01 08:45:26 +01:00 |
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hazard3_ops.vh
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Add a custom instruction (bextm/bextmi: 1 to 8-bit version of bext/bexti from Zbs) for fooling around with toolchains
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2022-08-06 23:02:08 +01:00 |
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hazard3_pmp.v
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Fix verilator lint width issues in triggers, PMP, DM.
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2024-05-29 15:32:45 +01:00 |
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hazard3_power_ctrl.v
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Rename confusingly named power control signal for allowing clock gate to shut during WFI/block sleep.
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2022-11-05 18:26:56 +00:00 |
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hazard3_regfile_1w2r.v
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Add no_rw_check attribute to regfile memory to avoid recent Yosys area regression
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2022-09-04 23:56:14 +01:00 |
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hazard3_triggers.v
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Fix verilator lint width issues in triggers, PMP, DM.
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2024-05-29 15:32:45 +01:00 |
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hazard3_width_const.vh
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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rv_opcodes.vh
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First attempt at Zcmp
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2023-03-20 00:19:23 +00:00 |
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