(previous monitor logic was ok when fetch faults weren't implemented. If the blanked instruction has side effects, these will break other test properties, which we would detect.) |
||
|---|---|---|
| .. | ||
| riscv-formal@8bede6ceb9 | ||
| tb | ||
(previous monitor logic was ok when fetch faults weren't implemented. If the blanked instruction has side effects, these will break other test properties, which we would detect.) |
||
|---|---|---|
| .. | ||
| riscv-formal@8bede6ceb9 | ||
| tb | ||