Luke Wren 8721bd3deb Add RISC-V timer to example soc, and tweak ULX3S config		2022-10-07 03:11:36 +01:00
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hazard3_riscv_timer.f	Add RISC-V timer to example soc, and tweak ULX3S config	2022-10-07 03:11:36 +01:00
hazard3_riscv_timer.v	Add RISC-V timer to example soc, and tweak ULX3S config	2022-10-07 03:11:36 +01:00