Hazard3/hdl
Luke Wren 51bc26f8ac First pass at adding system bus access to DM. Currently only the 2-port processor supports SBA patchthrough. 2022-07-03 00:25:47 +01:00
..
arith Add separate define HAZARD3_ASSERTIONS for enabling internal assertions, 2022-06-25 20:08:40 +01:00
debug First pass at adding system bus access to DM. Currently only the 2-port processor supports SBA patchthrough. 2022-07-03 00:25:47 +01:00
hazard3.f Integrate PMP, and fix a couple of PMP bugs 2022-05-24 19:57:45 +01:00
hazard3_config.vh First pass at adding branch prediction 2022-06-15 02:05:46 +01:00
hazard3_config_inst.vh Add 'everything but MHARTID' option to config_inst, to allow its reuse in multicore instantiations. 2022-06-25 13:11:40 +01:00
hazard3_core.v Clear local monitor on non-debug trap entry/exit 2022-06-26 21:55:51 +01:00
hazard3_cpu_1port.v Update copyright years 2022-06-09 00:12:01 +01:00
hazard3_cpu_2port.v First pass at adding system bus access to DM. Currently only the 2-port processor supports SBA patchthrough. 2022-07-03 00:25:47 +01:00
hazard3_csr.v Clear local monitor on non-debug trap entry/exit 2022-06-26 21:55:51 +01:00
hazard3_csr_addr.vh Add menvcfg CSR, and comment explaining why we don't have mseccfg CSR 2022-06-26 01:25:48 +01:00
hazard3_decode.v Add separate define HAZARD3_ASSERTIONS for enabling internal assertions, 2022-06-25 20:08:40 +01:00
hazard3_frontend.v Fix acmd FSM not selecting the correct hart signal for its state transitions, and make flush take precedence over debug injection in frontend. (Changes from aborted abstract access memory implementation, see abstract-access-memory branch) 2022-07-02 22:46:20 +01:00
hazard3_instr_decompress.v Update copyright years 2022-06-09 00:12:01 +01:00
hazard3_ops.vh ecall from U-mode has a different mcause value than ecall from M-mode 2022-05-28 12:07:29 +01:00
hazard3_pmp.v PMP config: separate granularity config from hardwired region config. Give correct read value for G > 1. 2022-06-03 17:09:43 +01:00
hazard3_regfile_1w2r.v Update copyright years 2022-06-09 00:12:01 +01:00
hazard3_width_const.vh Update copyright years 2022-06-09 00:12:01 +01:00
rv_opcodes.vh Correct the name and operation of the brev8 (formerly rev.b) instruction 2022-05-20 15:28:18 +01:00