Hazard3/test/sim/rvcpp
Luke Wren fce1c087d4 Add basic PMP implementation to rvcpp. Seems like the RWX vs XWR order might be transposed in both the hardware and the tests 2024-04-27 13:38:10 +01:00
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include Add basic PMP implementation to rvcpp. Seems like the RWX vs XWR order might be transposed in both the hardware and the tests 2024-04-27 13:38:10 +01:00
.gitignore Organise test directory into formal and sim 2021-05-23 07:42:35 +01:00
Makefile Add timer and soft IRQ support to rvcpp. Relevant sw_testcases now pass. 2024-03-22 00:52:01 +00:00
main.cpp Add timer and soft IRQ support to rvcpp. Relevant sw_testcases now pass. 2024-03-22 00:52:01 +00:00
rv_core.cpp Add basic PMP implementation to rvcpp. Seems like the RWX vs XWR order might be transposed in both the hardware and the tests 2024-04-27 13:38:10 +01:00
rv_csr.cpp Add basic PMP implementation to rvcpp. Seems like the RWX vs XWR order might be transposed in both the hardware and the tests 2024-04-27 13:38:10 +01:00