Luke Wren 97121afa91 Extend testbench to allow dumping/replaying JTAG to text file. ... This allows debugging of tests that behave differently when VCD dumping is enabled, due to the difference in execution speed. (A couple of the SMP debug tests fail intermittently.)		2023-03-27 00:17:11 +01:00
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.gitignore	tb_cxxrtl Makefile: better support for building multiple tb configurations	2023-03-24 18:44:37 +00:00
Makefile	Add a second mtimecmp comparator to TB IO, for dual-core InterruptTest from RISC-V debug tests.	2023-03-26 23:00:18 +01:00
compliance.cfg	Consolidate openocd and bin-load testbenches	2021-12-11 09:46:38 +00:00
config_default.vh	First attempt at Zcmp	2023-03-20 00:19:23 +00:00
config_min.vh	First attempt at Zcmp	2023-03-20 00:19:23 +00:00
gdbinit	Consolidate openocd and bin-load testbenches	2021-12-11 09:46:38 +00:00
multicore-openocd.cfg	Add multicore tb integration file	2021-12-17 00:41:23 +00:00
multicore.gtkw	Make rvpy IO output look exactly like tb_cxxrtl (bringing up embench)	2022-07-06 23:53:11 +01:00
openocd.cfg	Consolidate openocd and bin-load testbenches	2021-12-11 09:46:38 +00:00
tb.cpp	Extend testbench to allow dumping/replaying JTAG to text file.	2023-03-27 00:17:11 +01:00
tb.f	Add multicore tb integration file	2021-12-17 00:41:23 +00:00
tb.v	Increase DTM idle cycle hint to 8 cycles -- see #6	2022-10-19 21:11:18 +01:00
tb_common.f	Add multicore tb integration file	2021-12-17 00:41:23 +00:00
tb_multicore.f	Add multicore tb integration file	2021-12-17 00:41:23 +00:00
tb_multicore.v	Add a second mtimecmp comparator to TB IO, for dual-core InterruptTest from RISC-V debug tests.	2023-03-26 23:00:18 +01:00
waves.gtkw	Consolidate openocd and bin-load testbenches	2021-12-11 09:46:38 +00:00