Hazard3/hdl
Luke Wren e6aaf4b801 Avoid IRQ to bus through-path when custom IRQs are disabled 2022-10-06 00:16:10 +01:00
..
arith First stab at adding wake/sleep state machine 2022-08-28 19:50:04 +01:00
debug Fix bad preprocessor conditional in ECP5 JTAG DTM 2022-09-04 23:48:58 +01:00
hazard3.f Make custom IRQ and PMP functionality optional. Factor out IRQ controller into separate module. 2022-10-05 23:53:04 +01:00
hazard3_config.vh Avoid IRQ to bus through-path when custom IRQs are disabled 2022-10-06 00:16:10 +01:00
hazard3_config_inst.vh Make custom IRQ and PMP functionality optional. Factor out IRQ controller into separate module. 2022-10-05 23:53:04 +01:00
hazard3_core.v Implement block/unblock instructions, and fix questionable partial masking of sleep signals on exceptions. Add simple test for self-block/unblock with loopback in tb. 2022-08-29 14:52:01 +01:00
hazard3_cpu_1port.v First stab at adding wake/sleep state machine 2022-08-28 19:50:04 +01:00
hazard3_cpu_2port.v First stab at adding wake/sleep state machine 2022-08-28 19:50:04 +01:00
hazard3_csr.v Avoid IRQ to bus through-path when custom IRQs are disabled 2022-10-06 00:16:10 +01:00
hazard3_csr_addr.vh First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested. 2022-08-22 08:47:03 +01:00
hazard3_decode.v Implement block/unblock instructions, and fix questionable partial masking of sleep signals on exceptions. Add simple test for self-block/unblock with loopback in tb. 2022-08-29 14:52:01 +01:00
hazard3_frontend.v First stab at adding wake/sleep state machine 2022-08-28 19:50:04 +01:00
hazard3_instr_decompress.v Replace localparams with defines in rv_opcodes.vh, to avoid slightly dubious localparam to casez Z-propagation 2022-08-20 16:22:04 +01:00
hazard3_irq_ctrl.v Make custom IRQ and PMP functionality optional. Factor out IRQ controller into separate module. 2022-10-05 23:53:04 +01:00
hazard3_ops.vh Add a custom instruction (bextm/bextmi: 1 to 8-bit version of bext/bexti from Zbs) for fooling around with toolchains 2022-08-06 23:02:08 +01:00
hazard3_pmp.v Make custom IRQ and PMP functionality optional. Factor out IRQ controller into separate module. 2022-10-05 23:53:04 +01:00
hazard3_power_ctrl.v Fix up new asserts in hazard3_power_ctrl. Add power signals to formal TBs. 2022-08-29 19:20:09 +01:00
hazard3_regfile_1w2r.v Add no_rw_check attribute to regfile memory to avoid recent Yosys area regression 2022-09-04 23:56:14 +01:00
hazard3_triggers.v Doh 2022-09-08 15:11:24 +01:00
hazard3_width_const.vh Update copyright years 2022-06-09 00:12:01 +01:00
rv_opcodes.vh Fix some whitespace issues, and avoid redefinition of RVOPC macros 2022-08-21 13:09:28 +01:00
synth.v Fix some width issues introduced by last commit 2022-10-05 22:19:02 +01:00