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Fixed transpose layout inference bug (#430) 

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
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chxin66 2022-07-11 09:55:48 +08:00 committed by GitHub
parent 6344379469
commit f52cb852d6
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1 changed files with 2 additions and 1 deletions
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3
src/tim/transform/ops/transpose_layout_inference.h
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@ -69,7 +69,8 @@ class TransposeLayoutInfer : public OpLayoutInfer {
context_->infer_graph_->CreateOperation<tim::vx::ops::Transpose>( context_->infer_graph_->CreateOperation<tim::vx::ops::Transpose>(
final_pv->AsStdVec()); final_pv->AsStdVec());
transpose_op->BindInput(infer_input); transpose_op->BindInput(infer_input);
auto infer_out = CreateOutputsTensor(final_pv); // The layout after final_pv permute is the default sequence
auto infer_out = CreateOutputsTensor(MakeShared(perm.size()));
transpose_op->BindOutput(infer_out[0]); transpose_op->BindOutput(infer_out[0]);
} }
context_->SetPermuteVector(op_->impl()->OutputsTensor()[0], MakeShared(perm.size())); context_->SetPermuteVector(op_->impl()->OutputsTensor()[0], MakeShared(perm.size()));