Commit Graph

13 Commits

Author SHA1 Message Date
Kainan Cha 81cc868b6c Update internal to 1.1.34
SHA: 67f1e

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-09-24 21:36:18 +08:00
Kainan Cha 4d4bc08d6a Update internal to 1.1.32.1
SHA: 215204

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-08-02 16:19:21 +08:00
Kainan Cha 3c59694025 Update internal to 1.1.32
SHA: 9aa0b0f

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-06-29 11:25:36 +08:00
zhao.xia f59f26412b Add GroupedConv2d
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-06-04 16:53:25 +08:00
zhao.xia 8a15abf12b Add ScatterND
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-06-03 11:22:58 +08:00
Kainan Cha 18a928ee69 Add Op MaxpoolWithArgmax
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-27 18:59:35 +08:00
Sven 410cd8e516
Refine the cmake build (#63)
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
2021-05-24 13:40:37 +08:00
Sven 66dd29703e
Refine cmake build: add gtest (#47)
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
2021-05-17 13:04:45 +08:00
Kainan Cha 31969a7326 Add support for Android make
This change adds support for building TIM-VX under a
Android AOSP environment.

Instructions below based on Khadas VIMS system

* Add TIM-VX git repository to Android AOSP

  # cd vendor/amlogic/common/npu
  # git clone git@github.com:VeriSilicon/TIM-VX.git tim-vx

* Include tim-vx/Android.mk to AOSP build

  Edit vendor/amlogic/common/npu/Android.mak

    +TMP_PATH := $(LOCAL_PATH)
    +VIVANTE_SDK_DIR := $(LOCAL_PATH)/service/ovx_inc
    +include $(LOCAL_PATH)/tim-vx/Android.mk
    +LOCAL_PATH := $(TMP_PATH)

    ifeq ($(BOARD_NPU_SERVICE_ENABLE), true)

  Note VIVANTE_SDK_DIR needs to point to SDK header
  inclusion path

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-06 18:53:51 +08:00
Kainan Cha c141416238 Update internal to REL/v1.1.30.2
SHA: 2e64046f

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-03-29 16:25:12 +08:00
Jiang Bo def53f4b5c Update internal to REL/v1.1.30
Commit: 6ccb425e
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
2021-02-26 17:05:14 +08:00
Zongwu.Yang 5108598fd5 Add Cmake build for tim-vx
Signed-off-by: Zongwu.Yang <Zongwu.Yang@verisilicon.com>
2021-02-02 10:04:47 +08:00
Jiang Bo 7972af0697 Initial Commit for VERSION 1.1.28
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
2021-01-11 18:27:48 +08:00