TIM-VX/include/tim/vx
Chen Xin 944fdfad8f Mapped GRUCell & unit test
Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
2022-08-11 20:34:19 +08:00
..
ops Mapped GRUCell & unit test 2022-08-11 20:34:19 +08:00
platform Fix the build error for clang when export TIM_VX_ENABLE_PLATFORM=ON 2022-08-08 16:50:25 +08:00
compile_option.h [New API] Add compile_option support - relax_mode (#285) 2022-02-09 10:52:11 +08:00
context.h Expose hw feature : isClOnly() 2022-08-03 09:06:32 +08:00
direct_map_op.h Added RNNCell & unit test (#249) 2021-12-29 11:08:24 +08:00
graph.h feat(tensor): support external buffer when creating input/output tensors (#389) 2022-05-18 23:38:26 +08:00
operation.h Support that op's all inputs are constant (#264) 2022-01-14 12:34:38 +08:00
ops.h add op: maxpoolwithargmax2 and maxpoolgrad 2022-07-29 11:11:33 +08:00
tensor.h feat(tensor): support external buffer when creating input/output tensors (#389) 2022-05-18 23:38:26 +08:00
types.h support conv3d (#238) 2022-01-11 14:13:15 +08:00