122 lines
4.6 KiB
Makefile
122 lines
4.6 KiB
Makefile
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#/*Copyright 2020-2021 T-Head Semiconductor Co., Ltd.
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#
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#Licensed under the Apache License, Version 2.0 (the "License");
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#you may not use this file except in compliance with the License.
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#You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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#Unless required by applicable law or agreed to in writing, software
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#distributed under the License is distributed on an "AS IS" BASIS,
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#WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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#See the License for the specific language governing permissions and
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#limitations under the License.
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#*/
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#*/
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#*/
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CPU_ARCH_FLAG_0 := e906f
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CPU_ARCH_FLAG_1 := nodsp
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CASE_LIST := \
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debug_2wire_jtag \
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ISA_RV32F \
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dhry \
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memset \
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debug \
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memcp \
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ISA_RV32IMAC \
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csr_rw_extend \
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coremark \
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hello_world \
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debug_2wire_jtag_build:
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@cp ./tests/cases/debug_2wire_jtag/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=debug_2wire_jtag FILE=E906_DEBUG_PATTERN >& debug_2wire_jtag_build.case.log
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ISA_RV32F_build:
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@cp ./tests/cases/ISA/RV32F/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=ISA_RV32F FILE=E906_RV32F_INSTRUCTIONS >& ISA_RV32F_build.case.log
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dhry_build:
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@cp ./tests/cases/dhry/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cp ./tests/lib/clib/* ./work
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@cp ./tests/lib/newlib_wrap/* ./work
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=dhry FILE=dhry_1_main >& dhry_build.case.log
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memset_build:
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@cp ./tests/cases/memset/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cp ./tests/lib/clib/* ./work
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@cp ./tests/lib/newlib_wrap/* ./work
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=memset FILE=mem_set_main >& memset_build.case.log
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debug_build:
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@cp ./tests/cases/debug/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=debug FILE=E906_DEBUG_PATTERN >& debug_build.case.log
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memcp_build:
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@cp ./tests/cases/memcp/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cp ./tests/lib/clib/* ./work
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@cp ./tests/lib/newlib_wrap/* ./work
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=memcp FILE=mem_copy_main >& memcp_build.case.log
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ISA_RV32IMAC_build:
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@cp ./tests/cases/ISA/RV32IMAC/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=ISA_RV32IMAC FILE=E906_RV32IMAC_INSTRUCTIONS >& ISA_RV32IMAC_build.case.log
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csr_rw_extend_build:
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@cp ./tests/cases/csr/csr_rw_extend/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=csr_rw_extend FILE=E906_EXTEND_CSR_RW >& csr_rw_extend_build.case.log
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coremark_build:
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@cp ./tests/cases/coremark/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cp ./tests/lib/clib/* ./work
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@cp ./tests/lib/newlib_wrap/* ./work
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=coremark FILE=core_main >& coremark_build.case.log
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hello_world_build:
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@cp ./tests/cases/hello_world/* ./work
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@find ./tests/lib/ -maxdepth 1 -type f -exec cp {} ./work/ \;
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@cp ./tests/lib/clib/* ./work
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@cp ./tests/lib/newlib_wrap/* ./work
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@cd ./work && make -s clean && make -s all CPU_ARCH_FLAG_0=e906f CPU_ARCH_FLAG_1=nodsp ENDIAN_MODE=little-endian CASENAME=hello_world FILE=hello_world_main >& hello_world_build.case.log
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# Adjust verilog filelist for *.v case...
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ifeq ($(CASE), debug_2wire_jtag)
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SIM_FILELIST := ../tests/cases/debug_2wire_jtag/_TEST_MACRO_2_WIRE_JTAG.vh ../tests/cases/debug_2wire_jtag/JTAG_DRV.vh ../tests/cases/debug_2wire_jtag/E906_DEBUG_PATTERN.v
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endif
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ifeq ($(CASE), debug)
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SIM_FILELIST := ../tests/cases/debug/JTAG_DRV.vh ../tests/cases/debug/E906_DEBUG_PATTERN.v
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endif
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define newline
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endef
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