Adapt FuseSoC SweRV config generator wrt new snapshot dir

This commit is contained in:
Olof Kindgren 2020-09-22 16:27:04 +02:00
parent 3c50837a75
commit 2627ccc82b
1 changed files with 3 additions and 3 deletions

View File

@ -14,14 +14,14 @@ class SwervConfigGenerator(Generator):
def run(self): def run(self):
script_root = os.path.abspath(os.path.join(os.path.dirname(sys.argv[0]), '..')) script_root = os.path.abspath(os.path.join(os.path.dirname(sys.argv[0]), '..'))
files = [ files = [
{"configs/snapshots/default/common_defines.vh" : { {"snapshots/default/common_defines.vh" : {
"copyto" : "config/common_defines.vh", "copyto" : "config/common_defines.vh",
"file_type" : "systemVerilogSource"}}, "file_type" : "systemVerilogSource"}},
{"configs/snapshots/default/pic_ctrl_verilator_unroll.sv" : { {"snapshots/default/pic_ctrl_verilator_unroll.sv" : {
"copyto" : "config/pic_ctrl_verilator_unroll.sv", "copyto" : "config/pic_ctrl_verilator_unroll.sv",
"is_include_file" : True, "is_include_file" : True,
"file_type" : "systemVerilogSource"}}, "file_type" : "systemVerilogSource"}},
{"configs/snapshots/default/pic_map_auto.h" : { {"snapshots/default/pic_map_auto.h" : {
"copyto" : "config/pic_map_auto.h", "copyto" : "config/pic_map_auto.h",
"is_include_file" : True, "is_include_file" : True,
"file_type" : "systemVerilogSource"}}] "file_type" : "systemVerilogSource"}}]