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Verilog 56.8%
SystemVerilog 30.2%
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colin 18c8352c09 Add ram test and verilator in fpga DEMO. 2022-02-09 12:47:35 +00:00
.vscode Add ram test and verilator in fpga DEMO. 2022-02-09 12:47:35 +00:00
Cores-SweRV Add verilator install method in readme. 2022-02-07 08:13:16 +00:00
fpga Add ram test and verilator in fpga DEMO. 2022-02-09 12:47:35 +00:00
jtag add jtag to ESP32 2022-02-02 03:40:41 +00:00