48 lines
1.2 KiB
Markdown
48 lines
1.2 KiB
Markdown
# Demo
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## helloworld
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This a demo for llvm build and sim with verilator.
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## jtag
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This is a demo of jtag simulation by openocd running on verilator.
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## install verilator
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`sudo apt install verilator`
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## install openocd
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```shell
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git clone https://github.com/riscv/riscv-openocd.git
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cd riscv-openocd
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./bootstrap
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./configure --prefix=$RISCV --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi --enable-jlink
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make
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sudo make install
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```
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## may be install sv2v
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`https://github.com/zachjs/sv2v`
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## install ninja
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`sudo apt-get install -y ninja-build`
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## build and install riscv tools
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* Opetion1 :https://github.com/riscv-collab/riscv-gnu-toolchain.git
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* Opetion2 :
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```bash
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sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev libusb-1.0-0-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev device-tree-compiler pkg-config libexpat-dev libfl-dev
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git clone https://github.com/chipsalliance/rocket-tools.git
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git submodule update --init --recursive
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# riscv-isa-sim and openocd may be checkout to main branch to avoid compile error
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sudo su
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export RISCV=/opt/riscv
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export MAKEFLAGS="-j12"
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./build-rv32ima.sh
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``` |