119 lines
3.0 KiB
Markdown
119 lines
3.0 KiB
Markdown
# Weekend group
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## helloworld
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This a demo for llvm build and sim with verilator.
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## jtag
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This is a demo of jtag simulation by openocd running on verilator.
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## install JLink deb software and driver
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https://www.segger.com/downloads/jlink/
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## install verilator
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`sudo apt install verilator`
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## install openocd
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```shell
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sudo apt-get install libjim-dev
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sudo apt-get install libjaylink-dev
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sudo apt-get install libhidapi-dev
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git clone https://github.com/riscv/riscv-openocd.git
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cd riscv-openocd
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./bootstrap
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./configure --prefix=$RISCV --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi --enable-jlink --enable-cmsis-dap
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make
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sudo make install
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```
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## maybe install CMSIS-DAP probes driver
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```bash
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sudo cp openocd/contrib/60-openocd.rules /etc/udev/rules.d
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sudo udevadm control --reload
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sudo reboot
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```
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## may be install sv2v
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`https://github.com/zachjs/sv2v`
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## install ninja
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`sudo apt-get install -y ninja-build`
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## Gen quasar core
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```bash
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git clone https://github.com/Lampro-Mellon/Quasar.git
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cd tools
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vim configs/quasar.config # to config the core
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make clean
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make conf
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make sbt_
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# Quasar/generated_rtl/quasar_wrapper.sv
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```
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## install Bit-Vector
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```bash
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wget https://cpan.metacpan.org/authors/id/S/ST/STBEY/Bit-Vector-7.4.tar.gz
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tar -xvf
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cd
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perl Makefile.PL
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make
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sudo make install
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```
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## build and install riscv tools
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* Opetion1 :<https://github.com/riscv-collab/riscv-gnu-toolchain.git>
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```bash
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# build 64bit
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sudo make clean
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./configure --prefix=/opt/riscv
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sudo make -j12
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# build 32bit
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sudo make clean
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./configure --prefix=/opt/riscv --with-arch=rv32gc --with-abi=ilp32 --enable-multilib
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sudo make -j12
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```
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## install xilinx
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1. 下载vivado安装文件
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2. 下载vivado lisence
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3. 解压vivado的安装文件，sudo执行xsetup开始安装
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4. 安装vivado之后，安装 Hardware Server
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5. 通过执行安装路径的bin目录的vivado来启动
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6. 安装Xilinx Platform Cable USB II 下载器驱动
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1. cd /tools/Xilinx/Vivado/2021.2/data/xicom/cable_drivers/lin64/install_script/install_drivers
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2. sudo ./install_drivers
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3. lsusb 检查安装的usb设备
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4. 重新拔插后显示 Bus 005 Device 011: ID 03fd:0008 Xilinx, Inc. Platform Cable USB II
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7. 配置Unused pin，避免报错 end of startup status: low
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1. 在XDC文件里面添加 set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
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## tips
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* jtag的reset引脚要设置正确 jtag_trst_n 低电平复位
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* 仿真的时候jtag的tclk不能太快，要低于soc的clk
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* SweRV启动/复位后程序从`reset_vec`(0x80000000)开始，遇到错误（code=0），就会跳到mtvec(中断向量表)指示的地址
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* 物理仿真的时候 adapter speed 不能太快
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* data段放到0x200太小，GDB调试RISCV至少要4K的程序空间？
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* soc的ram和rom直接接到了lsu和ifu，和DCCM/ICCM无关
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* program.hex 用于 $readmemh 必须以空行结束
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## Todo
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* gdb怎么复位soc
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* gdb没有把程序加载到mem，ifu还是用老代码
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* mem分bank后，怎么加载，用于仿真=>for循环分别加载
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* Quasar升级scala版本发现openocd运行不正常 |