0dacc978da
not start an SB write access when sbreadonaddr/dbreadondata is set. Add fpga_optimize option to swerv.config; eliminates over 90% of clock-gating to support faster FPGA simulation. |
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|---|---|---|
| .. | ||
| ifu.sv | ||
| ifu_aln_ctl.sv | ||
| ifu_bp_ctl.sv | ||
| ifu_compress_ctl.sv | ||
| ifu_ic_mem.sv | ||
| ifu_iccm_mem.sv | ||
| ifu_ifc_ctl.sv | ||
| ifu_mem_ctl.sv | ||