0dacc978da
not start an SB write access when sbreadonaddr/dbreadondata is set. Add fpga_optimize option to swerv.config; eliminates over 90% of clock-gating to support faster FPGA simulation. |
||
|---|---|---|
| .. | ||
| lsu.sv | ||
| lsu_addrcheck.sv | ||
| lsu_bus_buffer.sv | ||
| lsu_bus_intf.sv | ||
| lsu_clkdomain.sv | ||
| lsu_dccm_ctl.sv | ||
| lsu_dccm_mem.sv | ||
| lsu_ecc.sv | ||
| lsu_lsc_ctl.sv | ||
| lsu_stbuf.sv | ||
| lsu_trigger.sv | ||