Commit Graph

6 Commits

Author SHA1 Message Date
colin.liang f9eccf0f1b Add Verilator gen dot graph. 2022-11-03 17:44:52 +08:00
colin e8224a4211 Refine synth.sh. 2022-03-23 14:01:00 +00:00
colin e98bbf2deb Move demo/build to demo. 2022-03-23 13:08:16 +00:00
colin dc1509b921 Add temp fpga file : synth.sh 2022-03-09 14:44:11 +00:00
colin d86fef92e2 Enable gdb by openocd. 2022-03-08 09:18:19 +00:00
colin ddf80fde8d Add jtag 2022-03-07 13:08:10 +00:00