Commit Graph

3 Commits

Author SHA1 Message Date
Joseph Rahmeh 1d2db09a2b Release 1.1 2020-03-04 15:36:01 -08:00
Olof Kindgren a08b395d8c Add FuseSoC support for SweRV EL2
This adds an initial FuseSoC core description file for SweRV EL2.

In addition to the core file there is also a python wrapper for
the core configuration (configs/swerv_config_gen.py) that is used
as a FuseSoC generator. There is also a tcl file (tools/vivado.tcl)
with Vivado-specific options that FuseSoC will pick up automatically
when Vivado is used.

It has been successfully tested in a modified SweRVolf SoC to boot
Zephyr OS in a Verilator simulation and on the Nexys A7 FPGA board.

TODO:

- Add target for running the bundled SweRV EL2 testbench
- Add Model/Questasim support
2020-01-31 10:36:53 +01:00
Joseph Rahmeh 7a48835c4e Initial checkin. 2020-01-22 14:22:50 -08:00